Available
Si91821
Vishay Siliconix
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
1
Micropower 300-mA CMOS LDO Regulator With Error Flag
FEATURES
DInput Voltage: 2.356.0 V
DFixed 1.8-V, 2.5-V, 2.8-V, 3.0-V, 3.3-V, 5.0-V, or
Adjustable Output Voltage Options
DLow 120-mV Dropout at 300-mA Load
DGuaranteed 300-mA Output Current
D500-mA Peak Output Current Capability
DUses Low ESR Ceramic Output Capacitor
DFast Load and Line Transient Response
DOnly 100-mV(rms) Noise With Noise Bypass
Capacitor
D1-mA Maximum Shutdown Current
DBuilt-in Short Circuit and Thermal Protection
DOut-Of-Regulation Error Flag (Power_Good)
APPLICATIONS
DCellular Phones
DLaptop and Palm Computers
DPDA, Digital Still Cameras
DESCRIPTION
The Si91821 is a 300-mA CMOS LDO (low dropout) voltage
regulator. The device features ultra low ground current and
dropout voltage to prolong battery life in portable electronics.
The Si91821 offers line and load transient response and ripple
rejection superior to that of bipolar or BiCMOS LDO regulators.
The device is designed to maintain regulation while delivering
500-mA peak current. This is useful for systems that have high
surge current upon turn-on. The Si91821 is designed to drive
the lower cost ceramic, as well as tantalum, output capacitors.
The device is guaranteed stable from maximum load current
down to 0-mA load. In addition, an external noise bypass
capacitor connected to the device’s CNOISE pin will lower the
LDO’s output noise for low noise applications.
The Si91821 also includes an out-of-regulation error flag.
When the output voltage is 5% below its nominal output
voltage, the error flag output goes low.
The Si91821 is available in both standard and lead (Pb)-free
MSOP-8 packages and is specified to operate over the
industrial temperature range of 40 _C to 85 _C.
TYPICAL APPLICATIONS CIRCUITS
Figure 3. Fixed Output, Low Noise, Full Features Application
CNOISE
SD
78
ERROR
21, 4
GND
SET
65
VIN VOUT
3
GND
VIN
2.2 mF
Si91821
ON/OFF
2.2 mF
VOUT
POWER_GOOD
1 MW
0.033 mF
Figure 1. Fixed Output Figure 2.. Adjustable Output
VOUT
CNOISE
SD
78
ERROR
2 1, 4
GND
SET
65
VIN VOUT
3
GND
VIN
2.2 mF
Si91821
2.2 mF
Optional
VOUT
CNOISE
SD
78
ERROR
2 1, 4
GND
SET
65
VIN VOUT
3
GND
VIN
2.2 mF
Si91821
2.2 mF
Si91821
Vishay Siliconix
www.vishay.com
2Document Number: 71614
S-51147–Rev. E, 20-Jun-05
ABSOLUTE MAXIMUM RATINGS
Input Voltage, VIN 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SD Input Voltage, VSD 0.3 V to VIN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Current, IOUT Short Circuit Protected. . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage, VOUT 0.3 V to VO(nom) + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature, TJ(max) 150_C. . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature, TSTG 55_C to 150_C. . . . . . . . . . . . . . . . . . . . . . . . . .
ESD (Human Body Model) 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation (Package)a
8-Pin MSOPb666 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Impedance (QJA)a
8-Pin MSOPb185_C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 10 mW/_C above TA = 25_C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage, VIN 2.35 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage, VOUT 1.5 to 5.0 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SD Input Voltage, VSD 0 V to VIN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IOUT 0 to 300 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Ambient Temperature, TA40_C to 85_C. . . . . . . . . . . . . . . . . . . .
Operating Junction Temperature, TJ40_C to 125_C. . . . . . . . . . . . . . . . . . .
CIN = 2.2 mF, COUT = 2.2 mF (ceramic, X5R or X7R type) , CNOISE = 0.033 mF (ceramic)
COUTRange = 1 mF to 10 mF ("10%, x5R or x7R type)
CIN w COUT
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
V V 1 V I 1 A
Limits
40 to 85_C
Parameter Symbol VIN = VOUT(nom) + 1 V, IOUT = 1 mA
CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V TempaMinbTypcMaxbUnit
Input Voltage VIN 2.35 6.0
V
Output Voltage VOUT Adjustable Version Full 1.5 5.0 V
Out
p
ut Volta
g
e Accurac
y
VOUT
1 mA v IOUT v 300 mA
Room 1.5 1.5 %
Output Voltage Accuracy
(to stated output voltage) VOUT 1 mA v IOUT v 300 mA Full 2.5 2.5
%
VOUT(nom)
Feedback Voltage (ADJ Version)
VSET
Room 1.191 1.215 1.239
V
Feedback Voltage (ADJ Version) VSET Full 1.179 1.251 V
Line Regulation
(Except 5-V Version)
DV100
From VIN = VOUT(nom) + 1 V
to VOUT(nom) + 2 V Full 0.18 0.18
Line Regulation (5-V Version) DVOUT 100
V V
From VIN = 5.5 V to 6 V Full 0.18 0.18 %/V
Line Regulation (ADJ Version)
VIN VOUT(nom) VOUT = 1.5 V From VIN = 2.5 V to 3.5 V Full 0.18 0.18
%/V
Line Regulation (ADJ Version) VOUT = 5 V From VIN = 5.5 V to 6 V Full 0.18 0.18
IOUT = 10 mA Room 5 20
Dropout VoltagedVIN VOUT IOUT = 200 mA Full 80 135 mV
pg
IN OUT
IOUT = 300 mA Full 120 200
IOUT = 0 mA Full 150 270
Ground Pin Current IGND IOUT = 200 mA Room 500
mA
GND
IOUT = 300 mA Room 600 mA
Shutdown Supply Current IIN(off) VSD = 0 V Room 0.1 1
Peak Output Current IO(peak) VOUT w 0.95 x VOUT(nom), tpw = 2 ms Room 500 mA
BW = 10 Hz to 100 kHz w/o CNOISE Room 260
Out
p
ut Noise Volta
g
e e
N
BW = 10 Hz to 100 kHz
IOUT = 150 mA CNOISE = 0.1 mF Room 37
m
V
(
rms
)
Output Noise Voltage
e
N
BW = 10 to 100 kHz
IOUT = 10 mA CNOISE = 33 nF Room 54
mV (rms)
f = 1 kHz Room 60
Ripple Rejection DVOUT/DVIN IOUT = 150 mA f = 10 kHz Room 50 dB
pp j
OUT IN
OUT
f = 100 kHz Room 40
Si91821
Vishay Siliconix
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
3
SPECIFICATIONS
Limits
40 to 85_C
Test Conditions
Unless Otherwise Specified
VIN = VOUT(nom) + 1 V, IOUT = 1 mA
CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V
Parameter UnitMaxb
Typc
Minb
Tempa
Test Conditions
Unless Otherwise Specified
VIN = VOUT(nom) + 1 V, IOUT = 1 mA
CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V
Symbol
Dynamic Line Regulation DVO(line) VIN : VOUT(nom) + 1 V to VOUT(nom) + 2 V
tr/tf = 5 ms, IOUT = 250 mA Room 10
mV
Dynamic Load Regulation DVO(load) IOUT : 1 mA to 150 mA, tr/tf = 2 ms Room 30
mV
Turn-on Overshoot DVOOS VIN followed by SD = High Event
CNOISE v 100 nF Room 2.5 %
VOUT Turn-On-Time tON COUT = 10 mF, VOUT to 90% of final value,
VIN = 3.6 V Room 350 mS
Thermal Shutdown
Thermal Shutdown Junction Temp TJ(s/d) Room 165
_
C
Thermal Hysteresis THYST Room 20
_C
Short Circuit Current ISC VOUT = 0 V Room 800 mA
Shutdown Input
SD Input Voltage
VIH High = Regulator ON (Rising) Full 1.5 VIN
V
SD Input Voltage VIL Low = Regulator OFF (Falling) Full 0.4 V
SD Input Currente
IIH VSD = 0 V, Regulator OFF Room 0.01
mA
SD Input Currente
IIL VSD = 6 V, Regulator ON Room 1.0 mA
Shutdown Hysteresis VHYST Full 100 mV
Error Output
Output High Leakage IOFF ERROR = VOUT(nom) Full 0.01 2 mA
Output Low Voltage VOL ISINK = 2 mA Full 0.4
Power_Good Trip Threshold f, g
(Rising) VTH Full 0.93 x
VOUT
0.95 x
VOUT
0.97 x
VOUT V
HysteresisfVHYST Room 2% x
VOUT
Error Delay tDELAY CNOISE v 100 nF Full 10 mS
Notes
a. Room = 25_C, Full = 40 to 85_C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at TA = 25_C.
d. The dropout voltage is defined as VIN VOUT when VOUT is 100 mV below the value of VOUT for VIN = VOUT + 2 V. This is applicable for voltages of 2.5 V or
higher.
e. The device’s shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground.
f. VOUT is defined as the output voltage of the DUT at 1 mA.
g. Typical only, from VOUT = 2.0 V to VOUT = 1.5 V.
Si91821
Vishay Siliconix
www.vishay.com
4Document Number: 71614
S-51147–Rev. E, 20-Jun-05
TIMING WAVEFORMS
SD
VOUT
ERROR
Figure 4. Timing Diagram for Power-Up
tON
tDELAY
VNOM = 0.95 VNOM
tDELAY
VIH
VIL
PIN CONFIGURATION
vOUT ERROR
GND CNOISE
VOUT SET
MSOP-8
Top View
vIN SD
1
2
3
4
8
7
6
5
PIN DESCRIPTION
Pin Number Name Function
1, 4 VOUT Output voltage. Connect COUT between this pin and ground.
2 VIN Input supply pin. Bypass this pin with a 2.2-mF ceramic or tantalum capacitor to ground.
3 GND Ground pin. Local ground for CNOISE and COUT
.
5 SET For fixed output voltage versions, this pin could be connected to GND. For adjustable output voltage version, this
voltage feedback pin sets the output voltage via an external resistor divider.
6 CNOISE Noise bypass pin. For low noise applications, a 0.01-mF or larger ceramic capacitor should be connected from this pin
to ground.
7 SD By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused.
8 ERROR This open drain output is an error flag output which goes low when VOUT drops 5% below its nominal voltage.
Si91821
Vishay Siliconix
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
5
BLOCK DIAGRAM
+
CIN
2.2 mF
VIN
2
5
SD
7
ON
OFF
3
GND
RFB2
RFB1
SET
+
+
1.215 V
VREF
6C
NOISE
+
+
2 mA
To VIN 1, 4
COUT
2.2 mF
8
REXT
VOUT
ERROR
Figure 5. 300-mA CMOS LDO Regulator
6 MW60 mV
Switches shown for device in normal operating mode (SD = HIGH)
+
CIN
2.2 mF
VIN
2
5
SD
7
ON
OFF
3
GND
SET
+
+
1.215 V
VREF
6C
NOISE
+
+
2 mA
To VIN 1, 4
COUT
2.2 mF
8
REXT
VOUT
ERROR
Figure 6. 300-mA CMOS LDO Regulator (Adjustable Output)
6 MW60 mV
R1
R2
VSET
Si91821
Vishay Siliconix
www.vishay.com
6Document Number: 71614
S-51147–Rev. E, 20-Jun-05
DETAILED DESCRIPTION
The Si91821 is a low drop out, low quiescent current, and very
linear regulator with very fast transient response. It is primarily
designed for battery powered applications where battery run
time is at a premium. The low quiescent current allows
extended standby time while low drop out voltage enables the
system to fully utilize battery power before recharge. The
Si91821 is a very fast regulator with bandwidth exceeding
50 kHz while maintaining low quiescent current at light load
conditions. With this bandwidth, the Si91821 is the fastest
LDO available today. The Si91821 is stable with any output
capacitor type from 1 mF to 10.0 mF. However, X5R or X7R
ceramic capacitors are recommended for best output noise
and transient performance.
VIN
VIN is the input supply pin. The bypass capacitor for this pin
is not critical as long as the input supply has low enough source
impedance. For practical circuits, a 1.0-mF or larger ceramic
capacitor is recommended. When the source impedance is
not low enough and/or the source is several inches from the
Si91821, then a larger input bypass capacitor is needed. It is
required that the equivalent impedance (source impedance,
wire, and trace impedance in parallel with input bypass
capacitor impedance) must be smaller than the input
impedance of the Si91821 for stable operation. When the
source impedance, wire, and trace impedance are unknown,
it is recommended that an input bypass capacitor be used of
a value that is equal to or greater than the output capacitor.
VOUT
VOUT is the output voltage of the regulator. Connect a bypass
capacitor from VOUT to ground. The output capacitor can be
any value from 1.0 mF to 10.0 mF. A ceramic capacitor with
X5R or X7R dielectric type is recommended for best output
noise, line transient, and load transient performance.
GND
Ground is the common ground connection for VIN and VOUT
.
It is also the local ground connection for CNOISE, SET, and SD.
SET
SET is not connected internally for the fixed voltage version.
Therefore, it can be connected to GND optionally. For the
adjustable output version, use a resistor divider R1 and R2,
connect R1 from VOUT to SET and R2 from SET to ground. R2
should be in the 25-kW to 150-kW range for low power
consumption, while maintaining adequate noise immunity.
The formula below calculates the value of R1, given the
desired output voltage and the R2 value.
R1+
ǒVOUT *VSETǓR2
VSET (1)
VSET is nominally 1.215 V.
SHUTDOWN (SD)
SD controls the turning on and off of the Si91821. VOUT is
guaranteed to be on when the SD pin voltage equals or is
greater than 1.5 V. VOUT is guaranteed to be off when the SD
pin voltage equals or is less than 0.4 V. During shutdown
mode, the Si91821 will draw less than 2-mA current from the
source. To automatically turn on VOUT whenever the input is
applied, tie the SD pin to VIN.
ERROR
ERROR is an open drain output that goes low when VOUT is
less than 5% of its normal value. As with any open drain output,
an external pull up resistor is needed. This function is active
in shutdown.
The ERROR pin must be left opened if not used.
CNOISE
For low noise application, connect a high frequency ceramic
capacitor from CNOISE to ground. A 0.01-mF or a 0.1-mF X5R
or X7R is recommended.
Si91821
Vishay Siliconix
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
7
ORDERING INFORMATION
Standard
Part Number Lead (Pb)-Free
Part Number Marking Voltage Temperature
Range Package
Si91821DH-18-T1 Si91821DH-18-T1—E3 1821
1800 1.80 V
Si91821DH-25-T1 Si91821DH-25-T1—E3 1821
2500 2.50 V
Si91821DH-28-T1 Si91821DH-28-T1—E3 1821
2800 2.80 V
Si91821DH-30-T1 Si91821DH-30-T1—E3 1821
3000 3.00 V 40 to 85_C MSOP-8
Si91821DH-33-T1 Si91821DH-33-T1—E3 1821
3300 3.30 V
Si91821DH-50-T1 Si91821DH-50-T1—E3 1821
5000 5.00 V
Si91821DH-AD-T1 Si91821DH-AD-T1—E3 1821
ADJ Adjustable
Eval Kit Temperature Range Board Type
Si91821DB 40 to 85_CSurface Mount
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
0
50
100
150
200
250
0 100 200 300 400 500
Dropout V oltage vs. Load Current
ILOAD (mA)
(mV)VDROP
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0123456
Dropout Characteristic
VIN (V)
(V)VOUT
RLOAD = 16.5 W
VOUT = 2.775 V VOUT = 2.775 V
Si91821
Vishay Siliconix
www.vishay.com
8Document Number: 71614
S-51147–Rev. E, 20-Jun-05
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
0
50
100
150
200
250
01234567
No Load Current vs. Input Voltage
Input Voltage (V)
0
30
60
90
120
150
180
50 25 0 25 50 75 100 125 150
Dropout Voltage vs. Temperature
0
300
600
900
1200
1500
40 20 0 20 40 60 80 100 120 140
GND Pin Current vs. Temperature and Load
Junction Temperature (_C)
0.75
0.60
0.45
0.30
0.15
0.00
0.15
0.30
0 50 100 150 200 250 300 350
Normalized Output Voltage vs. Load Current
Output Voltage (%)
Load Current (mA)
(mV)VDROP
IOUT = 0 mA
IOUT = 300 mA
IOUT = 10 mA
IOUT = 200 mA
VOUT = 2.775 V
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.2
0.4
0.6
40 20 0 20 40 60 80 100 120 140
Normalized VOUT vs. Temperature
Junction Temperature (_C)
0
20
40
60
80
100
120
140
160
180
2.0 2.5 3.0 3.5 4.0 4.5 5.0
Dropout Voltage vs. VOUT
(%)VOUT
IOUT = 0 mA
IOUT = 300 mA
IOUT = 100 mA
VOUT
Dropout Voltage (mV)(I GND mA)
(I GND mA)
IOUT = 0 mA
IOUT = 300 mA
IOUT = 200 mA
Junction Temperature (_C)
25_C
85_C
40_C
IOUT = 10 mA
IOUT = 300 mA
IOUT = 200 mA
Si91821
Vishay Siliconix
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
9
TYPICAL WAVEFORMS
Load Transient Response-1 Load Transient Response-2
VOUT = 2.775 V
COUT = 2.2 mF
ILOAD = 150 to 1 mA
tfall = 2 msec
ILOAD
100 mA/div
VOUT
10 mV/div
Load Transient Response-3
VOUT = 2.775 V
COUT = 1.0 mF
ILOAD = 1 to 150 mA
trise = 2 msec
Load Transient Response-4
VOUT = 2.775 V
COUT = 1.0 mF
ILOAD = 150 to 1 mA
tfall = 2 msec
5.00 ms/div
LineTransient Response-1
VINSTEP = 4.77 to 5.77 V
VOUT = 2.775 V
COUT = 2.2 mF
CIN = 2.2 mF
ILOAD = 300 mA
trise = 5 msec
20 ms/div
LineTransient Respons-2
VINSTEP = 5.77 to 4.77 V
VOUT = 2.775 V
COUT = 2.2 mF
CIN = 2.2 mF
ILOAD = 300 mA
tfall = 5 msec
5.00 ms/div
5.00 ms/div
20 ms/div
ILOAD
100 mA/div
VOUT
10 mV/div
VOUT = 2.775 V
COUT = 2.2 mF
ILOAD = 1 to 150 mA
trise = 2 msec
5.00 ms/div
ILOAD
100 mA/div
VOUT
10 mV/div
ILOAD
100 mA/div
VOUT
10 mV/div
VOUT
10 mV/div
VIN
2 V/div
VOUT
2 V/div
VOUT
10 mV/div
Si91821
Vishay Siliconix
www.vishay.com
10 Document Number: 71614
S-51147–Rev. E, 20-Jun-05
TYPICAL WAVEFORMS
VIN = 4 V
VOUT = 2.775 V
CNOISE = 0.033 mF
ILOAD = 300 mA
Turn-On Sequence
100 ms/div 20 ms/div
Output Noise
VIN = 3.80 V
VOUT = 2.775 V
IOUT = 300 mA
CNOISE = 0.033 mF
BW = 10 Hz to 1 MHz
Noise Spectrum
VIN = 3.80 V
VOUT = 2.775 V/10 mA
CNOISE = 0.033 mF
10 Hz
VIN = 4 V
VOUT = 2.775 V
CNOISE = 0.033 mF
ILOAD = 300 mA
Turn-Off Sequence
VIN
CH-3 2 V/div
VOUT
CH-1 2 V/div
ERROR
CH-2 2 V/div
10 ms/div
mVńHz
Ǹ
1 MHz
20.0
0.01
VIN 2 V/div
VOUT 2 V/div
ERROR 2 V/div
200 mV/div
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactur ed at one of several qualified locations. Reliability data f or Silic on Te chnology a nd
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?71614.