/ 30E D mm 7929237 oOa024 Tm [><q_y Gy SGS-THOMSON S-THonson SF, MICROELECTRONICS BUZ32 CHIP N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR IN DIE FORM 2 e DIE SIZE: 156 x 156 mils METALLIZATION: SCHEMATIC DIAGRAM B Top Al Back Au/Cr/Ni/Au BACKSIDE THICKNESS: 6100 A Ss DIE THICKNESS: 16 + 2mils * PASSIVATION: P-Vapox s e BONDING PAD SIZE: Source 40 x 34 mils Vv R In" Gate 1519 mils bss DS (on) D RECOMMENDED WIRE BONDING: 200 V 0.40 9.5A Source Al - max 10 miis Gate Al - max 7 mils N-channel enhancement mode POWER MOS field effect transistor. Easy drive and very fast switching times make this POWER MOS ideal for high speed switching applications. Die geometry MC-0074 Es SOURCE Mi GATE Drain on backside * With Rinpe max. 1.67CW June 1988 V2 BUZ32 CHIP JOE D 7929237 0030125 La S G S-THOMSON GUARANTEED PROBED ELECTRICAL CHARACTERISTICS (T,= 25C, Note 1) on resistance Parameters Test Conditions Min. | Typ. | Max. | Unit Var) pss Drain-source Ip= 250 pA Vesg= 0 | 200 [ | Vv breakdown voltage ae . T-39-11 loss Zero gate voltage Vps= Max Rating 250 | vA drain current Vps= Max Rating x 0.8 Tj= 125C 4000 | pA I Gate-body leakage Vag = +20 V 100 } nA ass @s current Vas (hy Gate threshold Vos = Vas Ip=1 mA 2.1 4 Vv voltage Ros (on) Static drain-source Ves= 10 V Ip=1A 0.4 2 NOTES: 1 - Due to probe testing limitations de parameters only are tested. They are measured using pulse techni- ques: pulse width <300 us, duty cycle <2% 2 - For detailed device characteristics please refer to the discrete device datasheet 2l2 646