Semiconductor Components Industries, LLC, 2001
October, 2001 – Rev. 8 1Publication Order Number:
SN74LS682/D
SN74LS682, SN74LS684,
SN74LS688
8-Bit Magnitude
Comparators
The SN74LS682, 684, 688 are 8-bit magnitude comparators. These
device types are designed to perform comparisons between two
eight-bit binary or BCD words. All device types provide P = Q outputs
and the LS682 and LS684 have P>Q outputs also.
The LS682, LS684 and LS688 are totem pole devices. The LS682
has a 20 kΩ pullup resistor on the Q inputs for analog or switch data.
OUTPUT OUTPUT
TYPE P = Q P > Q
OUTPUT
ENABLE
OUTPUT
CONFIGURATION PULLUP
LS682 yes yes no totem-pole yes
LS684 yes yes no totem-pole no
LS688 yes no yes totem-pole no
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 4.75 5.0 5.25 V
TAOperating Ambient
Temperature Range 0 25 70 °C
IOH Output Current – High – 0.4 mA
IOL Output Current – Low 24 mA
LOW
POWER
SCHOTTKY
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PDIP–20
N SUFFIX
CASE 738
20
1
20
1
x = 2, 4, or 8
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
SN74LS68xN
AWLYYWW
MARKING
DIAGRAMS
LS68x
AWLYYWW
SOIC–20
DW SUFFIX
CASE 751D
1
1
Device Package Shipping
ORDERING INFORMATION
SN74LS682N PDIP–20 1440 Units/Box
SN74LS682DW SOIC–WIDE 38 Units/Rail
SN74LS682DWR2 SOIC–WIDE 2500/Tape & Reel
SN74LS684N PDIP–20 1440 Units/Box
SN74LS684DW SOIC–WIDE 38 Units/Rail
SN74LS684DWR2 SOIC–WIDE 2500/Tape & Reel
SN74LS688N PDIP–20 1440 Units/Box
SN74LS688DW SOIC–WIDE 38 Units/Rail
SN74LS688DWR2 SOIC–WIDE 2500/Tape & Reel
SN74LS682, SN74LS684, SN74LS688
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2
CONNECTION DIAGRAMS (TOP VIEW)
SN74LS682/684
18 17 16 15 14 13
123 4 567
20 19
8
VCC
P>Q
P=Q Q7 P7 Q6 Q5P6 P5
P0 Q0 P1 Q1 P2 Q2 P3
910
Q3 GND
12 11
Q4 P4
SN74LS688
18 17 16 15 14 13
123 4 567
20 19
8
VCC
G
P=Q Q7 P7 Q6 Q5P6 P5
P0 Q0 P1 Q1 P2 Q2 P3
910
Q3 GND
12 11
Q4 P4
FUNCTION TABLE
INPUTS OUTPUTS
DATA ENABLES
P, Q G, GT G2 P = Q P > Q
P = Q
P > Q
P < Q
X
L
L
L
H
L
L
L
H
L
H
H
H
H
L
H
H
H = HIGH Level, L = LOW Level, X = Irrelevant
SN74LS682, SN74LS684, SN74LS688
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3
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
VIH Input HIGH Voltage 2.0 V Guaranteed Input HIGH Voltage for
All Inputs
VIL Input LOW Voltage 0.8 VGuaranteed Input LOW Voltage for
All Inputs
VIK Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA
VOH Output HIGH Voltage 2.7 3.5 V VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOL
Out
p
ut LOW Voltage
0.25 0.4 V IOL = 12 mA VCC = VCC MIN,
VIN VIL or VIH
VOL Output LOW Voltage 0.35 0.5 V IOL = 24 mA VIN = VIL or VIH
per Truth Table
20 µA VCC = MAX, VIN = 2.7 V
IIH Input HIGH Current LS682-Q Inputs 0.1 mA VCC = MAX, VIN = 5.5 V
IH
Others 0.1 mA VCC = MAX, VIN = 7.0 V
IIL
In
p
ut LOW Current
LS682-Q Inputs –0.4 mA
VCC = MAX VIN =04V
IIL Input LOW Current Others –0.2 mA VCC = MAX, VIN = 0.4 V
IOS Short Circuit Current (Note 1.) –30 –130 mA VCC = MAX
LS682 70 mA
ICC Power Supply
Current
LS684 65 mA VCC = MAX
CC
Current
LS688 65 mA
CC
1. Not more than one output should be shorted at a time, nor for more than 1 second.
SN74LS682, SN74LS684, SN74LS688
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4
LOGIC DIAGRAMS
P7
Q7
P6
Q6
P5
Q5
P4
Q4
P3
Q3
P2
Q2
P1
Q1
P0
Q0
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
P = Q
P > Q (2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
P7
Q7
P6
Q6
P5
Q5
P4
Q4
P3
Q3
P2
Q2
P1
Q1
P0
Q0
(19)
P = Q
(1)
G
SN74LS682 and LS684 SN74LS688
SN74LS682, SN74LS684, SN74LS688
http://onsemi.com
5
AC CHARACTERISTICS (TA = 25°C)
SN74LS682
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
tPLH
tPHL Propagation Delay, P to P = Q 13
15 25
25 ns
tPLH
tPHL Propagation Delay, Q to P = Q 14
15 25
25 ns VCC = 5.0 V
CL45
p
F
tPLH
tPHL Propagation Delay, P to P > Q 20
15 30
30 ns CL = 45 pF
RL = 667 Ω
tPLH
tPHL Propagation Delay, Q to P > Q 21
19 30
30 ns
SN74LS684
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
tPLH
tPHL Propagation Delay, P to P = Q 15
17 25
25 ns
tPLH
tPHL Propagation Delay, Q to P = Q 16
15 25
25 ns VCC = 5.0 V
CL45
p
F
tPLH
tPHL Propagation Delay, P to P > Q 22
17 30
30 ns CL = 45 pF
RL = 667 Ω
tPLH
tPHL Propagation Delay, Q to P > Q 24
20 30
30 ns
SN74LS688
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
tPLH
tPHL Propagation Delay, P to P = Q 12
17 18
23 ns
tPLH
tPHL Propagation Delay, Q to P = Q 12
17 18
23 ns VCC = 5.0 V
CL = 45 pF
R
L
=
66
7 Ω
tPLH
tPHL Propagation Delay, G , G1 to P = Q 12
13 18
20 ns
RL
=
667
Ω
SN74LS682, SN74LS684, SN74LS688
http://onsemi.com
6
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
M
L
J20 PL
M
B
M
0.25 (0.010) T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A25.66 27.171.010 1.070
B6.10 6.600.240 0.260
C3.81 4.570.150 0.180
D0.39 0.550.015 0.022
G2.54 BSC0.100 BSC
J0.21 0.380.008 0.015
K2.80 3.550.110 0.140
L7.62 BSC0.300 BSC
M0 15 0 15
N0.51 1.010.020 0.040
E
1.27 1.770.050 0.070
1
11
10
20
–A–
SEATING
PLANE
K
N
FG
D20 PL
–T–
M
A
M
0.25 (0.010) T
E
B
C
F
1.27 BSC0.050 BSC
SN74LS682, SN74LS684, SN74LS688
http://onsemi.com
7
PACKAGE DIMENSIONS
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–05
ISSUE F
20
1
11
10
B20X
H10X
C
L
18X A1
A
SEATING
PLANE
hX 45
E
D
M
0.25 M
B
M
0.25 S
AS
B
T
eT
B
A
DIM MIN MAX
MILLIMETERS
A2.35 2.65
A1 0.10 0.25
B0.35 0.49
C0.23 0.32
D12.65 12.95
E7.40 7.60
e1.27 BSC
H10.05 10.55
h0.25 0.75
L0.50 0.90
0 7
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL
BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT
MAXIMUM MATERIAL CONDITION.
SN74LS682, SN74LS684, SN74LS688
http://onsemi.com
8
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SN74LS682/D
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