
LM117, LM317A, LM317-N
SNVS774N –MAY 2004–REVISED AUGUST 2013
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LM317A and LM317-N ELECTRICAL CHARACTERISTICS(1)
Specifications with standard type face are for TJ= 25°C, and those with boldface type apply over full Operating
Temperature Range. Unless otherwise specified, VIN −VOUT = 5V, and IOUT = 10 mA.
LM317A LM317-N
Parameter Conditions Unit
Min Typ Max Min Typ Max s
1.238 1.250 1.262 - 1.25 - V
Reference Voltage 3V ≤(VIN −VOUT)≤40V, 1.225 1.250 1.270 1.20 1.25 1.30 V
10 mA ≤IOUT ≤IMAX(1)
0.005 0.01 0.01 0.04
Line Regulation 3V ≤(VIN −VOUT)≤40V (2) %/V
0.01 0.02 0.02 0.07
0.1 0.5 0.1 0.5
Load Regulation 10 mA ≤IOUT ≤IMAX(1) (2) %
0.3 1 0.3 1.5
Thermal Regulation 20 ms Pulse 0.04 0.07 0.04 0.07 %/W
Adjustment Pin Current 50 100 50 100 μA
Adjustment Pin Current 10 mA ≤IOUT ≤IMAX(1) 0.2 5 0.2 5 μA
Change 3V ≤(VIN −VOUT)≤40V
Temperature Stability TMIN ≤TJ≤TMAX 1 1 %
Minimum Load Current (VIN −VOUT) = 40V 3.5 10 3.5 10 mA
NDS, KTT Packages - - - 1.5 2.2 3.4
(VIN −VOUT)≤15V DCY, NDE Packages 1.5 2.2 3.4 1.5 2.2 3.4 A
NDT, MDT Packages 0.5 0.8 1.8 0.5 0.8 1.8
Current Limit NDS, KTT Packages - - 0.15 0.40
(VIN −VOUT) = 40V DCY, NDE Packages 0.112 0.30 0.112 0.30 A
NDT, MDT Packages 0.075 0.20 0.075 0.20
RMS Output Noise, % of 10 Hz ≤f≤10 kHz 0.003 0.003 %
VOUT VOUT = 10V, f = 120 Hz, CADJ = 0 μF65 65 dB
Ripple Rejection Ratio VOUT = 10V, f = 120 Hz, CADJ = 10 μF66 80 66 80 dB
Long-Term Stability TJ= 125°C, 1000 hrs 0.3 1 0.3 1 %
NDS (TO-3) Package - 2
NDE (TO-220) Package 4 4
KTT (TO-263) Package - 4
Thermal Resistance, θJC °C/W
Junction-to-Case DCY (SOT-223) Package 23.5 23.5
NDT (TO) Package 21 21
NDP (TO-252) Package 12 12
- 39
NDS (TO-3) Package 50 50
NDE (TO-220) Package
Thermal Resistance, θJA KTT (TO-263) Package (3) - 50
Junction-to-Ambient °C/W
DCY (SOT-223) Package (3) 140 140
(No Heat Sink) NDT (TO) Package 186 186
NDP (TO-252) Package (3) 103 103
(1) IMAX = 1.5A for the NDS (TO-3), NDE (TO-220), and KTT (TO-263) packages. IMAX = 1.0A for the DCY (SOT-223) package. IMAX = 0.5A
for the NDT (TO) and NDP (TO-252) packages. Device power dissipation (PD) is limited by ambient temperature (TA), device maximum
junction temperature (TJ), and package thermal resistance (θJA). The maximum allowable power dissipation at any temperature is :
PD(MAX) = ((TJ(MAX) - TA)/θJA). All Min. and Max. limits are ensured to TI's Average Outgoing Quality Level (AOQL).
(2) Regulation is measured at a constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to
heating effects are covered under the specifications for thermal regulation.
(3) When surface mount packages are used (TO-263, SOT-223, TO-252), the junction to ambient thermal resistance can be reduced by
increasing the PC board copper area that is thermally connected to the package. See the APPLICATION HINTS section for heatsink
techniques.
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