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Choosing Atmel ATF150xASV(L) POR Options
Summary
Atmel EPLDs are capable of operation down to the reset level, VRST. In 5.0V devices,
VRST generally is midway between the specified minimum power supply voltage and
0.0V, and so the margin for droop, noise, etc. is sufficient. In low voltage devices, VRST
is generally just below the specified minimum power supply voltage, and available
margin is reduced. In applications where the supply voltage falls close to the
specified minimum power supply voltage, Atmel recommends increasing the margin
for falling VCC. In the ATF150xASV(L) family, Atmel recommends changing the
Power_On_Reset hysteresis from small to large. Methods and means of implement-
ing this recommendation are discussed.
Details
All Atmel EPLDs are designed with a power-up reset function to initialize all registers
at a point delayed slightly from VCC rising above VRST. Similarly, if VCC falls below
VRST, the device will return to the reset state. Due to the asynchronous nature of reset
and uncertainty of how VCC actually rises in the system, the following conditions are
required:
1. The VCC rise must be monotonic.
2. After reset occurs, all input and feedback setup times must be met before
driving the clock pin high.
3. The clock must remain stable during TD.
The Atmel ATF150xASV family of 3.3V parts offers the user a programmable option
for the hysteresis about the reset level, small or large. In the case of the Atmel
ATF150xASV family, nominal VCC is 3.3V, the minimum VCC is 3.0V and the default
small hysteresis choice puts the VRST level just below minimum VCC for both rising and
falling VCC.
To ensure a robust operating environment in these cases, Atmel recommends that
users set the power-up reset hysteresis to large. With the large hysteresis option
selected, the reset level for falling VCC drops to a lower level, increasing the margin
before the device returns to the reset state.
• Synario users should open the Properties dialog box and change setting of the
Power_On_Reset Hysteresis from the default “Small” to “Large” before running the
Fitting process.
• Atmel POF2JED users should include the flag “-power_reset” on the command line
after “filename.POF” when running conversions.
To ensure that the registers are properly re-initialized when VCC rises again, the fol-
lowing condition is added:
4. If VCC falls below 2.0V, it must shut off completely before the device is turned
on again.
With the hysteresis option set to large, ICC is reduced several hundred µA. This is
especially significant for the “ATF150xASL” versions because it brings the standby ICC
down to the µA level.
EPLD
Technical
Bulletin
Rev. 1964A–10/00