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Device Features _äìÉ`çêÉ»PJjìäíáãÉÇá~
Single Chip Bluetooth® System
Advance Information Datasheet For
BC358239A
Fully Qualified Bluetooth system
Bluetooth v1.2 Specification Compliant
DSP Open Platform Co-Processor
Full Speed Bluetooth Operation with Full Piconet
Support
Scatternet Support
Low Power 1.8V Operation
10 x 10mm 96-ball LFBGA Package
Minimum External Components
Integrated 1.8V regulator
Dual UART Ports
16-bit Stereo Audio CODEC
I2S and SPDIF Interfaces
RF ‘Plug ‘n’ Go’ package
June 2003
General Description Applications
BlueCore3-Multimedia is a single chip radio and
baseband IC for Bluetooth 2.4GHz systems.
BC358239A contains 8Mbit of internal Flash memory.
When used with the CSR Bluetooth software stack, it
provides a fully compliant Bluetooth system to v1.2 of
the specification for data and voice communications.
Stereo Headphones
Automotive Hands-Free Kits
Echo Cancellation
High Performance Telephony Headsets
Enhanced Audio Applications
A/V Profile Support
BlueCore3-Multimedia System Architecture
BlueCore3-Multimedia contains an open platform digital
signal processor (DSP) co-processor allowing for
support of enhanced audio applications.
BlueCore3-Multimedia has been designed to reduce the
number of external components required which ensures
production costs are minimised.
The device incorporates auto-calibration and built-in
self-test (BIST) routines to simplify development, type
approval and production test. All hardware and device
firmware is fully compliant with the Bluetooth v1.2
Specification.
2.4
GHz
Radio
I/O
XTAL
RF IN
RF OUT
FLASH
RAM
Baseband
DSP
MCU
DSP
Co-Processor
SPI
UART/USB
PIO
Audio In/Out
PCM / I2S / SPDIF
Contents
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_äìÉ`çêÉ»PJjìäíáãÉÇá~ Product Data Sheet
Contents
1 Key Features .................................................................................................................................................. 5
2 Device Pinout Diagram with 10 x 10 LFBGA Package ................................................................................6
3 Device Terminal Functions ........................................................................................................................... 7
4 Electrical Characteristics ............................................................................................................................ 11
5 Radio Characteristics .................................................................................................................................. 17
5.1 Transmitter – Temperature +20°C......................................................................................................... 17
5.2 Receiver – Temperature +20°C............................................................................................................. 18
5.3 Power Consumption .............................................................................................................................. 19
6 Device Diagram ............................................................................................................................................ 20
7 Description of Functional Blocks ............................................................................................................... 21
7.1 RF Receiver........................................................................................................................................... 21
7.1.1 Low Noise Amplifier ................................................................................................................... 21
7.1.2 Analogue to Digital Converter .................................................................................................... 21
7.2 RF Transmitter....................................................................................................................................... 21
7.2.1 IQ Modulator .............................................................................................................................. 21
7.2.2 Power Amplifier .......................................................................................................................... 21
7.2.3 Auxiliary DAC............................................................................................................................. 21
7.3 RF Synthesiser ...................................................................................................................................... 21
7.4 Clock Input and Generation ................................................................................................................... 21
7.5 Baseband and Logic.............................................................................................................................. 22
7.5.1 Memory Management Unit......................................................................................................... 22
7.5.2 Burst Mode Controller ................................................................................................................ 22
7.5.3 Physical Layer Hardware Engine DSP....................................................................................... 22
7.5.4 RAM ........................................................................................................................................... 22
7.5.5 DSP RAM................................................................................................................................... 22
7.5.6 FLASH Memory.......................................................................................................................... 22
7.5.7 USB............................................................................................................................................ 23
7.5.8 Synchronous Serial Interface ..................................................................................................... 23
7.5.9 UART ......................................................................................................................................... 23
7.6 Microcontroller ....................................................................................................................................... 23
7.6.1 Programmable I/O...................................................................................................................... 23
7.7 DSP Co-Processor ................................................................................................................................ 23
7.8 Stereo Audio Interface........................................................................................................................... 24
7.8.1 PCM Interface ............................................................................................................................ 24
7.8.2 Audio Input ................................................................................................................................. 24
7.8.3 Audio Output .............................................................................................................................. 25
7.8.4 Digital Audio Interface ................................................................................................................ 25
8 CSR Bluetooth Software Stacks ................................................................................................................. 26
8.1 BlueCore HCI Stack .............................................................................................................................. 26
8.1.1 Key Features of the HCI Stack - Standard Bluetooth Functionality............................................ 27
8.1.2 Key Features of the HCI Stack - Extra Functionality .................................................................. 29
8.2 BlueCore RFCOMM Stack..................................................................................................................... 30
8.2.1 Key Features of the BlueCore3-Multimedia RFCOMM Stack .................................................... 31
8.3 BlueCore Virtual Machine Stack ............................................................................................................ 32
8.4 BlueCore3-Multimedia and DSP Co-Processor Stack ........................................................................... 33
8.5 Host-Side Software................................................................................................................................ 33
8.6 Device Firmware Upgrade ..................................................................................................................... 33
8.7 Additional Software for Other Embedded Applications .......................................................................... 33
8.8 CSR Development Systems .................................................................................................................. 33
9 External Interfaces....................................................................................................................................... 34
9.1 Transmitter/Receiver Input and Output.................................................................................................. 34
Contents
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9.2 RF Plug ‘n’ Go ....................................................................................................................................... 34
9.3 Asynchronous Serial Data Port (UART) and USB Port.......................................................................... 35
9.4 UART Bypass ........................................................................................................................................ 36
9.4.1 UART Configuration While RESET is Active.............................................................................. 36
9.4.2 UART Bypass Mode................................................................................................................... 36
9.5 Stereo Audio Interface........................................................................................................................... 36
9.5.1 PCM CODEC Interface .............................................................................................................. 37
9.5.2 Digital Audio Bus........................................................................................................................ 38
9.5.3 IEC 60958 Interface ................................................................................................................... 38
9.5.4 Audio Input Stage....................................................................................................................... 39
9.5.5 Microphone Input ....................................................................................................................... 40
9.5.6 Line Input ................................................................................................................................... 40
9.5.7 Output Stage.............................................................................................................................. 41
9.6 Serial Peripheral Interface ..................................................................................................................... 41
9.7 I/O Parallel Ports ................................................................................................................................... 41
9.7.1 PIO Defaults for BTv1.2 HCI Level Bluetooth Stack................................................................... 42
9.8 I2C Interface........................................................................................................................................... 42
9.9 TCXO Enable OR Function ................................................................................................................... 43
9.10 Reset ................................................................................................................................................... 43
9.11 Power Supply ........................................................................................................................................ 44
9.11.1 Voltage Regulator ...................................................................................................................... 44
9.11.2 Sequencing ................................................................................................................................ 44
9.11.3 Sensitivity to Disturbances ......................................................................................................... 44
10 Schematic ..................................................................................................................................................... 45
11 Package Dimensions ................................................................................................................................... 46
11.1 10 x 10 LFBGA 96-Ball LFBGA Package .............................................................................................. 46
12 Ordering Information ................................................................................................................................... 47
12.1 BlueCore3-Multimedia (Internal Flash) .................................................................................................. 47
13 Contact Information..................................................................................................................................... 48
14 Document References ................................................................................................................................. 49
Acronyms and Definitions.................................................................................................................................. 50
Status Information .............................................................................................................................................. 52
Record of Changes ............................................................................................................................................. 53
List of Figures
Figure 2.1: BC358239A BlueCore3-Multimedia Device Pinout ............................................................................... 6
Figure 6.1: BlueCore3-Multimedia Device Diagram .............................................................................................. 20
Figure 7.1: DSP Interface to Internal Functions .................................................................................................... 23
Figure 7.2: Audio Stereo Interface ........................................................................................................................ 24
Figure 8.1: BlueCore HCI Stack ............................................................................................................................ 26
Figure 8.2: BlueCore RFCOMM Stack .................................................................................................................. 30
Figure 8.3: Virtual Machine ................................................................................................................................... 32
Figure 8.4: DSP Co-Processor Stack.................................................................................................................... 33
Figure 9.1: Circuit RF_IN ...................................................................................................................................... 34
Figure 9.2: Circuit for RF_CONNECT ................................................................................................................... 34
Figure 9.3: UART Bypass Architecture ................................................................................................................. 36
Figure 9.4: Stereo CODEC Audio Input and Output Stages.................................................................................. 37
Figure 9.5: Example Circuit for SPDIF Interface with Coaxial Output ................................................................... 38
Figure 9.6: Example Circuit for SPDIF Interface with Coaxial Input ...................................................................... 39
Figure 9.7: Example Circuit for SPDIF Interface with Optical Output .................................................................... 39
Contents
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Figure 9.8: Example Circuit for SPDIF Interface with Optical Input ....................................................................... 39
Figure 9.9: BlueCore3-Multimedia Microphone Biasing (Left Channel Shown)..................................................... 40
Figure 9.10: Differential Input (Left Channel Shown) ............................................................................................ 40
Figure 9.11: Single Ended Input (Left Channel Shown) ........................................................................................ 41
Figure 9.12: Speaker Output (Left Channel Shown) ............................................................................................. 41
Figure 9.13: Example TXCO Enable OR Function................................................................................................ 43
Figure 10.1: Application Circuit for Radio Characteristics Specification with 10 x 10 LFBGA Package ................ 45
Figure 11.1: BlueCore3-Multimedia 96-Ball LFBGA Package Dimensions ........................................................... 46
List of Tables
Table 9.1: Alternative Functions of the Digital Audio Bus Interface on the PCM Interface .................................... 38
Table 9.2: PIO Defaults......................................................................................................................................... 42
Key Features
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_äìÉ`çêÉ»PJjìäíáãÉÇá~ Product Data Sheet
1 Key Features
Radio
Common TX/RX terminal simplifies external
matching; eliminates external antenna switch
BIST minimises production test time and no
external trimming required in production
Full RF reference designs available
Bluetooth v1.2 Specification compliant
Transmitter
+6dBm RF transmit power with level control from
on-chip 6-bit DAC over a dynamic range >30dB
Class 2 and Class 3 support without the need for
an external power amplifier or TX/RX switch
Class1 support using external power amplifier, a
power control terminal controlled by an internal
8-bit DAC and external RF TX/RX switch
Receiver
Integrated channel filters
Digital demodulator for improved sensitivity and
co-channel rejection
Real time digitised RSSI available on HCI interface
Fast AGC for enhanced dynamic range
Synthesiser
Fully integrated synthesiser; no external VCO,
varactor diode, resonator or loop filter
Compatible with crystals between 8 and 32MHz (in
multiples of 250kHz) or an external clock
Accepts 7.68, 14.44, 15.36, 16.2, 16.8, 19.2, 19.44,
19.68, 19.8 and 38.4MHz TCXO frequencies for
GSM and CDMA devices with sinusoidal or logic
level signals
Auxiliary Features
Crystal oscillator with built-in digital trimming
Power management includes digital shut down,
wake up commands and an integrated low power
oscillator for ultra-low power Park/Sniff/Hold mode
Can use external master oscillator and provides
‘clock request signal’ to control external clock
On-chip linear regulator; 1.8V output from a
2.2-4.2V input
Power-on-reset cell detects low supply voltage
Arbitrary power supply sequencing permitted
8-bit ADC and DAC available to applications
Package Options
96-ball LFBGA, 10 x 10 x 1.4mm, 0.8mm pitch
DSP Co-Processor
32MIPs, 24-bit fixed point DSP core
Single cycle MAC; 24 x 24-bit multiply and 56-bit
accumulator
32-bit instruction word, dual 24-bit data memory
4Kword program memory, 2 x 8Kword data
memory
Flexible interfaces to BlueCore3 subsystem
Baseband and Software
Internal 8Mbit Flash for complete system solution
Internal 32Kbyte RAM, allows full speed data
transfer, mixed voice and data, and full piconet
operation
Logic for forward error correction, header error
control, access code correlation, CRC,
demodulation, encryption bit stream generation,
whitening and transmit pulse shaping
Transcoders for A-law, µ-law and linear voice from
host and A-law, µ-law and CVSD voice over air
Physical Interfaces
Synchronous serial interface up to 4Mbaud for
system debugging
UART interface with programmable baud rate up to
1.5Mbaud with an optional bypass mode
Full speed USB v1.1 interface supports OHCI and
UHCI host interfaces
Stereo serial audio interface supporting PCM, I2S
and SPDIF formats
Optional I2C™ compatible interface
Stereo Audio CODEC
16-bit resolution, standard sample rates of 8kHz,
11.025kHz, 16kHz, 22.05kHz, 32kHz, 44.1kHz and
48kHz
Dual ADC and DAC for stereo audio
Integrated amplifiers for driving microphone and
speakers with minimum external components
Compatible with DSP co-processor
Bluetooth Stack
CSR’s Bluetooth Protocol Stack runs on the on-chip
MCU in a variety of configurations:
Standard HCI (UART or USB)
Fully embedded RFCOMM
Customised builds with embedded application code
Device Pinout Diagram with 10 x 10 LFBGA Package
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2 Device Pinout Diagram with 10 x 10 LFBGA Package
Orientation from top of device
A
B
C
D
E
F
G
H
J
K
L
123
4567891011
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11
D1 D2 D3 D9 D10 D11
E1 E2 E3 E9 E10 E11
F1 F2 F3 F9 F10 F11
G1 G2 G3 G9 G10 G11
H1 H2 H3 H9 H10 H11
J1 J2 J3 J4 J5 J6 J7 J8 J9 J10 J11
K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11
L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11
Figure 2.1: BC358239A BlueCore3-Multimedia Device Pinout
Device Terminal Functions
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_äìÉ`çêÉ»PJjìäíáãÉÇá~ Product Data Sheet
3 Device Terminal Functions
Radio Ball Pad Type Description
RF_IN D2 Analogue Single ended receiver input
PIO[0]/RXEN
D3 Bi-directional with
programmable strength internal
pull-up/down
Control output for external LNA (if fitted)
PIO[1]/TXEN
C4 Bi-directional with
programmable strength internal
pull-up/down
Control output for external PA (If fitted for
Class 1)
BAL_MATCH A1 Analogue Tie to VSS_RADIO
RF_CONNECT B1 Analogue 50Ω RF matched I/O
AUX_DAC C2 Analogue Voltage DAC output
Synthesiser and
Oscillator Ball Pad Type Description
XTAL_IN L3 Analogue For crystal or external clock input
XTAL_OUT L4 Analogue Drive for crystal
PCM Interface Ball Pad Type Description
PCM_OUT G10
CMOS output, tri-state, with
weak internal pull-down Synchronous data output
PCM_IN H11
CMOS input, with weak internal
pull-down Synchronous data input
PCM_SYNC G11
Bi-directional with weak internal
pull-down Synchronous data sync
PCM_CLK H10
Bi-directional with weak internal
pull-down Synchronous data clock
USB and UART Ball Pad Type Description
UART_TX J10
CMOS output, tri-state, with
weak internal pull-up UART data output active high
UART_RX J11
CMOS input with weak internal
pull-down UART data input active high
UART_RTS L11
CMOS output, tri-state, with
weak internal pull-up UART request to send active low
UART_CTS K11
CMOS input with weak internal
pull-down UART clear to send active low
USB_DP L9 Bi-directional USB data plus with selectable internal
1.5kΩ pull-up resistor
USB_DN L8 Bi-directional USB data minus
Device Terminal Functions
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Test and Debug Ball Pad Type Description
RESET F9
CMOS input with weak internal
pull-down
Reset if high. Input debounced so must
be high for >5ms to cause a reset
RESETB G9
CMOS input with weak internal
pull-up
Reset if low. Input debounced so must be
low for >5ms to cause a reset
SPI_CSB C10
CMOS input with weak internal
pull-up
Chip select for Synchronous Serial
Interface active low
SPI_CLK D10
CMOS input with weak internal
pull-down Serial Peripheral Interface clock
SPI_MOSI D11
CMOS input with weak internal
pull-down Serial Peripheral Interface data input
SPI_MISO C11
CMOS output, tri-state, with
weak internal pull-down Serial Peripheral Interface data output
TEST_EN E9
CMOS input with strong internal
pull-down
For test purposes only (leave
unconnected)
PIO Port Ball Pad Type Description
PIO[2]/CLK_REQ C3
Bi-directional with
programmable strength internal
pull-up/down
PIO or external clock request
PIO[3]/USB_WAKE_UP/
HOST_CLK_REQ B2
Bi-directional with
programmable strength internal
pull-up/down
PIO or output goes high to wake up PC
when in USB mode or clock request input
from host controller
PIO[4]/USB_ON/
UART_TX(1) H9
Bi-directional with
programmable strength internal
pull-up/down
PIO or USB on (input senses when VBUS
is high, wakes BlueCore3-Multimedia)
PIO[5]/USB_DETACH/
UART_RTS(1) J9
Bi-directional with
programmable strength internal
pull-up/down
PIO line or chip detaches from USB when
this input is high
PIO[6]/CLK_REQ/
UART_CTS(1) K8
Bi-directional with
programmable strength internal
pull-up/down
PIO line or clock request output to enable
external clock for external clock line
PIO[7]/UART_RX(1)/
CLK_OUT K9
Bi-directional with
programmable strength internal
pull-up/down
Programmable input/output line or
programmable frequency clock output
PIO[8] B3
Bi-directional with
programmable strength internal
pull-up/down
Programmable input/output line
PIO[9] B4
Bi-directional with
programmable strength internal
pull-up/down
Programmable input/output line
PIO[10] A4
Bi-directional with
programmable strength internal
pull-up/down
Programmable input/output line
PIO[11] A5
Bi-directional with
programmable strength internal
pull-up/down
Programmable input/output line
AIO[0] K5 Bi-directional Programmable input/output line
AIO[1] J7 Bi-directional Programmable input/output line
AIO[2] K7 Bi-directional Programmable input/output line
AIO[3] J8 Bi-directional Programmable input/output line
Device Terminal Functions
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CODEC Ball Pad Type Description
AUDIO_IN_P_LEFT L1 Analogue Microphone input positive (left side)
AUDIO_IN_N_LEFT L2 Analogue Microphone input negative (left side)
AUDIO_IN_P_RIGHT K2 Analogue Microphone input positive (right side)
AUDIO_IN_N_RIGHT K3 Analogue Microphone input negative (right side)
AUDIO_OUT_P_LEFT J6 Analogue Speaker output positive (left side)
AUDIO_OUT_N_LEFT J5 Analogue Speaker output negative (left side)
AUDIO_OUT_P_RIGHT J4 Analogue Speaker output positive (right side)
AUDIO_OUT_N_RIGHT J3 Analogue Speaker output negative (right side)
Device Terminal Functions
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_äìÉ`çêÉ»PJjìäíáãÉÇá~ Product Data Sheet
Power Supplies and
Control
Ball Pad Type Description
VREG_IN L7 VDD / Regulator input Linear regulator input
VDD_USB L10 VDD Positive supply for UART/USB ports
VDD_PIO A3 VDD Positive supply for PIO and AUX DAC(2)
VDD_PADS E11 VDD Positive supply for all other digital
Input/Output ports (3)
VDD_CORE
F11,
C7,
L6
VDD Positive supply for internal digital circuitry
VDD_RADIO E3 VDD / Regulator sense Positive supply for RF circuitry
VDD_LO J2 VDD Positive supply for local oscillator circuitry
VDD_ANA L5 VDD / Regulator output Positive supply for analogue circuitry and
1.8V regulated output
VDD_BAL F1 VDD Positive supply for balun
VDD_MEM
C8,
B11,
K6
VDD Positive supply for internal memory, AIO and
extended PIO ports
VSS_PADS
D9,
E10,
K10
VSS Ground connections for input/output
VSS_CORE F10,
C6 VSS Ground connection for internal digital
circuitry
VSS_RADIO
E2,
F3,
G2
VSS Ground connections for RF circuitry
VSS_LO G3,
H3 VSS Ground connections for local oscillator
VSS_ANA K4 VSS Ground connections for analogue circuitry
VSS C9 VSS Ground connection for internal package
shield
VSS_PIO A2 VSS Ground connection for PIO and AUX DAC
VSS_BAL G1 VSS Ground connection for balun
VSS_MEM C5 VSS Ground connection for internal memory, AIO
and extended PIO ports
VSS_RF J1,
K1 VSS Ground connection for RF circuitry
Notes:
(1) Transparent UART port maps directly to main UART port
(2) Positive supply for PIO[3:0] and PIO[11:8]
(3) Positive supply for SPI/PCM ports and PIO[7:4]
Ball Description
Unconnected
Terminals A6, A7, A8, A9, A10, A11, B5, B6, B7,
B8, B9, B10, C1, D1, E1, F2, H1, H2 Leave unconnected
Electrical Characteristics
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4 Electrical Characteristics
Absolute Maximum Ratings
Rating Min Max
Storage Temperature -40°C +150°C
Supply Voltage: VDD_RADIO, VDD_VCO, VDD_ANA,
VDD_CORE, VDD_BAL -0.4V 2.2V
Supply Voltage: VDD_PADS, VDD_PIO, VDD_USB -0.4V 3.7V
Supply Voltage: VREG_IN -0.4V 5.4V
Other Terminal Voltages VSS-0.4V VDD+0.4V
Recommended Operating Conditions
Operating Condition Min Max
Operating Temperature Range -40°C +105°C
Guaranteed RF performance range (1) -25°C +85°C
Supply Voltage: VDD_RADIO, VDD_VCO, VDD_ANA,
VDD_CORE, VDD_BAL 1.7V 1.9V
Supply Voltage: VDD_PADS, VDD_PIO, VDD_USB 1.7V 3.6V
Supply Voltage: VREG_IN 2.2V 4.2V
Note:
(1) Typical figures are given for RF performance between -40°C and +105°C
Electrical Characteristics
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Input/Output Terminal Characteristics(1)
Linear Regulator Min Typ Max Unit
Normal Operation
Output Voltage (Iload = 70 mA) 1.70 1.78 1.85 V
Temperature Coefficient -250 - +250 ppm/C
Output Noise(2)(3) - - 1 mV rms
Load Regulation (Iload < 100 mA) - - 50 mV/A
Settling Time(2)(4) - - 50
µs
Line Regulation(2)(5) -20 - - dB
Maximum Output Current 140 - - mA
Minimum Load Current 5 - - µA
Input Voltage - - 4.2 V
Dropout Voltage (Iload = 70 mA) - - 350 mV
Quiescent Current (excluding Ioad, Iload < 1mA) 25 35 50 µA
Low Power Mode(6) Min Typ Max Unit
Quiescent Current (excluding Ioad, Iload < 100mA) 4 7 10 µA
Disabled Mode(7) Min Typ Max Unit
Quiescent Current 1.5 2.5 3.5 µA
Notes:
(1) These parameters guaranteed for 2.2 to 3.6V. Between 3.6V and 4.2V the output voltage is not
guaranteed to remain below 1.85V but full functionality of the IC will be preserved and no change will
ensue.
(2) Regulator output connected to 47nF pure and 4.7µF 2.2Ω ESR capacitors.
(3) Frequency range 100Hz to 100kHz.
(4) 1mA to 70mA pulsed load.
(5) Frequency range 100Hz to 10MHz.
(6) Low power mode is entered and exited automatically when the chip enters/leaves Deep Sleep mode.
(7) Regulator is disabled when VREG_IN is either open circuit or driven to the same voltage as VDD_ANA.
Electrical Characteristics
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Input/Output Terminal Characteristics (Continued)
Digital Terminals Min Typ Max Unit
Input Voltage Levels
VIL input logic level low 2.7V ≤ VDD ≤ 3.0V -0.4 - +0.8 V
1.7V ≤ VDD ≤ 1.9V -0.4 - +0.4 V
VIH input logic level high 0.7VDD - VDD+0.4 V
Output Voltage Levels
VOL output logic level low,
(lO = 4.0mA), 2.7V ≤ VDD ≤ 3.0V - - 0.2 V
VOL output logic level low,
(lO = 4.0mA), 1.7V ≤ VDD ≤ 1.9V - - 0.4 V
VOH output logic level high,
(lO = -4.0mA), 2.7V ≤ VDD ≤ 3.0V VDD-0.2 - - V
VOH output logic level high,
(lO = -4.0mA), 1.7V ≤ VDD ≤ 1.9V VDD-0.4 - - V
Input and Tri-state Current with:
Strong pull-up -100 -40 -10
µA
Strong pull-down +10 +40 +100
µA
Weak pull-up -5 -1 0
µA
Weak pull-down 0 +1 +5
µA
I/O pad leakage current -1 0 +1
µA
CI Input Capacitance 1.0 - 5.0 pF
Input/Output Terminal Characteristics (Continued)
USB Terminals Min Typ Max Unit
VDD_USB for correct USB operation 3.1 3.6 V
Input threshold
VIL input logic level low - - 0.3VDD_USB V
VIH input logic level high 0.7VDD_USB - - V
Input leakage current
VSS_PADS< VIN< VDD_USB(1) -1 1 5
µA
CI Input capacitance 2.5 - 10.0 pF
Output Voltage levels
To correctly terminated USB Cable
VOL output logic level low 0.0 - 0.2 V
VOH output logic level high 2.8 - VDD_USB V
Input/Output Terminal Characteristics (Continued)
Power-on reset Min Typ Max Unit
VDD_CORE falling threshold 1.40 1.50 1.60 V
VDD_CORE rising threshold 1.50 1.60 1.70 V
Hysteresis 0.05 0.10 0.15 V
Electrical Characteristics
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Input/Output Terminal Characteristics (Continued)
Auxiliary DAC, 8-Bit Resolution Min Typ Max Unit
Resolution - - 8 Bits
Average output step size(2) 12.5 14.5 17.0 mV
Output Voltage monotonic(2)
Voltage range (IO=0mA) VSS_PADS - VDD_PIO V
Current range -10.0 - +0.1 mA
Minimum output voltage (IO=100mA) 0.0 - 0.2 V
Maximum output voltage (IO=10mA) VDD_PIO-0.3 - VDD_PIO V
High Impedance leakage current -1 - +1
µA
Offset -220 - +120 mV
Integral non-linearity(2) -2 - +2 LSB
Starting time (50pF load) - - 10
µs
Settling time (50pF load) - - 5
µs
Input/Output Terminal Characteristics (Continued)
Crystal Oscillator Min Typ Max Unit
Crystal frequency(3)(6) 8.0 - 32.0 MHz
Digital trim range(4) 5.0 6.2 8.0 pF
Trim step size(4) - 0.1 - pF
Transconductance 2.0 - - mS
Negative resistance(5) 870 1500 2400
Ω
External Clock Min Typ Max Unit
Input frequency(6) 7.5 - 40.0 MHz
Clock input level(7) 0.2 - VDD_ANA V pk-pk
Phase noise (at zero crossing) - - 15 ps rms
XTAL_IN input impedance - - - kΩ
XTAL_IN input capacitance - 7 - pF
Electrical Characteristics
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Input/Output Terminal Characteristics (Continued)
Stereo Audio CODEC, 16-Bit Resolution Min Typ Max Unit
Input Stage/Microphone Amplifier
Input full scale at maximum gain - 4 - mV rms
Input full scale at minimum gain - 400 - mV rms
Gain resolution - 3 - dB
Distortion at 1kHz - -74 dB
Input referenced rms noise - 5 - µV rms
Bandwidth - 17 - kHz
Input impedance - 20 - kΩ
SNR (microphone input) at maximum gain - >60 - dBc
Analogue to Digital Converter
Number of channels - - 2
Resolution - - 16 bits
Input sample rate 8 - 32(8) kHz
Signal to (Noise + Distortion) with 1kHz tone, Full
scale and 0 - Fsample /2
Fsample = 8 kHz - 84 - dB
Fsample = 11.025 kHz - 83 - dB
Fsample = 16 kHz - 84 - dB
Fsample = 22.050 kHz - 83 - dB
Fsample = 32 kHz - 80 - dB
Fsample = 44.1 kHz - 74 - dB
Digital Gain -24 21.5 dB
Digital to Analogue Converter
Number of channels - - 2
Resolution - - 16 bits
Output sample rate 8 - 48 kHz
Gain Resolution - 3 - dB
Signal to (Noise + Distortion) with 1kHz tone, Full
scale and 0 – 20 kHz
Fsample = 8 kHz - 79 - dB
Fsample = 11.025 kHz - 78 - dB
Fsample = 16 kHz - 79 - dB
Fsample = 22.050 kHz - 88 - dB
Fsample = 32 kHz - 90 - dB
Fsample = 44.1 kHz - 90 - dB
Fsample = 48 kHz - 89 - dB
Digital Gain -24 - 21.5 dB
Electrical Characteristics
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Input/Output Terminal Characteristics (Continued)
Output Stage/Loudspeaker Driver Min Typ Max Unit
Output power into 100Ω - 10 - mW
Output voltage full scale swing - 2.0 - V pk-pk
Output current drive (at full scale swing)(9) 10 20 40 mA
Output full scale current (at reduced swing)(9) - 75 - mA
Gain bandwidth - 1 - MHz
Distortion and noise (relative to full scale), THD - -75 - dBc
Allowed Load: resistive 8 - O.C. Ω
Allowed Load: capacitive - 500 - pF
Notes:
VDD_CORE, VDD_RADIO, VDD_LO and VDD_ANA are at 1.8V unless shown otherwise
VDD_PADS, VDD_PIO and VDD_USB are at 3.0V unless shown otherwise
The same setting of the digital trim is applied to both XTAL_IN and XTAL_OUT.
Current drawn into a pin is defined as positive, current supplied out of a pin is defined as negative.
(1) Internal USB pull-up disabled
(2) Specified for an output voltage between 0.2V and VDD_PIO -0.2V
(3) Integer multiple of 250kHz
(4) The difference between the internal capacitance at minimum and maximum settings of the internal
digital trim
(5) XTAL frequency = 16MHz; XTAL C0 = 0.75pF; XTAL load capacitance = 8.5pF
(6) Clock input can be any frequency between 8 and 40MHz in steps of 250kHz + CDMA/3G TCXO
frequencies of 7.68, 14.44, 15.36, 16.2, 16.8, 19.2, 19.44, 19.68, 19.8 and 38.4MHz
(7) Clock input can either be sinusoidal or square wave. If the peaks of the signal are below VSS_ANA or
above VDD_ANA a DC blocking capacitor is required between the signal and XTAL_IN
(8) Interpolated to 44.1kHz within DSP
(9) For specified THD, much greater current can be supplied by the loudspeaker driver with compromised
THD
Radio Characteristics
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_äìÉ`çêÉ»PJjìäíáãÉÇá~ Product Data Sheet
5 Radio Characteristics
5.1 Transmitter – Temperature +20°C
Radio Characteristics VDD = 1.8V Temperature = +20°C
Min Typ Max
Bluetooth
Specification Unit
Maximum RF transmit power(1)(2)(3) 3 6.5 - -6 to +4(4) dBm
RF power control range(1)(2) 25 35 -
≥16 dB
RF power range control resolution - 0.5 - - dB
20dB bandwidth for modulated carrier - 820 1000 ≤1000 kHz
Adjacent channel transmit power F=F0 ± 2MHz(5) - -35 -20 ≤-20 dBm
Adjacent channel transmit power F=F0 ± 3MHz(5) - -45 -40 ≤-40 dBm
∆f1avg “Maximum Modulation” 140 165 175 140<f1avg<175 kHz
∆f2max “Minimum Modulation” 115 140 - 115 kHz
∆f1avg/∆f2avg 0.8 0.9 - ≥0.80 -
Initial carrier frequency tolerance - 10 35 ±75 kHz
Drift Rate - 8 20 ≤20 kHz/ 50µs
Drift (single slot packet) - 9 20 ≤25 kHz
Drift (five slot packet) - 10 25 ≤40 kHz
Emissions Frequency
(GHz) Min Typ Max Bluetooth
Specification Unit
0.925-0.960(6) - -143 -138
1.570-1.580(7) - -138 -135
1.805-1.880(6) - -131 -115
1.930-1.990(8) - -135 -125
1.930-1.990(6) - -135 -126
1.930-1.990(9) - -137 -130
2.110-2.170(9) - -132 -122
Emitted power in cellular
bands measured at chip
terminals
Output power ≤4dBm
2.110-2.170(10) - -135 -127
- dBMHz
Notes:
Results shown are referenced to input of the RF balun
(1) Power at the chip pads
(2) Measured according to the Bluetooth specification v1.2
(3) The firmware maintains the transmit power to be within the Bluetooth specification v1.2 limits
(4) Class 2 RF transmit power range, Bluetooth specification v1.2
(5) Measured at F0 = 2441MHz
(6) Integrated in 200kHz bandwidth
(7) Integrated in 1MHz bandwidth
(8) Integrated in 30kHz bandwidth
(9) Integrated in 1.2MHz bandwidth
(10) Integrated in 5MHz bandwidth