RELEASE NOTE RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Introduction This document describes the RZ/A1H CMSIS-RTOS RTX BSP (which is a package hereinafter called the BSP). Contents 1. History of Changes to the Previous Versions .............................................................. 2 2. Package Contents .......................................................................................................... 6 2.1 Software ....................................................................................................................................... 6 2.2 Documents ................................................................................................................................... 6 2.2.1 Manuals .................................................................................................................................. 6 2.2.2 Sample program build procedures ..................................................................................... 7 3. Folder structure ..............................................................................................................8 4. Information about the BSP ............................................................................................ 9 4.1 Software ....................................................................................................................................... 9 4.2 Tools ............................................................................................................................................. 9 4.3 Hardware ...................................................................................................................................... 9 4.4 Operation procedure of Blinky sample program (On-chip RAM Download) ...................... 11 4.4.1 Build Process ...................................................................................................................... 11 4.4.2 Sample program Execution ............................................................................................... 11 4.4.3 Sample program Execution Result ................................................................................... 12 4.5 Operation procedure of Blinky sample program (Serial Flash Boot) .................................. 13 4.5.1 Build Process ...................................................................................................................... 13 4.5.2 Writing in to the Serial Flash ............................................................................................. 13 4.5.3 Sample program Execution ............................................................................................... 13 4.5.4 Sample program Execution Result ................................................................................... 13 4.6 Operation procedure of Blinky sample program (NOR Flash Boot) .................................... 14 4.6.1 Build Process ...................................................................................................................... 14 4.6.2 Writing in to the NOR Flash ............................................................................................... 14 4.6.3 Sample program Execution ............................................................................................... 14 4.6.4 Sample program Execution Result ................................................................................... 14 5. Restrictions .................................................................................................................. 15 6. Precautions................................................................................................................... 16 R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Page 1 of 17 RZ/A1H Group 1. CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) History of Changes to the Previous Versions Ver V2.07 V2.06 No. 1 Type ALL 2 Sample program 3 RIIC 1 ALL 2 RIIC, RSPI 3 Sample program 4 V2.05 Description The defect a build error generates was corrected in the environment that e2studio was installed by the minimum configuration. The defect to which the osKernelSysTick function returns wrong time is corrected. Fixed a bug that the RIIC driver communicates extra 1 byte more than the specify size when the RIIC driver's operation delayed due to high load. The name of the top folder is changed to CMSIS_RTOS_RTX. RIIC and RSPI drivers are corrected for prohibited for doing osThreadTerminate to the thread which is already ended. Build procedure text files moved to README subfolder. Bus setting of SDRAM is corrected. 5 L2 cache setting is reconsidered and the prefetch is changed to Enable. 6 The instruction set and the label type are added to the assembler function declaration. The version of the tool of the software environment has been renewed. The reference destination of stdint.h and stdbool.h was changed to ENV/KPIT/optlibinc folder in the BSP source. Therefore, copy work of header files has been eliminated from the procedure of installation. When all except for 16bit, 32bit has been used for the data word size, a defect with a possibility that channels in left and right is reversed has been corrected. Moved a project folder of all sample programs below the App folder. The SPIBSC boot loader image to which each sample program refers has been changed to common folder Tool/FlashImage. The name of ex1 sample program has been changed to SSIF. The name of Display sample program has been changed to vdc5_vdec. 1 ALL 2 3 SSIF 4 Sample program 5 6 7 R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Remarks Corrected file: .cproject of all projects. Corrected file: RTX_Conf_CM.c of each sample program folder. Corrected file: riic.c, riic_int.c, riic_task.c Corrected file: RZ_A1H_RSK_Init.c of each sample program folder. Corrected file: pl310.c of each sample program folder. Corrected file: initsect.S and lv1cache.S of each sample program folder. Page 2 of 17 RZ/A1H Group 8 CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) TouchPanel sample program has been added. Blinky sample program has been added. The processing which executes LDREX/STREX order to internal RAM in the state of the MMU invalidity at the time of an OS start has been corrected. When an exclusion access order is executed in the state of the MMU invalidity, atomic access occurs directly to the AXI bus, but LSI Internal bus of RZ/A1H is non-correspondence in atomic access. 9 10 11 12 13 Kernel_HW dependence V2.04 1 ALL V2.03 1 ALL 2 DMA 3 IOIF, SCIF 4 RIIC 5 6 SCIF 7 SCUX 8 R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 The defect to which the osKernelSysTick function returns unjust time has been corrected. The frequency different from actual OS timer was set to OS_CLOCK macro of RTX_Conf_CM.c. OS update: CMSIS-RTOS RTX V4.80 When timer interrupt occurred during os_resume function execution, the defect a scheduler of OS suspends has been corrected. RZ_A1H_sflash_boot_init_kpitgcc.x was replaced with a right boot loader image file because an image who does nothing as a boot loader was included. Fixed an issue where it was lacking in a dummy reading procedure of a stand-by control register after module stop release. Fixed an issue which doesn't control exclusion when calling API from an interrupt context. Fixed an issue which doesn't control exclusion when calling free function. Fixed an issue which sometimes makes the restart condition occur twice in case of continuous transfer. Fixed the error return processing in case of continuous transfer. Fixed an issue which forwarded at DMA channel 0, not an unused DMA channel when specified DMA transmission. Fixed an issue which after the initialization release of SRC, head of the data that converted by SRC becomes mute. Fixed an issue which after calling SCUX_IOCTL_SET_FLUSH_STOP, tail of the data that converted by SRC isn't output. Corrected file: system_Renesas_RZ_A1.c and startup_Renesas_RZ_A1.S of a sample program folder. The reference document: RZ/A1H user's manual hardware Rev.2.00 "5.8 AXI Protocol Control Signals" Corrected file: RTX_Conf_CM.c of a sample program folder. Corrected file: OS. See "5.Restrictions" Page 3 of 17 RZ/A1H Group 9 SOUND, RIIC_CH3 10 Sample program 11 Added RIICH_CH3 driver. Changed the RIIC communication of a SOUND driver to a calling of RIIC_CH3 driver. Changed the procedure of flash writing. The procedure which waits for input of "y" before flash writing was eliminated. Fixed heap start address judgement processing. The end symbol in the linker script file was made same as start address of heap. Fixed heap termination address judgement processing. A return value of the _top_of_heap function was corrected in the address of the __heap_end symbol from the SP register value. Fixed an issue which sometimes aborted when copying initial values of global variables. Added a processing which initialize global constructor of C++. The declaration for init_array is being added to the linker script file and a calling of the constructor initialization function is being added to the __libc_init_array function. Changed the file name of the library. Added prefix lib to the file name of the library, and the way of a link was changed to a "-l" option of a linker. A file of a platform and compiler dependence was put in order. The function of the platform and compiler dependence was added to the existence file of CMSIS-RTOS RTX. Moved such function to a GCC folder of sample program. Fixed an issue which aborted when setting OS_RUNPRIV as 0 in RTX_Conf_CM.c in the sample program project folder. A transfer order to the sleep mode in the Idle thread was changed for the processing which considered use of a software stand-by mode. 12 13 14 15 16 17 18 19 CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) Kernel_HW dependence R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Fixed an issue which the following inline assembler function will be the empty function when a compiler was optimized effectively. __set_SP, __get_LR, __set_LR See "4.5.2 Writing in to the Serial Flash" See "4.6.2 Writing in to the NOR Flash" Corrected file: Linker script file of each sample program folder. Corrected file: GCC/newheap.c of each sample program folder Corrected file: Linker script file of a sample program folder. Corrected file: The following file of each sample program folder. Linker script file GCC/cstartup.c Corrected file: .cproject of each sample program folder. Corrected file: system_Renesas_RZ_A1.c of each sample program folder. Corrected file: RTX_Conf_CM.c of each sample program folder. The reference document: RZ/A1H user's manual hardware Rev.2.00 "55.3.1 Sleep Mode" Corrected file: Include/core_caFunc.h Page 4 of 17 RZ/A1H Group 20 Fixed an issue which generated a linker error when the following inline assembler function was used. __enable_fault_irq, __disable_fault_irq OS update: Corresponding to NEON. 21 22 V2.02 1 VDC5(Display) 2 3 Sample program Kernel_HW dependence 4 5 6 7 V2.01a - CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) - R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 OS update: Corresponding to Tick-less operation. Update the version of RZ/A1H Group Video Display Controller 5 Driver, in Ver.1.00 Support NOR flash boot (ULINK2 write) Fixed an issue where not waiting for a status change after L2 cache operation Fixed an issue where a data abort error occurs when interrupt ID is 1022 or 1023 Add restrictions (No.1, No.2) Fixed an issue where use register s0-s3 of VFP instead of general r0-r3 when set option "-mfloat-abi=hard" in compiler. Fixed an issue where not replace the stack size of main thread changed OS_MAINSTKSIZE in RTX_Conf_CM.c. new Corrected file: Include/core_caFunc.h Corrected file: OS and system_Renesas_RZ_A1.c of a sample program folder. Corrected file: OS. See "5.Restrictions" Page 5 of 17 RZ/A1H Group 2. CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) Package Contents This package contains the following items: 2.1 No. 1 2.2 2.2.1 Software Name A set of BSP source codes Folder name BSP Documents Manuals No. Title 1 RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) release note 2 Video Display Controller 5 Driver User's Manual 1.00 3 Digital Video Decoder Driver User's Manual 1.00 4 RZ/A1 Group CMSIS-RTOS RTX Expansion Guide RZ/A1H CMSIS-RTOS RTX BSP IOIF Application Note RZ/A1H CMSIS-RTOS RTX BSP VDC5 (Display) sample program Application Note RZ/A1H CMSIS-RTOS RTX BSP SOUND Driver Application Note RZ/A1H CMSIS-RTOS RTX BSP potentiometer sample program Application Note RZ/A1H CMSIS-RTOS RTX BSP RIIC CH3 Driver Application Note RZ/A1H CMSIS-RTOS RTX BSP TouchPanel sample program Application Note RZ/A1H CMSIS-RTOS RTX BSP ADC Driver Application Note RZ/A1H CMSIS-RTOS RTX BSP DMA Driver Application Note RZ/A1H CMSIS-RTOS RTX BSP (Kernel HW part) KPIT GCC Application Note RZ/A1H CMSIS-RTOS RTX BSP RIIC Driver Application Note RZ/A1H CMSIS-RTOS RTX BSP RSPI Driver Application Note RZ/A1H CMSIS-RTOS RTX BSP SCIF Driver Application Note RZ/A1H CMSIS-RTOS RTX BSP SCUX Driver Application Note RZ/A1H CMSIS-RTOS RTX BSP SSIF Driver Application Note 1.03 5 6 7 8 9 10 11 12 13 14 15 16 17 18 R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Revision No. 2.07 1.03 1.04 1.05 1.04 1.04 1.01 1.04 1.05 1.04 1.05 1.05 1.05 1.05 1.05 File name [J] r01an3104jj0207-rza1h.pdf [E] r01an3104ej0207-rza1h.pdf (this document) [J] r01an1822jj0100_rza1h.pdf [E] r01an1822ej0100_rza1h.pdf [J] r01an1823jj0100_rza1h.pdf [E] r01an1823ej0100_rza1h.pdf [J] r01an2520jj0103-rza1h.pdf [E] r01an2520ej0103-rza1h.pdf [J] r01an2521jj0103-rza1h.pdf [E] r01an2521ej0103-rza1h.pdf [J] r01an2523jj0104-rza1h.pdf [E] r01an2523ej0104-rza1h.pdf [J] r01an2524jj0105-rza1h.pdf [E] r01an2524ej0105-rza1h.pdf [J] r01an2525jj0104-rza1h.pdf [E] r01an2525ej0104-rza1h.pdf [J] r01an2641jj0104-rza1h.pdf [E] r01an2641ej0104-rza1h.pdf [J] r01an3179jj0101-rza1h.pdf [E] r01an3179ej0101-rza1h.pdf [J] r01an3712jj0104-rza1h.pdf [E] r01an3712ej0104-rza1h.pdf [J] r01an3713jj0105-rza1h.pdf [E] r01an3713ej0105-rza1h.pdf [J] r01an3714jj0104-rza1h.pdf [E] r01an3714ej0104-rza1h.pdf [J] r01an3715jj0105-rza1h.pdf [E] r01an3715ej0105-rza1h.pdf [J] r01an3716jj0105-rza1h.pdf [E] r01an3716ej0105-rza1h.pdf [J] r01an3717jj0105-rza1h.pdf [E] r01an3717ej0105-rza1h.pdf [J] r01an3718jj0105-rza1h.pdf [E] r01an3718ej0105-rza1h.pdf [J] r01an3720jj0105-rza1h.pdf [E] r01an3720ej0105-rza1h.pdf Page 6 of 17 RZ/A1H Group 2.2.2 No. CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) Sample program build procedures 1 Sample program name Blinky 2 SSIF 3 Potentiometer 4 SCUX 5 VDC5_VDEC 6 TouchPanel File name Storage destination [J] gcc_jp_buildstep_ram.txt, gcc_jp_buildstep_nor.txt, gcc_jp_buildstep_spi.txt [E] gcc_en_buildstep_ram.txt, gcc_en_buildstep_nor.txt, gcc_en_buildstep_spi.txt App\Blinky\sample1\README [J] gcc_jp_buildstep_ram.txt, gcc_jp_buildstep_nor.txt, gcc_jp_buildstep_spi.txt [E] gcc_en_buildstep_ram.txt, gcc_en_buildstep_nor.txt, gcc_en_buildstep_spi.txt App\SSIF\sample1\README [J] gcc_jp_buildstep_ram.txt, gcc_jp_buildstep_nor.txt, gcc_jp_buildstep_spi.txt [E] gcc_en_buildstep_ram.txt, gcc_en_buildstep_nor.txt, gcc_en_buildstep_spi.txt App\ADC\sample1\README [J] gcc_jp_buildstep_ram.txt, gcc_jp_buildstep_nor.txt, gcc_jp_buildstep_spi.txt [E] gcc_en_buildstep_ram.txt, gcc_en_buildstep_nor.txt, gcc_en_buildstep_spi.txt App\SCUX\sample1\README [J] gcc_jp_buildstep_ram.txt, gcc_jp_buildstep_nor.txt, gcc_jp_buildstep_spi.txt [E] gcc_en_buildstep_ram.txt, gcc_en_buildstep_nor.txt, gcc_en_buildstep_spi.txt App\vdc5_vdec\sample1\README [J] gcc_jp_buildstep_ram.txt, gcc_jp_buildstep_nor.txt, gcc_jp_buildstep_spi.txt [E] gcc_en_buildstep_ram.txt, gcc_en_buildstep_nor.txt, gcc_en_buildstep_spi.txt App\TouchPanel\sample1\README R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Page 7 of 17 RZ/A1H Group 3. CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) Folder structure Below is the folder structure of this package. Top +-- Documentation | +-- ReleaseNote | +-- Specification +-- Software +-- BSP +-- App | | .project | +-- ADC | | +-- sample1 | +-- Blinky | | +-- sample1 | +-- inc | +-- lib | +-- SCUX | | +-- sample1 | +-- SSIF | | +-- sample1 | +-- TouchPanel | | +-- lib | | +-- sample1 | +-- vdc5_vdec | +-- lib | +-- sample1 +-- CMSIS_RTOS_RTX | | .project | +-- Include | +-- RTOS | +-- RTX | +-- Boards | | +-- Renesas | | +--RZ_A1H_RSK | | +-- INC | | +-- iodefines | | +-- RenesasBSP | | | version.txt | | +-- drv_inc | | +-- drv_lib | | +-- drv_src | | +-- adc | | +-- dma | | +-- ioif | | +-- riic | | +-- riic_ch3 | | +-- rspi | | +-- scif | | +-- scux | | +-- sound | | +-- ssif | | +-- vdc5_vdec | +-- INC | +-- LIB | +-- SRC +-- ENV | | .project | +-- KPIT | +-- optlibinc +-- Tool +-- FlashImage R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 : Release note : Documents (see Section 1.2.) : BSP source folder : BSP sample program TOP : Main body of the potentiometer sample program : Main body of the Blinky sample program : Common header for the sample programs : Common library for the sample programs : Main body of the SCUX sample program : Main body of the SSIF sample program : TouchPanel sample program driver : Main body of the TouchPanel sample program : vdc5_vdec sample program driver : Main body of the vdc5_vdec sample program : : : : : : Common header Chip dependence header BSP driver BSP version information Driver header Driver library : : : : : : : : : : : : : : ADC driver DMA driver IOIF RIIC driver RIIC CH3 driver RSPI driver SCIF driver SCUX driver SOUND driver SSIF driver VDC5 & VDEC driver OS header OS library Main body of the OS : KPIT GCC optlib library additional files : Binary file of the boot loader for SPIBSC boot Page 8 of 17 RZ/A1H Group 4. CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) Information about the BSP The requirements for using the BSP source codes are as follows. 4.1 Software * Base OS RTX for Cortex-A9 (8th June 2016) * Drivers IOIF, DMA, SCIF, SSIF, RSPI, RIIC, RIIC_CH3, ADC, SCUX, SOUND, VDC5_VDEC * Sample programs Blinky, SSIF, Potentiometer, SCUX, VDC5_VDEC, TouchPanel 4.2 Tools * Build environment IDE e2studio (Version: 5.3.0.023) development tools Renesas ARM-NONE Toolchain v16.01 * Execution environment Segger J-Link ARM6.10n 4.3 Hardware * Device RZ/A1H * Target board Board name Renesas Starter Kit+ for RZ/A1H (YR0K77210S003BE) Operation mode Clock in = 13.33 MHz, CKIO = 66.67 MHz I Clock = 400.00 MHz G Clock = 266.66 MHz B Clock = 133.33 MHz P1 Clock = 66.67 MHz P0 Clock = 33.33 MHz * Setup method *For information about the positions of the jumpers and switches, refer to "RZ/A1H Group Renesas Starter Kit+ User's Manual For e2studio" of the Target Board Package. Table 1 Connector Hookup Part No. CN20 CN18 CN14 CN5 Connected equipment Speaker (headset) USB serial cable JTAG cable AC adapter R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Page 9 of 17 RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) Table 2 Debug Serial Port Settings Baud rate Character length Parity Stop bit Flow control Line feed code 115200 8 bits None 1 bit None CR Table 3 Target Board Jumper Settings Jumper JP11 JP12 JP18 JP21 PWR SEL Setting Boot mode 0 1-2 1-2 1-2 1-2 2-3 Boot mode 3 1-2 1-2 1-2 1-2 2-3 Table 4 Target Board Switch Settings (SW4) DIP switch SW4-1 SW4-2 SW4-3 SW4-4 SW4-5 SW4-6 SW4-7 SW4-8 Setting Boot mode 0 OFF OFF OFF OFF OFF OFF OFF OFF Boot mode 3 OFF OFF OFF OFF OFF OFF OFF OFF Table 5 Target Board Switch Settings (SW6) DIP switch SW6-1 SW6-2 SW6-3 SW6-4 SW6-5 SW6-6 Setting Boot mode 0 ON ON ON ON ON ON R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Boot mode 3 OFF ON OFF ON ON ON Page 10 of 17 RZ/A1H Group 4.4 4.4.1 CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) Operation procedure of Blinky sample program (On-chip RAM Download) Build Process 1. Create a new e2studio workspace*1 A) Create a work folder*2 in an arbitrary position. (You can decide the folder name freely) B) Copy the source files (all the file groups under the BSP source folder) to the folder created in step A) e.g.) The folder structure when making the work folder "C:\Workspace" C: Workspace App CMSIS_RTOS_RTX ENV Tool C) Start e2studio D) Select the [File] menu --> [Switch Workspace] --> [Other...]. E) Click [Browse...] in the [Workspace Launcher] dialog box. F) Select the folder crated in step A). Then, click [OK]. G) e2studio automatically restarts and the [Welcome to e2studio] screen appears. H) Close the [Welcome to e2studio] screen. *1: Even if there is an existing workspace, be sure to create a new one instead of using the existing workspace. *2: Be sure to create a work folder in the place near the route of a drive so that the number restrictions of characters of the pathname of Windows (260 characters) may not be exceeded. 2. Select the [Window] menu --> [Show View] --> [Project Explorer]. 3. Right-click the [Project Explorer] view and select [Import...]. 4. In the [Select an import source] of [Import] dialog box, select [General] --> [Existing Projects into Workspace]. Then, click the [Next] button. 5. In the [Import] dialog box, check [Select root directory] and then click [Browse...]. 6. In the [Reference Folder] dialog box, select the source-file copy destination (folder name created in step 1-A)) and then click [OK]. 7. Check the [Search for nested projects] in the [Import] dialog box. 8. Remove the check mark from [Copy projects into workspace] in the [Import] dialog box. 9. Click [Finish] in the [Import] dialog box. 10. Right-click the "Blinky_smp1" project displayed in the [Project Explorer] view. Then, select [Clean Project]. 11. Right-click like step 10 and then click [Build Project]. The file below is created. App\Blinky\sample1\HardwareDebug\Blinky_smp1.x 4.4.2 Sample program Execution * The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for boot mode 0. * Before executing this step, create an executable file for the Blinky sample program (by referring to Section 3.4.1 Build Process). * Before executing this step, you must do setup the "RSK USB Serial Port" on PC with "5.16 USB Serial Port" of RZ/A1H Group Renesas Starter Kit+ User's Manual * Take the steps below while the e2studio Debug perspective is displayed. R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Page 11 of 17 RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) 1. 2. 3. 4. 5. Connect j-Link to CN14 of a CPU board and USB connector of the PC. Connect PC to CN18 of a CPU board by USB serial cable. Start e2studio. Select [Run] menu --> [Debug Configurations...]. Select [Blinky_smp1 HardwareDebug] in the "Renesas GDB Hardware Debugging" list in the [Debug Configurations] dialog box. Then, click [Debug]. (The target board and e2studio are connected and the downloading of the executable file begins.) 6. Click [Resume] button (green playback mark) twice in the [Debug Control] view. 4.4.3 Sample program Execution Result When execution of a sample program is begun, LED0 flashes on and off. R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Page 12 of 17 RZ/A1H Group 4.5 4.5.1 CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) Operation procedure of Blinky sample program (Serial Flash Boot) Build Process 1. 2. 3. 4. 5. Perform steps 1 through 10 described in Section 4.4.1. Right-click the "Blinky_smp1" project displayed in the [Project Explorer] view. Then, select [Properties]. Select [Settings] for [C/C++ Build] in the [Properties] dialog box. In the [Tool Settings] tab, select [Linker] --> [Other]. Edit [File] entry, set the path below. "${ProjDirPath}/${ProjName}_sflashboot.ld" 6. Right-click the "Blinky_smp1" project displayed in the [Project Explorer] view. Then, select [Clean Project]. 7. Right-click like step 6 and then click [Build Project]. 4.5.2 Writing in to the Serial Flash * The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for boot mode 3. * Before executing this step, create an executable file for the Blinky sample program (by referring to Section 3.5.1 Build Process). * Take the steps below while the e2studio Debug perspective is displayed. 1. 2. 3. 4. Connect j-Link to CN14 of a CPU board and USB connector of the PC. Start e2studio. Select [Run] menu --> [Debug Configurations...]. Select [Blinky_smp1_sflash HardwareDebug] in the "Renesas GDB Hardware Debugging" list in the [Debug Configurations] dialog box. Then, click [Debug]. (The target board and e2studio are connected and the downloading of the executable file begins.) 5. Right-click [Download] button in the [Debug] view. Then, select "RZ_A1H_sflash_boot_init_kpitgcc.x". 6. Right-click [Blinky_smp1_sflash HardwareDebug] in the [Debug] view. Then, select [Terminate]. (The target board and e2studio are disconnected.) 7. Power off the target board. 4.5.3 Sample program Execution * The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for boot mode 3. * Before executing this step, you must do setup the "RSK USB Serial Port" on PC with "5.16 USB Serial Port" of RZ/A1H Group Renesas Starter Kit+ User's Manual 1. Connect PC to CN18 of a CPU board by USB serial cable. 2. Power on the target board. 4.5.4 Sample program Execution Result When execution of a sample program is begun, LED0 flashes on and off. R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Page 13 of 17 RZ/A1H Group 4.6 4.6.1 CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) Operation procedure of Blinky sample program (NOR Flash Boot) Build Process 1. 2. 3. 4. 5. Perform steps 1 through 10 described in Section 4.4.1. Right-click the "Blinky_smp1" project displayed in the [Project Explorer] view. Then, select [Properties]. Select [Settings] for [C/C++ Build] in the [Properties] dialog box. In the [Tool Settings] tab, select [Linker] --> [Other]. Edit [File] entry, set the path below. "${ProjDirPath}/${ProjName}_nflashboot.ld" 6. Right-click the "Blinky_smp1" project displayed in the [Project Explorer] view. Then, select [Clean Project]. 7. Right-click like step 6 and then click [Build Project]. 4.6.2 Writing in to the NOR Flash * The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for boot mode 0. * Before executing this step, create an executable file for the Blinky sample program (by referring to Section 4.6.1 Build Process). * Take the steps below while the e2studio Debug perspective is displayed. 1. 2. 3. 4. Connect j-Link to CN14 of a CPU board and USB connector of the PC. Start e2studio. Select [Run] menu --> [Debug Configurations...]. Select [Blinky_smp1_nflash HardwareDebug] in the "Renesas GDB Hardware Debugging" list in the [Debug Configurations] dialog box. Then, click [Debug]. (The target board and e2studio are connected and the downloading of the executable file begins.) 5. Right-click [Blinky_smp1_nflash HardwareDebug] in the [Debug] view. Then, select [Terminate]. (The target board and e2studio are disconnected.) 6. Power off the target board. 4.6.3 Sample program Execution * The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for boot mode 0. * Before executing this step, you must do setup the "RSK USB Serial Port" on PC with "5.16 USB Serial Port" of RZ/A1H Group Renesas Starter Kit+ User's Manual 1. Connect PC to CN18 of a CPU board by USB serial cable. 2. Power on the target board. 4.6.4 Sample program Execution Result When execution of a sample program is begun, LED0 flashes on and off. R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Page 14 of 17 RZ/A1H Group 5. No. 1 CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) Restrictions Type Standard C library Precaution The KPIT GNU Tools GNUARM-NONE's Standard C library is non-correspondence in multi-threading. When execute the library function at the same time from more than one threads, a processing result is unsettled. When using the library function which operates the heap such as malloc, calloc, realloc and etc., please execute in the state of the interrupt disabled to prevent a thread change. R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Page 15 of 17 RZ/A1H Group 6. No. 1 2 CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) Precautions Type Kernel_HW dependence SCUX, SSIF Precaution Both the debug serial port (printf output destination) and the SCIF driver's channel 2 use the same port. Note that opening channel 2 results in contention. If an SSIF channel is selected as the output destination with the SCUX driver, opening this channel with the SSIF driver results in contention. Thus, use exclusive mode for channel access. R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Page 16 of 17 RZ/A1H Group CMSIS-RTOS RTX BSP V2.07 (e2studio / KPITGCC) Website and Support Renesas Electronics Website http://www.renesas.com/ Inquiries http://www.renesas.com/contact/ All trademarks and registered trademarks are the property of their respective owners. R01AN3104EJ0207 Rev.2.07 Dec 19, 2017 Page 17 of 17 Revision History Rev. 2.03 2.04 2.05 Date Dec 14, 2015 Feb 19, 2016 Oct 06, 2016 2.06 Mar 17, 2017 Description Page - 2 6-7 2.07 Dec 19, 2017 2 6-7 Summary V2.03 for e2studio is released. Replace an image file of a boot loader. RTX OS has been updated to V4.80. Various defects have been corrected. The folder structure of the BSP source has been changed. The sample programs of Blinky and TouchPanel have been added. The explanation of the sample execution procedure has been changed to the explanation of the Blinky sample program. 1. History of Changes to the Previous Versions Added V2.06 information. 2.2 Documents The document numbers are renewed according to the latest documents. 1. History of Changes to the Previous Versions Added V2.07 information. 2.2 Documents The document numbers are renewed according to the latest documents. General Precautions in the Handling of Microprocessing Unit and Microcontroller Unit Products The following usage notes are applicable to all Microprocessing unit and Microcontroller unit products from Renesas. For detailed usage notes on the products covered by this document, refer to the relevant sections of the document as well as any technical updates that have been issued for the products. 1. Handling of Unused Pins Handle unused pins in accordance with the directions given under Handling of Unused Pins in the manual. The input pins of CMOS products are generally in the high-impedance state. In operation with an unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of LSI, an associated shoot-through current flows internally, and malfunctions occur due to the false recognition of the pin state as an input signal become possible. Unused pins should be handled as described under Handling of Unused Pins in the manual. 2. Processing at Power-on The state of the product is undefined at the moment when power is supplied. The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the moment when power is supplied. In a finished product where the reset signal is applied to the external reset pin, the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed. In a similar way, the states of pins in a product that is reset by an on-chip power-on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified. 3. Prohibition of Access to Reserved Addresses Access to reserved addresses is prohibited. The reserved addresses are provided for the possible future expansion of functions. Do not access these addresses; the correct operation of LSI is not guaranteed if they are accessed. 4. Clock Signals After applying a reset, only release the reset line after the operating clock signal has become stable. When switching the clock signal during program execution, wait until the target clock signal has stabilized. When the clock signal is generated with an external resonator (or from an external oscillator) during a reset, ensure that the reset line is only released after full stabilization of the clock signal. Moreover, when switching to a clock signal produced with an external resonator (or by an external oscillator) while program execution is in progress, wait until the target clock signal is stable. 5. Differences between Products Before changing from one product to another, i.e. to a product with a different part number, confirm that the change will not lead to problems. The characteristics of Microprocessing unit or Microcontroller unit products in the same group but having a different part number may differ in terms of the internal memory capacity, layout pattern, and other factors, which can affect the ranges of electrical characteristics, such as characteristic values, operating margins, immunity to noise, and amount of radiated noise. When changing to a product with a different part number, implement a system-evaluation test for the given product. Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation or any other use of the circuits, software, and information in the design of your product or system. Renesas Electronics disclaims any and all liability for any losses and damages incurred by you or third parties arising from the use of these circuits, software, or information. 2. Renesas Electronics hereby expressly disclaims any warranties against and liability for infringement or any other disputes involving patents, copyrights, or other intellectual property rights of third parties, by or arising from the use of Renesas Electronics products or technical information described in this document, including but not limited to, the product data, drawing, chart, program, algorithm, application examples. 3. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. 4. You shall not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. Renesas Electronics disclaims any and all liability for any losses or damages 5. Renesas Electronics products are classified according to the following two quality grades: "Standard" and "High Quality". The intended applications for each Renesas Electronics product depends on the incurred by you or third parties arising from such alteration, modification, copy or otherwise misappropriation of Renesas Electronics products. product's quality grade, as indicated below. "Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots etc. "High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control (traffic lights); large-scale communication equipment; key financial terminal systems; safety control equipment; etc. Renesas Electronics products are neither intended nor authorized for use in products or systems that may pose a direct threat to human life or bodily injury (artificial life support devices or systems, surgical implantations etc.), or may cause serious property damages (space and undersea repeaters; nuclear power control systems; aircraft control systems; key plant systems; military equipment; etc.). Renesas Electronics disclaims any and all liability for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the product is not intended by Renesas Electronics. 6. When using the Renesas Electronics products, refer to the latest product information (data sheets, user's manuals, application notes, "General Notes for Handling and Using Semiconductor Devices" in the reliability handbook, etc.), and ensure that usage conditions are within the ranges specified by Renesas Electronics with respect to maximum ratings, operating power supply voltage range, heat radiation characteristics, installation, etc. Renesas Electronics disclaims any and all liability for any malfunctions or failure or accident arising out of the use of Renesas Electronics products beyond such specified ranges. 7. Although Renesas Electronics endeavors to improve the quality and reliability of Renesas Electronics products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please ensure to implement safety measures to guard them against the possibility of bodily injury, injury or damage caused by fire, and social damage in the event of failure or malfunction of Renesas Electronics products, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures by your own responsibility as warranty for your products/system. Because the evaluation of microcomputer software alone is very difficult and not practical, please evaluate the safety of the final products or systems manufactured by you. 8. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please investigate applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive carefully and sufficiently and use Renesas Electronics products in compliance with all these applicable laws and regulations. Renesas Electronics disclaims any and all liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. 9. Renesas Electronics products and technologies shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. You shall not use Renesas Electronics products or technologies for (1) any purpose relating to the development, design, manufacture, use, stockpiling, etc., of weapons of mass destruction, such as nuclear weapons, chemical weapons, or biological weapons, or missiles (including unmanned aerial vehicles (UAVs)) for delivering such weapons, (2) any purpose relating to the development, design, manufacture, or use of conventional weapons, or (3) any other purpose of disturbing international peace and security, and you shall not sell, export, lease, transfer, or release Renesas Electronics products or technologies to any third party whether directly or indirectly with knowledge or reason to know that the third party or any other party will engage in the activities described above. When exporting, selling, transferring, etc., Renesas Electronics products or technologies, you shall comply with any applicable export control laws and regulations promulgated and administered by the governments of the countries asserting jurisdiction over the parties or transactions. 10. Please acknowledge and agree that you shall bear all the losses and damages which are incurred from the misuse or violation of the terms and conditions described in this document, including this notice, and hold Renesas Electronics harmless, if such misuse or violation results from your resale or making Renesas Electronics products available any third party. 11. This document shall not be reprinted, reproduced or duplicated in any form, in whole or in part, without prior written consent of Renesas Electronics. 12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products. 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