LM34919CQTLEVM - Texas Instruments

LM34919C-Q1 Evaluation Board User's Guide

User's Guide

Literature Number: SNVU196

SEPTEMBER 2013

Contents

1 INTRODUCTION .................................................................................................................. 5

2 THEORY OF OPERATION ..................................................................................................... 5

3 BOARD LAYOUT AND PROBING ........................................................................................... 6

4 BOARD CONNECTION/START-UP ......................................................................................... 6

5 OUTPUT RIPPLE CONTROL ................................................................................................. 6

6 MONITOR THE INDUCTOR CURRENT .................................................................................... 8

7 MINIMUM LOAD CURRENT ................................................................................................... 8

8 CIRCUIT PERFORMANCE ..................................................................................................... 9

9 TYPICAL WAVEFORMS ...................................................................................................... 11

10 PC BOARD LAYOUT .......................................................................................................... 13

2Table of Contents SNVU196–SEPTEMBER 2013

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List of Figures

1 Evaluation Board - Top Side .............................................................................................. 5

2 Lowest Cost Configuration................................................................................................. 6

3 Intermediate Ripple Configuration ........................................................................................ 7

4 Minimum Output Ripple Configuration ................................................................................... 8

5 Complete Evaluation Board Schematic.................................................................................. 8

6 Efficiency vs Load Current................................................................................................. 9

7 Efficiency vs Input Voltage................................................................................................. 9

8 Switching Frequency vs. Input Voltage................................................................................. 10

9 Load Derating Curve...................................................................................................... 10

10 Continuous Conduction Mode ........................................................................................... 11

11 Discontinuous Conduction Mode........................................................................................ 11

12 Enable, Output Voltage, and PGD at Startup.......................................................................... 12

13 Board Silkscreen........................................................................................................... 13

14 Board Top Layer........................................................................................................... 13

15 Board Bottom Layer (Viewed from Top)................................................................................ 14

List of Tables

1 Bill of Materials.............................................................................................................. 8

SNVU196–SEPTEMBER 2013 List of Figures

User's Guide

SNVU196–SEPTEMBER 2013

LM34919C-Q1 Evaluation Board

The LM34919CQSDEVM evaluation board provides the design engineer with a fully functional buck

regulator, employing the constant on-time (COT) operating principle. This evaluation board provides a 3.3

V output over an input range of 4.5 V to 24 V. The circuit delivers load current to 600 mA, with current limit

set at a nominal 640 mA (valley current limit). The board is populated with all components except R7, C6,

and C7. These components provide options for managing the output ripple as described later in this

document.

All trademarks are the property of their respective owners.

4LM34919C-Q1 Evaluation Board SNVU196–SEPTEMBER 2013

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OUT

SW 12 2

F Hz

35.5 10 R



u u

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INTRODUCTION

1 INTRODUCTION

The LM34919CQSDEVM evaluation board provides the design engineer with a fully functional buck

regulator, employing the constant on-time (COT) operating principle. This evaluation board provides a 3.3

V output over an input range of 4.5 V to 24 V. The circuit delivers load currents to 600 mA, with valley

current limit set at 640 mA. The board is populated with all components except R7, C6 and C7. These

components provide options for managing the output ripple as described later in this document.

The board’s specification are:

• Input Voltage: 4.5 V to 24 V

• Output Voltage: 3.3 V

• Maximum load current: 600 mA

• Minimum load current: 0 A

• Current Limit: 768 mA to 812 mA

• Measured Efficiency: 87% (VIN =6V,IOUT = 300 mA)

• Nominal Switching Frequency: 1.5 MHz

• Size: 1.4 inches x 2.3 inches

Figure 1. Evaluation Board - Top Side

2 THEORY OF OPERATION

Refer to the evaluation board topside view in Figure 1. At nominal input voltage, VIN = 12 V, the switching

frequency can be determined by R2(RON resistor) and output voltage VO, according to Equation 1:

(1)

In LM34919C, like other constant on-time regulators, the on-time varies inversely with VIN to maintain a

nearly constant switching frequency. For stable, fixed frequency operation, a minimum of 25 mV of ripple

is required at FB to switch the regulation comparator. The average load current limit threshold is ≊768 mA

at Vin = 4.5 V, and ≊812 mA at Vin = 24 V. The variation is due to the change in ripple current amplitude

as Vin varies. Refer to the LM34919C data sheet for a more detailed block diagram, and a complete

description of the various functional blocks.

SNVU196–SEPTEMBER 2013 LM34919C-Q1 Evaluation Board

BST

VCC

ISEN

SGND

VIN

61.9k

RTN

GND

On Timer Minimum

Off

Timer

Logic

Current Limit

Detect

GND

3.3V

LM34919C

4.5V to 24V

RON

PGD

100k

2.52V

1.2VREF

C10

0.022 µF

10k

VOUT

C4 VIN

0.1 µF

0.022 µF

L1 8.2 µH R4 0

VOUT

2.49k

1 µF 1 µF

787

0.47

10 µF

0.1µF

Regulation

Comparator

0.92VREF

BOARD LAYOUT AND PROBING

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3 BOARD LAYOUT AND PROBING

The picture in Figure 1 also shows the placement of the circuit components. The following should be kept

in mind when the board is powered:

1) The LM34919C, and diode D1 may be hot to touch when operating at high input voltage and high load

current.

2) Use CAUTION when probing the circuit at high input voltages to prevent injury, as well as possible

damage to the circuit.

3) At maximum load current (0.6 A), the wire size and length used to connect the load becomes important.

Ensure there is not a significant drop in the wires between this evaluation board and the load.

4 BOARD CONNECTION/START-UP

The input connections are made to the J1 connector. The load is connected to the J3 (OUT) and J4

(GND) connectors. Ensure the wires are adequately sized for the intended load current. Before start-up a

voltmeter should be connected to the input terminals, and to the output terminals. The load current should

be monitored with an ammeter or a current probe. It is recommended that the input voltage be increased

gradually to 4.5 V and load current be set at 0 A, at which time the output voltage should be ≊3.3 V. If the

output voltage is correct, then increase the input voltage as desired and proceed loading the evaluation

board as shown in Figure 8. DO NOT EXCEED 40 V AT VIN.

5 OUTPUT RIPPLE CONTROL

The LM34919C requires a minimum of 25 mVp-p ripple at the FB pin, in phase with the switching

waveform at the SW pin, for proper operation. The required ripple can be supplied from ripple at VOUT,

through the feedback resistors as described in Options A and B below, or the ripple can be generated

separately (using R7, C6, and C7) in order to keep the ripple at VOUT at a minimum (Option C).

Option A) Lowest Cost Configuration: This evaluation board is supplied with R6 installed in series with

the output capacitance (C8, C9). R6 is chosen to generate ≥25 mVp-p at VOUT. Using 0.47 Ωfor R6, the

ripple at VOUT ranges from ≊38 mVp-p to ≊158 mVp-p over the input voltage range. If the application can

accept this ripple level, this is the most economical solution. The circuit is shown in Figure 2.

Figure 2. Lowest Cost Configuration

Option B) Intermediate Ripple Configuration: This configuration generates less ripple at VOUT than

option A above by the addition of one capacitor (Cff) across R5, as shown in Figure 3.

6LM34919C-Q1 Evaluation Board SNVU196–SEPTEMBER 2013

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R7 x C6 = (VIN ± VA) x tON

Cff ttON (max) x 3

(R5//R8)

BST

VCC

ISEN

SGND

VIN

61.9k

RTN

GND

On Timer Minimum

Off

Timer

Logic

Current Limit

Detect

GND

3.3V

LM34919C

4.5V to 24V

RON

PGD

100k

2.52V

1.2VREF

C10

0.022 µF

10k

VOUT

C4 VIN

0.1 µF

0.022 µF

Cff

2200 pF

L1 8.2 µH R1 0

VOUT

2.49k

1 µF 1 µF

787

0.4

10 µF

0.1µF

Regulation

Comparator

0.92VREF

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OUTPUT RIPPLE CONTROL

Figure 3. Intermediate Ripple Configuration

Since the output ripple is passed by Cff to the FB pin with little or no attenuation, R6 can be reduced so

the minimum ripple at VOUT is ≊25 mVp-p. The minimum value for Cff is calculated from:

(2)

where tON(max) is the maximum on-time (at minimum VIN), and R5//R8 is the parallel equivalent of the

feedback resistors. See Figure 3.

Option C) Minimum Ripple Configuration: To obtain minimum ripple at VOUT, R6 is set to 0Ω, and R7,

C6, and C7 are added to generate the required ripple for the FB pin. In this configuration, the output ripple

is determined primarily by the ESR of the output capacitance and the inductor’s ripple current.

The ripple voltage required by the FB pin is generated by R7, C6, and C7 since the SW pin switches from

–1 V to VIN, and the right end of C6 is a virtual ground. The values for R7 and C6 are chosen to generate

a 50-100 mVp-p triangle waveform at their junction. That triangle wave is then coupled to the FB pin

through C7. The following procedure is used to calculate values for R7, C6 and C7:

1) Calculate the voltage VA:

VA= VOUT – (VSW x (1 – (VOUT/VIN))) (3)

where VSW is the absolute value of the voltage at the SW pin during the off-time (typically 1 V), and VIN is

the minimum input voltage. For this circuit, VAcalculates to 3.03 V. This is the approximate DC voltage at

the R7/C6 junction, and is used in the next equation.

2) Calculate the R7 x C6 product:

(4)

where tON is the maximum on-time, VIN is the minimum input voltage, and ΔV is the desired ripple

amplitude at the R7/C6 junction, 50 mVp-p for this example.

R7 and C6 are then chosen from standard value components to satisfy the above product. Typically C6 is

3000 to 5000 pF, and R7 chosen close to 10 kΩ. C7 is chosen large compared to C6, typically 0.1 µF.

See Figure 4.

SNVU196–SEPTEMBER 2013 LM34919C-Q1 Evaluation Board

R7 C6

TP2

TP4

TP3 TP1

BST

VCC

ISEN

SGND

VIN

61.9k

RTN

GND

On Timer Minimum

Off

Timer

Logic

Regulation

Comparator Current Limit

Detect

GND

3.3V

LM34919C

4.5V to 24V

RON

PGD

100k

2.52V

0.92VREF

1.2VREF

C10

0.022 µF

10k

VOUT

C4 VIN

0.1 µF

0.022 µF

L1 8.2 µH R4 0

VOUT

2.49k

1 µF 1 µF

787

0.47

10 µF

0.1µF

R7 C6

BST

VCC

ISEN

SGND

VIN

61.9k

RTN

GND

On Timer Minimum

Off

Timer

Logic

Regulation

Comparator Current Limit

Detect

GND

3.3V

LM34919C

4.5V to 24V

RON

PGD

100k

2.52V

0.92VREF

1.2VREF

C10

0.022 µF

10k

VOUT

C4 VIN

0.1 µF

L1 8.2 µH R4 0

VOUT

2.49k

1 µF 1 µF

787

0

10 µF

0.1µF

0.022 µF

7.87 k

C10

0.1 µF

3300 pF

MONITOR THE INDUCTOR CURRENT

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Figure 4. Minimum Output Ripple Configuration

6 MONITOR THE INDUCTOR CURRENT

The inductor’s current can be monitored or viewed on a scope with a current probe. Remove R4, and

install an appropriate current loop across the two large pads where R4 was located. In this way the

inductor’s ripple current and peak current can be accurately determined.

7 MINIMUM LOAD CURRENT

The LM34919C requires a minimum load current of ≊1 mA to ensure the boost capacitor (C5) is recharged

sufficiently during each off-time. In this evaluation board, the minimum load current is provided by the

feedback resistors allowing the board’s minimum load current at VOUT to be specified at zero.

Figure 5. Complete Evaluation Board Schematic

Table 1. Bill of Materials

ITEM DESCRIPTION MFG. PART NUMBER PACKAGE VALUE

C1,C2 Ceramic Capacitor TDK C1005X7R1H104K050BB 0402 0.1 µF,50 V

C3,C4 Ceramic Capacitor Murata GRM21BR71H105KA12L 0805 1 µF,50 V

C5,C10 Ceramic Capacitor Murata GRM155R71H223KA12D 0402 0.022 µF,50 V

C6 Ceramic Capacitor Unpopulated 0402

C7 Ceramic Capacitor Unpopulated 0402

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0 5 10 15 20 25

Efficiency (%)

Input Voltage (V)

Load = 200mA

Load = 300mA

Load = 400mA

Load = 500mA

Load = 600mA

C002

Vout = 3.3V

Fsw = 1.5 MHz

0.2 0.3 0.4 0.5 0.6

Efficiency (%)

Load Current (A)

Vin = 4.5V

Vin = 6V

Vin = 9V

Vin = 12V

Vin = 18V

Vin = 24V

C001

Vout = 3.3V

Fsw = 1.5 MHz

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CIRCUIT PERFORMANCE

Table 1. Bill of Materials (continued)

ITEM DESCRIPTION MFG. PART NUMBER PACKAGE VALUE

C8,C9 Ceramic Capacitor Murata GRM21BR71A106KE51L 0805 10 µF,10 V

D1 Schottky Diode Zetex ZLLS2000TA SOT-23-6 40 V, 2.2 A

L1 Power Inductor Wurth Elektronik 744053008 5.8mm x 5.8mm 8.2 µH, 2.1 A

R1 Resistor Vishay-Dale CRCW040210K0FKED 0402 10 kΩ

R2 Resistor Vishay-Dale CRCW040261K9FKED 0402 61.9 kΩ

R3 Resistor Vishay-Dale CRCW0402100KFKED 0402 100 kΩ

R4 Resistor Vishay-Dale CRCW08050000Z0EA 0805 0 ΩJumper

R5 Resistor Vishay-Dale CRCW0402787RFKED 0402 787 Ω

R6 Resistor Vishay-Dale RCWE0805R470FKEA 0805 0.47 Ω

R7 Resistor Unpopulated 0402

R8 Resistor Vishay-Dale CRCW04022K49FKED 0402 2.49 kΩ

U1 Switching Regulator Texas Instruments LM34919CQSD 12 Pin WSON

8 CIRCUIT PERFORMANCE

Figure 6. Efficiency vs Load Current

Figure 7. Efficiency vs Input Voltage

SNVU196–SEPTEMBER 2013 LM34919C-Q1 Evaluation Board

04.5 4.6 4.7 4.8 4.9 5 24

0.1

0.2

0.4

0.5

0.6

0.3

INPUT VOLTAGE (V)

LOAD CURRENT (A)

OUTPUT VOLTAGE

REGULATION

0.5

1.0

1.5

2.0

2.5

3.0

4 8 12 16 20 24

Switching Frequency (MHz)

Input Voltage (V)

C003

Vout = 3.3V

5RQ N

CIRCUIT PERFORMANCE

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Figure 8. Switching Frequency vs. Input Voltage

Figure 9. Load Derating Curve

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TYPICAL WAVEFORMS

9 TYPICAL WAVEFORMS

Trace 2 = VOUT ripple (ac coupled)

Trace 4 = inductor Current

Trace 1 = SW Pin

Vin = 12 V, IOUT = 400 mA

Figure 10. Continuous Conduction Mode

Trace 2 = VOUT ripple (ac coupled)

Trace 4 = inductor Current

Trace 1 = SW Pin

Vin = 12 V, IOUT = 20 mA

Figure 11. Discontinuous Conduction Mode

SNVU196–SEPTEMBER 2013 LM34919C-Q1 Evaluation Board

TYPICAL WAVEFORMS

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Trace 3 = VOUT

Trace 2 = EN

Trace 4 = Power Good

Trace 1 = VIN = 12 V

IOUT = 300 mA

Figure 12. Enable, Output Voltage, and PGD at Startup

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PC BOARD LAYOUT

10 PC BOARD LAYOUT

Figure 13. Board Silkscreen

Figure 14. Board Top Layer

SNVU196–SEPTEMBER 2013 LM34919C-Q1 Evaluation Board

PC BOARD LAYOUT

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Figure 15. Board Bottom Layer (Viewed from Top)

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Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions:

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims

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Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from

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EVALUATION BOARD/KIT/MODULE (EVM)

WARNINGS, RESTRICTIONS AND DISCLAIMERS

For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished

electrical equipment and not intended for consumer use. It is intended solely for use for preliminary feasibility evaluation in

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contractors or designees, using the EVM. Further, you are responsible to assure that any interfaces (electronic and/or mechanical)

between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to

minimize the risk of electrical shock hazard.

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Certain Instructions. It is important to operate this EVM within TI’s recommended specifications and environmental considerations per the

user guidelines. Exceeding the specified EVM ratings (including but not limited to input and output voltage, current, power, and

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