DS36950
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DS36950 Quad Differential Bus Transceiver
Check for Samples: DS36950
1FEATURES DESCRIPTION
The DS36950 is a low power, space-saving quad
2• Pinout for IPI Interface EIA-485 differential bus transceiver especially suited
• Compact 20-pin PLCC Package for high speed, parallel, multipoint, computer I/O bus
• Meets EIA-485 Standard for Multipoint Bus applications. A compact 20-pin surface mount PLCC
Transmission package provides high transceiver integration and a
very small PC board footprint.
• Greater than 60 mA Source/Sink Timing uncertainty across an interface using multiple
• Thermal Shutdown Protection devices, a typical problem in a parallel interface, is
specified—minimum and maximum propagation delay
times are guaranteed.
Six devices can implement a complete IPI master or
slave interface. Three transceivers in a package are
pinned out for connection to a parallel databus. The
fourth transceiver, with the flexibility provided by its
individual enables, can serve as a control bus
transceiver.
Pinout and Logic Diagram
Figure 1. Top View (Package Number FN0020A)
Figure 2. Block Diagram
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1998–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
DS36950
SNLS075C –JULY 1998–REVISED FEBRUARY 2013
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Absolute Maximum Ratings (1)(2)
Supply Voltage 7V
Control Input Voltage VCC + 0.5V
Driver Input Voltage VCC + 0.5V
Driver Output Voltage/Receiver
Input Voltage −10V to +15V
Receiver Output Voltage 5.5V
Continuous Power Dissipation @ 25°C FN0020A Package 1.73W
Derate FN0020A Package 13.9 mW/°C above 25°C
Storage Temp. Range −65°C to +150°C
Lead Temp. (Soldering 4 Sec.) 260°C
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to
imply that the devices should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device
operation.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
Recommended Operating Conditions(1)
Supply Voltage, VCC 4.75V to 5.25V
Bus Voltage −7V to +12V
Operating Free Air Temperature (TA) 0°C to +70°C
(1) All typicals are given for VCC = 5.0V and TA= 25°C.
Electrical Characteristics (1)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Parameter Test Conditions Min Typ Max Units
Driver Characteristics
VODL Differential Driver Output IL= 60 mA 1.5 1.9 V
Voltage (Full Load) VCM = 0V
VOD Differential Driver Output RL= 100Ω(EIA-422) 2.0 3.5 V
Voltage (Termination Load) RL= 54Ω(EIA-485) 1.5 3.2 V
ΔIVODI Change in Magnitude of Driver RL= 54Ωor 100Ω
Differential Output Voltage for (2)(Figure 3) 0.2 V
Complementary Output States (EIA-485)
VOC Driver Common Mode Output RL= 54Ω3.0 V
Voltage (3) (Figure 3) (EIA-485)
ΔIVOCI Change in Magnitude of Common (2) (Figure 3) 0.2 V
Mode Output Voltage (EIA-485)
VOH Output Voltage HIGH IOH =−55 mA 2.7 3.2 V
VOL Output Voltage LOW IOL = 55 mA 1.4 1.7 V
VIH Input Voltage HIGH 2.0 V
VIL Input Voltage LOW 0.8 V
VCL Input Clamp Voltage I = −18 mA −1.5 V
IIH Input High Current VI= 2.4V (4) 20 μA
IIL Input Low Current VI= 0.4V (4) −20 μA
(1) Current into device pins is define as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
unless otherwise specified.
(2) ΔIVODI and ΔIVOCI are changes in magnitude of VOD and VOC, respectively, that occur when the input changes state.
(3) In EIA Standards EIA-422 and EIA-485, VOC, which is the average of the two output voltages with respect to ground, is called output
offset voltage, VOS.
(4) IIH and IIL includes driver input current and receiver TRI-STATE leakage current.
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Electrical Characteristics (1) (continued)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Parameter Test Conditions Min Typ Max Units
IOSC Driver Short-Circuit Output Current (5) VO=−7V (EIA-485) −130 −250 mA
VO= 0V (EIA-422) −90 −150 mA
VO= +12V (EIA-485) 130 250 mA
Receiver Characteristics
IOSR Short Circuit Output Current VO= 0V (5) −15 −28 −75 mA
IOZ TRI-STATE Output Current VO= 0.4V to 2.4V 20 μA
VOH Output Voltage High VID = 0.20V, IOH =−0.4 mA 2.4 3.0 V
VOL Output Voltage Low VID =−0.20V, IOL = 4 mA 0.35 0.5 V
VTH Differential Input High Threshold VO= VOH, IO=−0.4 mA (EIA-422/485) 0.03 0.20 V
Voltage
VTL Differential Input Low Threshold Voltage VO= VOL, IO= 4.0 mA −0.20 −0.03 V
(6) (EIA-422/485)
VHST Hysteresis (7) VCM = 0V 35 60 mV
Driver and Receiver Characteristics
VIH Enable Input Voltage High 2.0 V
VIL Enable Input Voltage Low 0.8 V
VCL Enable Input Clamp Voltage I = −18 mA −1.5 V
IIN Line Input Current (8) Other Input = 0V VI= +12V 0.5 1 mA
VI=−7V −0.45 −0.8 mA
IIH Enable Input Current High VOH = 2.4V RE4 or DE 20 μA
REC 60 μA
IIL Enable Input Current Low VOL = 0.4V RE4 or DE −20 μA
REC −60 μA
ICC Supply Current (9) No Load, Outputs Enabled 75 90 mA
ICCZ Supply Current (9) No Load, Outputs Disabled 50 70 mA
(5) Short one output at a time.
(6) Threshold parameter limits specified as an algebraic value rather than by magnitude.
(7) Hysteresis defined as VHST = VTH −VTL.
(8) IIN includes the receiver input current and driver TRI-STATE leakage current.
(9) Total package supply current.
Switching Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol Test Conditions Min Typ Max Units
Driver Single-Ended Characteristics
tPZH RL= 110Ω(Figure 6) 35 40 ns
tPZL RL= 110Ω(Figure 7) 25 40 ns
tPHZ RL= 110Ω(Figure 6) 15 25 ns
tPLZ RL= 110Ω(Figure 7) 35 40 ns
Driver Differential Characteristics
tR, tFRise & Fall Time RL= 54Ω13 16 ns
tPLHD Differential Propagation CL= 50 pF 9 15 19 ns
tPHLD Delays (1) CD= 15 pF 9 15 19 ns
tSKD |tPLHD −tPHLD| Differential Skew (Figure 5 ) 3 6 ns
(1) Differential propagation delays are calculated from single-ended propagation delays measured from driver input to the 20% and 80%
levels on the driver outputs (See Figure 5).
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Switching Characteristics (continued)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol Test Conditions Min Typ Max Units
Receiver Characteristics
tPLHD Differential Propagation Delays 9 14 19 ns
tPHLD CL= 15 pF, VCM = 1.5V (Figure 8) 9 14 19 ns
tSKD |tPLHD −tPHLD| Differential Receiver Skew 1 3 ns
tZH Output Enable Time to High Level CL= 15 pF Figure 9 15 22 ns
tZL Output Enable Time to Low Level 20 30 ns
tHZ Output Disable Time from High Level 10 17 ns
tLZ Output Disable Time from Low Level 17 25 ns
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Parameter Measurement Information
Figure 3. Driver VOD and VOC
Figure 4. Receiver VOH and VOL
(1) The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, 50% Duty Cycle, tfand tr
< 6.0 ns, ZO= 50Ω
(2) CLincludes probe and stray capacitance.
Figure 5. Driver Differential Propagation Delay and Transition Timing
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Parameter Measurement Information (continued)
S1 to OA for DI = 3V
S1 to OB for DI = 0V
(1) The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, 50% Duty Cycle, tfand tr
< 6.0 ns, ZO= 50Ω
(2) CLincludes probe and stray capacitance.
Figure 6. Driver Enable and Disable Timing (tPZH, tPHZ)
S1 to OA for DI = 0V
S1 to OB for DI = 3V
(1) The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, 50% Duty Cycle, tfand tr
< 6.0 ns, ZO= 50Ω
(2) CLincludes probe and stray capacitance.
Figure 7. Driver Enable and Disable Timing (tPZL, tPLZ)
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Parameter Measurement Information (continued)
(1) The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, 50% Duty Cycle, tfand tr
< 6.0 ns, ZO= 50Ω
(2) CLincludes probe and stray capacitance.
Figure 8. Receiver Differential Propagation Delay Timing
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Parameter Measurement Information (continued)
S1 −1.5V
S2 CLOSED
S3 CLOSED
(1) The input pulse is supplied by a generator having the following characteristics: f = 1.0 MHz, 50% Duty Cycle, tfand tr
< 6.0 ns, ZO= 50Ω
(2) CLincludes probe and stray capacitance.
(3) Diodes are 1N916 or equivalent.
Figure 9. Receiver Enable and Disable Timing
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Parameter Measurement Information (continued)
TCP = Crossing Point
Tra, Trb, Tfa, and Tfb are propagation delay
measurements to the 20% and 80% levels.
Figure 10. Propagation Delay Timing for Calculation of Driver Differential Propagation Delays
Typical Performance Characteristics
Driver Differential Propagation Driver Differential Propagation
Delay Delay
vs vs
Temperature VCC
Figure 11. Figure 12.
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Typical Performance Characteristics (continued)
Driver Transition Time Driver Transition Time
vs Temperature vs VCC
Figure 13. Figure 14.
Driver VOH Driver VOH
vs vs
IOH IOH
vs Temperature vs VCC
Figure 15. Figure 16.
Driver VOL Driver VOL
vs vs
IOL IOL
vs Temperature vs VCC
Figure 17. Figure 18.
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Typical Performance Characteristics (continued)
Driver VOD Driver VOD
vs vs
IOIO
vs Temperature vs VCC
Figure 19. Figure 20.
Receiver Differential
Receiver Differential Propagation Delay
Propagation Delay vs
vs Temperature VCC
Figure 21. Figure 22.
Receiver VOH Receiver VOH
vs vs
IOH IOH
vs Temperature vs VCC
Figure 23. Figure 24.
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Typical Performance Characteristics (continued)
Receiver VOL Receiver VOL
vs vs
IOL IOL
vs Temperature vs VCC
Figure 25. Figure 26.
Supply Current Power Supply Current vs
vs Temperature Power Supply Voltage
Figure 27. Figure 28.
Driver ICC
vs
Switching
Frequency
Figure 29.
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REVISION HISTORY
Changes from Revision B (February 2013) to Revision C Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 12
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PACKAGE OPTION ADDENDUM
www.ti.com 16-Oct-2015
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
DS36950VX/NOPB LIFEBUY PLCC FN 20 1000 Green (RoHS
& no Sb/Br) CU SN Level-2A-250C-4
WEEK 0 to 70 DS36950V
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Oct-2015
Addendum-Page 2
MECHANICAL DATA
MPLC004A – OCTOBER 1994
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FN (S-PQCC-J**) PLASTIC J-LEADED CHIP CARRIER
4040005/B 03/95
20 PIN SHOWN
0.026 (0,66)
0.032 (0,81)
D2/E2
0.020 (0,51) MIN
0.180 (4,57) MAX
0.120 (3,05)
0.090 (2,29)
D2/E2
0.013 (0,33)
0.021 (0,53)
Seating Plane
MAX
D2/E2
0.219 (5,56)
0.169 (4,29)
0.319 (8,10)
0.469 (11,91)
0.569 (14,45)
0.369 (9,37)
MAX
0.356 (9,04)
0.456 (11,58)
0.656 (16,66)
0.008 (0,20) NOM
1.158 (29,41)
0.958 (24,33)
0.756 (19,20)
0.191 (4,85)
0.141 (3,58)
MIN
0.441 (11,20)
0.541 (13,74)
0.291 (7,39)
0.341 (8,66)
18
19
14
13
D
D1
13
9
E1E
4
8
MINMAXMIN
PINS
**
20
28
44
0.385 (9,78)
0.485 (12,32)
0.685 (17,40)
52
68
84 1.185 (30,10)
0.985 (25,02)
0.785 (19,94)
D/E
0.395 (10,03)
0.495 (12,57)
1.195 (30,35)
0.995 (25,27)
0.695 (17,65)
0.795 (20,19)
NO. OF D1/E1
0.350 (8,89)
0.450 (11,43)
1.150 (29,21)
0.950 (24,13)
0.650 (16,51)
0.750 (19,05)
0.004 (0,10)
M
0.007 (0,18)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-018
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