National Semiconductor 54LS395/DM74LS395 4-Bit Shift Register with TRI-STATE Outputs General Description The LS395 is a 4-bit shift register with TAI-STATE outputs and can operate in either a synchronous parallel load or a serial shift-right mode, as determined by the Select input. An asynchronous active LOW Master Reset (MR) input over- rides the synchronous operations and clears the register. An active LOW Output Enable (OE) input controls the TRI- STATE output buffers, but does not interfere with the other operations. The fourth stage also has a conventional output for linking purposes in multi-stage serial operations. Features @ Shift right or parallel 4-bit register @ TRI-STATE outputs @ Input clamp diodes limit high speed termination effects m@ Fully CMOS and TTL compatible Connection Diagram Dual-In-Line Package __ ar WRT 16 F Voce Ds 42 15f00 PO43 t401 Pi14 13,02 P2#5 12,03 PI-46 11f03 S47 10} cP GNO18 910E TL/F/9893-1 Order Number 54LS395DMGB, 54LS395FMQB, 54LS395LMQB, DM74LS395WM or DM74LS395N See NS Package Number E20A, J16A, M16B, N1GE or W16A Logic Symbol 73 45 6 S PO Pi P2 P3 cp 03 11 MR 00 01 02 03 1 15 14 13 12 TL/F/9833-2 Voc = Pin 16 GND = Ping Mode Select Table Operating Mode _ Inputs @ th Outputs @ t,+ 4 MR CP S Ds P,h|O0 O1 O2 O03 Asynchronous Reset Li X |X~X]RXEL OL L L Shift, SET First Stage H|NjL]H]X]H OO, Ot, 02, Shift, RESET First Stage} H |] _]L] L |X] L OO, 01, 02, Parallel Load H | ]H| X|]Pn}/ PO P1 P2 P38 th fa+1 = Time before and aftar CP HIGH-to-LOW transition H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial 2-401 S6EST LS395 Absolute Maximum Ratings (note) if Military/Aerospace specified devices are required, please contact the Natlonal Semiconductor Sales Office/Distributors for availability and specifications. Note: The Absolute Maximum Ratings are those values beyond which the safety of tha device cannot be guaran- teed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics table are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions table will define the conditions for actual device operation. Supply Voltage 7V Input Voltage 10V Operating Free Air Temperature Range 54LS 55C to + 126C DM74LS Storage Temperature Range OC to + 70C 68C to + 150C Recommended Operating Conditions Symbol Parameter S4LS395 DM74LS395 Units Min Nom Max Min Nom Max Vcc Supply Voltage 4.5 5 5.5 4.75 5 .25 Vv Vin High Level Input Voltage 2 2 v Vit Low Level Input Voltage 0.7 0.8 V lou High Level Output Current 0.4 ~0.4 mA lo Low Level Output Current 4 8 mA Ta Free Air Operating Temperature 55 125 0 70 C ts (H) Setup Time HIGH or LOW 20 20 ns ts (L) S, Dg or P, to CP 20 20 th (H) Hold Time HIGH or LOW 5 5 th) S, Ds or P, to CP 5 5 ns tw (L) CP Pulse Width LOW 18 18 ns ty (L) MA Pulse Width LOW 20 20 ns Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min een Max Units vy Input Clamp Voltage Voc = Min, || = 18mA -1.5 Vv Vou High Level Output Voc = Min, lox = Max 54LS 2.5 Vv Voltage Vip = Max DM74 27 Vo Low Level Output Voc = Min, lop = Max 54L8 0.4 Voltage ViH = Min DM74 0.35 0.5 V lo. = 4mA, Voo = Min DM74 0.25 0.4 hy Inout Voltage @ Max Veco = Max, V; = 10V 0.1 mA hw High Level Input Current Veco = Max, V| = 2.7V 20 pA lie Low Level Input Current Veco = Max, V) = 0.4V 0.4 mA los Short Circuit Voc = Max 54LS 20 - 100 mA Output Current (Note 2) DM74 20 400 lec Supply Current with Voc = Max, OE, Ds, S$ = 4.5V 29 mA Outputs OFF CP = \_,P, = GND Supply Current with Veco = Max, Ds, = 4.5V 25 mA Outputs ON OE, CP, P, = GND lozH TRI-STATE Output Off Voc = VocH 20 yA Current HIGH VozH = 2.7V loz TRI-STATE Output Off Vec = Yoon _20 wA Current LOW Vozi = 0.4V Note 1: Ail typicals are at Voc = 5V, Ta = 25C. Note 2: Not more than one output should ba shorted at a time, and the duration should not exceed one second. 2-402 Switching Characteristics Voc = +5.0V, Ta = +25C (See Section 1 for waveforms and load configurations} 54LS/DM74LS Symbol Parameter RL =2kn, C, = 15 pF Min Max frnax Maximum Shift Frequency 30 MHz tpLH Propagation Delay 35 ns {PHL CP to On, 25 tPHL Propagation Delay MR to Op 36 ns tpzH Qutput Enable Time 20 ns tezL 20 tpyz Output Disabie Time 17 ns tpLz 23 Functional Description The LS395 contains four D-type edge-triggered flip-flops and auxiliary gating to select a D input either from a Parallel {P,) input or from the preceding stage. When the Select input is HIGH, the P, inputs are enabled. A LOW signal in the S input enables the serial inputs for shift-right opera- tions, as indicated in the Truth Table. State changes are initiated by HIGH-to-LOW transitions on the Clock Pulse (CP) input. Signais on the P,, Ds and S inputs can change when the Clock is in either state, provid- ed that the recommended setup and hold times ara ob- Logic Diagram served. When the S input is LOW, a CP HIGH-LOW tran- sition transfers data in OO to 01, 01 to O2, and O2 to 03. A left-shift is accomplished by connecting the outputs back to the P, inputs, but offset one place to the left, i.., O39 to P2, O2 to P1, and 01 to PO, with P3 acting as the linking input from another package. When the OE input is HIGH, the output buffers are disabled and the O0-O3 outputs are in a high impedance condition. The shifting, paraliel loading or resetting operations can still be accomplished, however. PO PI P2 P3 sDo-pf>o Ds _ = _ o> T 7 cp D cP D cp D cp D poCd cD cD co Q Q Q Q o 5 s MR d> - ef> 00 of 02 03 las TL/F/9833-3 2-403 S6ES1