2 CY3273 Cypress Low Voltage Powerline Communication Evaluation Kit Guide, Doc. # 001-55382 Rev. *C
Copyrights
Copyrights
© Cypress Semiconductor Corporation, 2009-2011. The information contained herein is subject to change without notice.
Cypress Semiconductor Corporation assumes no responsib ility for the use of any circu itry other than circuitry embodied in a
Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted
nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an
express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components
in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user.
The inclusion of Cypress products in life-support systems application implies that the manu facturer assumes all risk of such
use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by
and subject to worldwide patent protection (United States and foreign), United States copyright laws and i nternational treaty
provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create
derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom soft-
ware and or firmware in support of licensee product to be u sed only in conju nction with a Cypress integrated circuit as sp eci-
fied in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source
Code except as specified above is prohibited without the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATE-
RIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described
herein. Cypress does not assume any liabil ity arising out of the application or use o f any product or circuit described he rein.
Cypress does not authorize its products for use a s critical compone nts in life-suppo rt systems where a malfunction or failure
may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support sys -
tems application implies th at the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all
charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
PSoC® is a registered trademark of Cypress Semiconductor Corporation. All products and company names mentioned in this
document may be the trademarks of their respective holders.
Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the
Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2 C Standard
S pecification as defined by Philips. As from October 1st, 2006 Philips Semiconductors has a new trade name - NXP Semicon-
ductors.
Flash Code Protection
Cypress products meet the specifications contained in their particular Cypress PSoC Data Sheets. Cypress believes that its
family of PSoC products is one of the most secure families of its kind on the market today, regardless of how they are used.
There may be methods, unknown to Cypress, that can breach the code protection features. Any of these methods, to our
knowledge, would be dishonest and possibly illegal. Neither Cypress nor any other semiconductor manufacturer can gua ran-
tee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
Cypress is willing to work wi th the cu stomer who is concerned abou t the integrity of their code. Co de prot ection i s constantly
evolving. We at Cypress are committed to continuously improving the code protection features of our products.
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CY3273 Cypress Low Voltage Powerline Commu nication Evaluation Kit Guide, Do c. # 001-55382 Rev. *C 3
Contents
1. Introduction 5
1.1 Introduction to the Cypress PLC Solution....................................................................5
1.2 Using the Cypress PLC Solution .................................................................................5
1.3 Kit Contents.............. ... ................ .... ... ... ... .... ... ................ ... ... .... ... ... ................ ... .... ... ..7
1.4 Additional Learning Resources........................... ... ... .... ... ... ... .... ... ... ... ... .... ... ... ... .... ..... 7
1.5 Additional Requirements.............. .... ... ... ... .... ... ... ... ... .... ... ... ... .... ... ................ ... ... .... ... ..8
1.6 Document Revision History ........................................................................................9
1.7 Documentation Conventions .......................................................................................9
2. Getting Started 11
2.1 Kit Installation ........... ... ... .... ................ ... ... .... ... ... ... ................ .... ... ... ... ... ................. ... 11
2.2 Software Installati on .................... .... ... ... ... .... ................ ... ... ... .... ... ... ................ ... .... ...15
2.2.1 Before You Begin ...........................................................................................15
2.2.2 Prerequisites..................................................................................................15
2.2.3 Installing PLC Control Panel Software.............. ... ... ... .... ... ... ... ... .... ... ... ... .... ...15
3. PLC LV Evaluation Board 17
3.1 Features.....................................................................................................................17
3.2 Functional Overview .... ... .... ... ... ... .... ... ... ... .... ... ... ................ ... .... ... ... ... ... .... ... ... ... .... ...17
3.2.1 Operating Conditions .....................................................................................17
3.3 Hardware Description ................................................................................................18
3.3.1 Power Supply Circuit......................................................................................19
3.3.2 Transmit Amplifier Circuit...............................................................................20
3.3.3 Transmit and Receive Coupling Circuit..........................................................21
3.3.4 Cypress Powerline Communication Transceiver and User Controls..............22
3.4 Setting Up the PLC LV Board....................................................................................23
3.4.1 I2C Header Settings.......................................................................................23
3.4.2 Setting Up Manual Addressing on PLC Boards.............................................24
3.4.3 Setting Up the I2C Address of the Node........................................................25
3.4.4 Jumper Settings for the PLC LV Boards ........................................................25
3.5 Code Example ...........................................................................................................26
3.6 Technical Reference..................................................................................................26
A. Appendix 27
A.1 Schematics ................................................................................................................27
A.1.1 Board Overview............. ... .... ... ... ... .... ... ................ ... ... .... ... ... ... ... .... ... ... ... .... ...27
A.1.2 User Interface.................................................................................................28
A.1.3 Transmit Amplification and Receive Filter............ ................ ... ... .... ... ... ... ....... 29
A.1.4 Power Supply.................................................................................................30
A.2 Layout........................................................................................................................31
A.2.1 Top Layer.......................................................................................................31
A.2.2 Ground Layer....................... ... ... ... .... ... ... ... ... ................. ... ... ... ... .... ... ... ... .... ...32
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Contents
A.2.3 Power Layer...................................................................................................33
A.2.4 Bottom Layer .................................................................................................34
A.2.5 Top Silkscreen...............................................................................................35
A.2.6 Bottom Silkscreen..........................................................................................36
A.3 Bill of Materials..........................................................................................................3 7
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CY3273 Cypress Low Voltage Powerline Commu nication Evaluation Kit Guide, Do c. # 001-55382 Rev. *C 5
1. Introduction
1.1 Introduction to the Cypress PLC Solution
Cypress’s Powerline Communication Solution (PLC) enables transmission of command and control
data over high voltage and low voltage powerlines. This solution is developed for low bandwidth
powerline communication.
The CY3273 PLC Low Voltage (LV) Evaluation Board demonstrates the ability of the Cypress
CY8CPLC10 to transmit data at 2400 bps over low voltage (12 V to 24 V AC/DC) powerlines.
This guide includes the following chapters:
■Chapter 1 provides a brief overview of the Cyp ress PLC so lution. It descr ibes the conte nts of the
CY3273 evaluation kit and lists additional requirements to run the code examples, which are
included as part of the kit.
■Chapter 2 gives the fu nct i on a l and hi gh leve l har dw are de scr ip tion of th e Cyp re ss PLC LV
boards. It also describes the setup and operating procedure of the PLC LV board. It describes
features such as manual addressing, conn ection of USB-I2C bridge, and jumper settings with
examples.
■The Appendix contains the schematics, layout, and bill of materials.
1.2 Using the Cypress PLC Solution
Powerlines are one of the most widely available communication media in the world. The
pervasivene ss of po we rlin es makes it difficult to predict its characteristics and noise. Because o f th e
variable quality of powerline, implementing robust communication over powerline has been an
engineering challenge for years. With this in mind, the Cypress PLC solution is designed to enable
secure, reliable, and robust communication over powerline. Some of the features of Cypress PLC
are:
■Integrated powerline PHY modem with optimized amplifiers to work with rugged low voltage
powerlines.
■Powerline optimized network protocol that supp orts bidirectional communication with
acknowledge m en t ba se d sig naling and multiple retries.
■Support for 8-bit packet CRC and 4-bit header CRC for error detection and data packet
retransmission.
■Carrier Sense Multiple Access (CSMA) scheme that minimizes collisions between packet
transmissions on the powerline.
The Cypress PLC solution consists of three key elements as shown in Figure 1-1.
■Powerline network protocol layer
■Physical layer frequency shift keying (FSK) modem
■Power amplification and coupling circuits
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Introduction
Figure 1-1. Cypress PLC Solution Block Diagram
The powerline network protocol layer and physical layer FSK modem are implemented on the
CY8CPLC10 device. The power amplification and coupling circuits are built using discrete
components. The CY3273 board contains the CY8CPLC10 device along with the power
amplification and coupling circuit for communicating on low voltage (12 to 24 V AC/DC) powerlines.
For a detailed description of the design parameters for the circuit, refer to application note Cypress
Powerline Communication Board Design Analysis - AN55427.
The CY8CPLC10 device is controlled by an external host microcontroller through an I2C interface.
To evaluate this kit, an external host must be created.
■The first option is to use a PC to install and run the Cypress PLC Control Panel GUI, which is
included with this kit. The PC interfaces to the CY3273 boa rd through the CY324 0-I2USB Brid ge
that is included with this kit. Steps for setting up this system are provided in the quick start guide
that is provided in th e kit.
■The second option is to use an external microcontroller that runs a host application. The applica-
tion note, “AN52478 - Designing an external Host Application for Cypress's Powerline Communi-
cation IC CY8CPLC10, provides a code example that can be programmed on a PSoC
microcontroller board (in this case, the CY3210-PSoCEVAL1) and explains how to interface it to
the CY3273 board. This application note is provided with this kit.
Note To evaluate this kit, a second low voltage PLC kit is required. T he co mpatible kits are CY 3273
(this kit) and CY3275 Low Voltage PLC Development Kit. For information on these kits, visit
http://www.cypress.com/go/CY3273 and http://www.cypress.com/go/CY3275. For details on how to
program CY3275 boards with an I2C-PLC interface, refer to appendix A.2 of PLC Control Panel GUI
User Guide.
CY8CPLC10
Application
Circuitry
PSoC/
External µC
Powerline
Network Protocol
Powerline FSK
Modem PHY
AC/DC Powerline
Coupling Circuit (110 V-
240 V AC, 12 V-24 V
AC/DC, etc)
Host System
Powerline Communication Solution
I2C Packet
Powerline
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Introduction
1.3 Kit Contents
The PLC LV evaluation kit consists of the following:
■CY3273 quick st art guide
■CY3273 PLC LV evaluation board
■Five CY8CPLC10-PVXI samples
■CD containing:
❐CY8CPLC10 data sheet
❐Packet test software – PLC control panel application
❐PLC Control Panel Release Notes
❐CY3273 Release Notes
❐CY3273 evaluation board user guide
❐CY3273 board Altium design project
❐CY3273 board schematics, layout, and BOM
❐Application note – Designing an external Host Application for Cypress's Powerline Communi-
cation IC CY8CPLC10 - AN52478
■12 V power supply
■Daisy chain cable
■USB-I2C Bridge
■Ribbon cable for I2C communica tio n, ex te rn al re se t, an d po we rin g exte rn al bo a rd
■Retractable USB cable
1.4 Additional Learning Resources
Visit http://www.cypress.com/go/plc for additional learning resource s in the form of dat asheet s, tech-
nical reference manuals, and application notes.
■CY3273 Schematic.p df
http://www.cypress.com/?rID=38025
■CY3273 Board Layout.zip
http://www.cypress.com/?rID=38025
■CY3273 Kit documentation
http://www.cypress.com/go/CY3273
■For a list of PSoC Designer-related trainings, see
http://www.cypress.com/?rID=40543
■CY8CPLC10 datasheet
http://www.cypress.com/?rID=38236
■For more information rega rding PSoC Designer functiona lity and releases, refer to the user g uide
and release notes on the PSoC Designer web page:
www.cypress.com/go/psocdesigner
■For more information regarding PSoC Programmer, supported hardware, and COM layer, go to
the PSoC Programmer web page:
www.cypress.com/go/psocprogrammer
■Designing an External Host Application for Cypress's Powerline Communication IC CY8CPLC10
- AN52478
http://www.cypress.com/?rID=37956
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Introduction
1.5 Additional Requirements
The following Cypress demonstration kit is used in the example applications in this user guide. This
kit is available for purchase from http://www.cypress.com/go/CY3210-PSoCEVAL1.
CY3210-PSoCEval1 Kit
This PSoC Evaluation Kit features an evaluation board and MiniProg1 programming unit. The
evaluation board in cludes an LC D module, potentiom eter, LEDs, and plenty o f bread bo arding sp ace
to meet all your evaluation needs. The MiniProg1 programming unit is also included with the kit. It
programs PSoC devices directly on the eval uation board, o r on other boar ds through a 5-pin heade r.
This programming unit is small and comp act, and co nnect s to a PC through the USB 2.0 cable that is
provided.
The kit includes:
■Evaluation board with LCD module
■MiniProg1 programming unit
■PSoC Designer software CD
■28-pin CY8C29466-24PXI PDIP PSoC device sample
■USB 2.0 cable
■Getting Started guide
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Introduction
1.6 Document Revision History
1.7 Documentation Conventions
Table 1-1. Revision History
Revision PDF
Creation
Date
Origin
of
Change Description o f Change
** 08/13/2009 IUS New kit guide
*A 12/10/2009 RARP Content updates
*B 16/02/2011 FRE
Added Software Installation, Code Examples, and Technical Reference
sections. Added schematic in Section 2.3. Added references to the
compatible low voltage PLC kits. Added a reference to the quick start
guide for evaluation. Added clarifications to the text throughout.
*C 10/12/2011 ADIY Removed reference to CY3277 and CY8CLED16P 01. Added Getting
Started Section
Table 1-2. Document Conventions for Guides
Convention Usage
Courier New Displays file locations, user entered text, and source code:
C:\ ...cd\icc\
Italics Displays file names and reference documentation:
Read about the sourcefile.hex file in the PSoC Designer User Guide.
[Bracketed, Bold]Displays keyboard commands in procedures:
[Enter] or [Ctrl] [C]
File > Open Represents menu p a th s:
File > Open > New Project
Bold Displays commands, menu paths, and icon names in procedu res:
Click the File icon and then click Open.
Times New Roman Displays an equation:
2 + 2 = 4
Text in gray boxes Describes cautions or unique functionality of the product.
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2. Getting Started
This chapter describes how to install and configure the CY3273 - LV PLC Evaluation Kit.
2.1 Kit Installation
To install the kit software, follow these steps:
1. Insert the kit CD in your PC’s CD drive. The CD is designed to auto-run and the Kit Installer
Startup Sc reen appea rs.
2. Click Install CY3273 Low Voltage PLC Kit to start the installation.
Figure 2-1. Kit Installer Startup Screen
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Getting St arted
Note If auto-run does not execute, double -click the cyautorun.exe file on the root directory of the CD.
Figure 2-2. Root Directory of CD
3. The CY3273 - LV PLC Evaluation - InstallShield Wizard screen appears. Choose the folder
location to install the setup files. You can change the location of the folder using Change.
4. Click Next to launch the kit installer.
Figure 2-3. CY3273-LV PLC Evaluation InstallShield Wizard
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Getting Started
5. On the Product Installation Overview screen, select the installation type that best suits your
requirement. The drop-down menu has the options Typical, Complete, and Custom.
6. Click Next to start the installation.
Figure 2-4. Installation Type Options
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Getting St arted
7. When the installation begins, a list of all packages appears on the Installation Page.
8. A green check mark appears next to every package that is downloaded and installed.
9. Wait until all the packages are downloaded and installed successfully.
Figure 2-5. Installation Page
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CY3273 Cypress Low Voltage Powerline Commu nication Evaluation Kit Guide, Do c. # 001-55382 Rev. *C 15
Getting Started
10.Click Finish to complete the installation.
Figure 2-6. Installatio n Completion Page
2.2 Software Installation
2.2.1 Before You Begin
All Cypress software installations requ ire administrator pri vileges; however, this is not required to run
the installed software.
■Shut down any Cypress software that is currently running.
■Disconnect any Cypress devices (USB-I2C bridge, ICE Cube, or MiniProg) from your computer.
2.2.2 Prerequisites
The PLC Control Panel requires the latest versions of Microsoft .NET Framework, Adobe Acrobat
Reader, and a Windows Installer. If your computer does not have .NET Framework and Windows
Installer, the installation automatically installs it. However, if your computer does not have Adobe
Acrobat Reader, download and install it from the Adobe website.
2.2.3 Installing PLC Control Panel Software
The PLC Control Panel GUI is installed as a prerequisite when you install the CY3273 PLC LV Eval-
uation kit. Follow the steps on the screen to complete the installation.
If you need to reinstall this application, select Install PLC Control Panel GUI from the installation
screen, as shown in Figure 2-1 on page 11.
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Getting St arted
Click Start > All Programs > Cypress > PLC Control Panel > PLC Control Panel.
The PLC Control Panel application controls the CY3273 PLC LV Evaluation Kit over USB interface
from a PC. The application's startup display, when a board attached and operating, is shown in the
following figure.
Figure 2-7. PLC Control Panel Application
After installing PLC Control Panel, refer to the documentation as needed:
■<CD Drive>\ Software\PLC Control Panel\PLC Control Panel Release Notes.pdf
■<CD Drive>\ Software\PLC Control Panel\ User Guide for Cypress PLC Control Panel GUI.pdf
The PLC Control Panel user guide is a lso available in the installation directory. It contains inform a-
tion about installation and how to set up the kit to work with the GUI. You can also access it from the
Help menu in the PLC Control Panel GUI.
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3. PLC LV Evaluation Board
3.1 Features
The key features of the CY3273 evaluation board are:
■Chip power supply derived from 12 V to 24 V AC/DC
■On-chip powerline network protocol la yer and physical layer FSK modem
■LED status indicators for power, powerline transmit and receive, and band in use
■Five-position DIP switches
❐Three DIP switches for node logical address selection
❐One DIP switch to configure node I2C addr essing mode
❐One DIP switch to select between the external crystal and oscillator
■Integrated powerline modem PHY
3.2 Functional Overview
The PLC evaluation board is designed as an advanced evaluation, testing, and product develo pment
platform for low bandwidth (24 00 bps) powerline communication.
Data to be transmitted is sent to the CY8CPLC10 through the I2C serial communications interface
from a host microcontroller.
The CY8CPLC10 receives this I2C data and encapsulates it into a PLC network packet. The on-
board FSK modem modulates this packet and the coupling circuitry incorporates the resulting
sinusoidal waveform on to the existing waveform on the high voltage powerline bus.
3.2.1 Operating Conditions
■Input voltage: 12/24 V AC/DC
■Input current: 200 mA/150 mA
■Operating temperature: 0 °C to 40 °C
■Operating humidity condition: 5% to 95% relative humidity (RH), non-condensing
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PLC LV Evaluation Board
3.3 Hardware Description
The key se ctio ns of th e low vo ltage PLC evaluation board are highlighted in Figure 3-1. T he bo ard is
divided into four main sections:
■Power supply circuit
■Transmit amplifier
■Transmit and receive coupling circuit section
■Cypress powerline transceiver and user controls
Figure 3-1. Top View of Cypress PLC LV Evaluation Board
The communication signal flow on this LV board is:
Transmit: CY8CPL10 T X Pin → Power Amplifier Circuitry → LV PLC Circuitry → LV Powerline (12 V
to 24 V AC/DC)
Receive: LV Powerline (12 V to 24 V AC/DC) → LV PLC Circuitry → Passive Low Pass Filtering →
VDD/2 Biasing → CY8CPLC10 RX Pin
The core of the PLC LV board is the CY8CPLC10 chip. The board contains an I2C connector,
jumpers to control various functions, and a five-position DIP switch.
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PLC LV Evaluation Board
3.3.1 Power Supply Circuit
This section takes the power from the powerline and generates necessary low DC voltage for the
operation of the PLC transceiver and other compone nts on the chip.
The key components in this section are listed in the following table.
Table 3-1. Power Supply
The key components are circled in the following schematic.
Figure 3-2. Power Supply Schematic
Component Description
J4 This is the connector to hook up the power adapter.
U7 5 V regulator .
J1 This is a 2-pin header to connect other boards in daisy chain and power them. The cable to
do this is provided with the kit. Connect a maximum of five boards in one daisy chain.
DS1 This is a blue LED that glows when the board is powered on.
L4 This inductor blocks any high frequency power supply noise from disrupting the line. It also
minimizes any effect of loading from the power supply on the PLC signal.
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PLC LV Evaluation Board
3.3.2 Transmit Amplifier Circuit
This section takes the output signal from the transceiver chip. The circuit here amplifies the signal
for transmission over the powerline.
The key component s in this se ction are listed in the following table.
Table 3-2. Transmit Amplifier
The key components are circled in the following schematic.
Figure 3-3. Transmit Amplifier Schematic
Component Description
U1, Q3, Q2 This opamp and high gain transistors are used in the power amplification stage.
Q1 This transistor controls whether transmission is allowed based on the output of the
TXDISABLE pin
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PLC LV Evaluation Board
3.3.3 Transmit and Receive Coupling Circuit
This circuit couples the signal from the board on to the powerline. On the receive side, the same cir-
cuit couples the carrier on the powerline to the board, rejecting the low frequency power and noise
on the powerlin e.
The key components in this section are listed in the following table.
Table 3-3. Transmit and Receive Coupling Circuit
The key components are circled in the following schematic.
Figure 3-4. Transmit Amplifier Schematic
Component Description
L2 This inductor blocks very high frequency signals (for example, FM radio ) and offsets the
impedance of capacitor C30, so as to have a lower transmit impedance.
L3 This inductor, along with C30, filters out low frequency signals (for example, 50/60 Hz AC or
DC power) and presents a high impedance to the 132 kHz PLC signal.
C30 This is the coupling capacitor that couples the PLC signal and blocks the low frequency sig-
nals. Its voltage rating must be higher than the voltage on the powerline..
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PLC LV Evaluation Board
3.3.4 Cypress Powerline Communication Transceiver and User Controls
This section is the heart of the board. It has the CY8CPLC10 chip, which has the integrated
transceiver modem and network protocol. It also has the I2C header to communicate with the
external host processor. The DIP switches to control the addresses and the jumpers to control the
functionality of the chip are also located here. The red, blue, yellow, and green LEDs indicate the
status of the board when functioning. The key components and their use are as follows:
Table 3-4. Transceiver and User Controls
The key components are circled in the following schematic.
Component Description
CY8CPLC10 This is Cypress’s powerline transceiver device. It is a 28-pin SSOP device.
Tx LED[DS2] This is a green LED that glows when the board is transmitting data on to the powerline.
Rx LED[DS3] This is a red LED that glows when the CY8CPLC10 device is receiving data.
BIU LED [DS5] This is a yellow LED that glows when the transmit frequency band is in use.
S1 Reset switch to reset the CY8CPLC10 device.
S2[3-5] These dip switches are used to set up the logical address of the node in the network. This
is an easy way for you to quickly assign an address from 0 to 7 to the board in a network.
S1[3] is MSB and S1[5] is LSB for logical address assignment.
S2[2] This dip switch sets the I2C slave address to establish the communication with a host pro-
cessor. Setting the switch to OFF or ON sets the I2C address to external 0×01 or 0×7a
respectively.
S2[1] This dip switch controls the clock setting to the CY8CPLC10. Setting the switch to 0 or 1
sets the FSK modem clock to external 32 kHz crystal or external 24 MHz oscillator,
respectively. Note that the external crystal is always required for protocol timing.
Y1 This 32.768 kHz crystal is required for establishing the correct protocol timing and commu-
nication signal frequencies of the CY8CPLC10.
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PLC LV Evaluation Board
Figure 3-5. Transmit Amplifier Schematic
3.4 Setting Up the PLC LV Board
This section describes the components of the PLC evaluation board, the process of setting manual
addresses on the PLC LV board and the connection of USB-I2C Bridge and I2C cable to the I2C
header on the board.
3.4.1 I2C Header Settings
J8 is a five-pin header that can be used for communicating with an external board, powering an
external board, and resetting the CY8CPLC10 device from an external board. A five wire ribbon
cable provided with the CY3273 kit can be used to connect to J8. The following table describes the
J8 header pins.
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PLC LV Evaluation Board
Table 3-5. J8 I2C Header Pins
Figure 3-6. I2C Header for Commu nication
3.4.2 Setting Up Manual Addressing on PLC Boards
The PLC evaluation board contains a five-position DIP switch. The first three switches S2[3-5] are
used to manually set a logical addre ss for the PLC chip. Logical addresses for up to eight no des ca n
be set up using these DIP switches.
S2[3] is the MSB. S2[5] is the LSB. Set the DIP switch to the ON position for the particular bit to be
logic ‘1’ and OFF position for it to be logic ‘0’. For example, for setting the logical address of 0X06
(see Figure 3-7):
S2[5] → OFF = 0
S2[4] → ON = 1
S2[3] → ON = 1
J8 Pin Name Description
V – Vdd
The VDD pin can provide a maximum of 50 mA at 5 V to an external board. It is only
to source the current. Do not supply power to this pin for powering the CY8CPLC10
device. Note that the PWR jumper, as explained in the next section, needs to be
connected to enable this functionality.
G – Gnd The Gnd pin can provide the ground reference to an external board. This pin con-
nects to the ground of the CY3273 board.
D – I2C Data (SDA) The I2C data (SDA) pin is the data line for the I2C communication. This pin is
directly connected to the I2C_SDA pin on the CY8CPLC10 device. Check the next
section for appropriate jumper settings for I2C communication through this pin.
C – I2C Clock (SCL) The I2C clock (SCL) pin is the clock line for the I2C communication. This pin is
directly connected to the I2C_SCL pin on the CY8CPLC10 device. Check the next
section for appropriate jumper settings for I2C communication through this pin.
R – Reset Connecting the reset of an external board to this pin enables the resetting of the
CY8CPLC10 device through the external board. Note that the RES jumper, as
explained in the next section, must be connected to enable this functionality.
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CY3273 Cypress Low Voltage Powerline Commu nication Evaluation Kit Guide, Do c. # 001-55382 Rev. *C 25
PLC LV Evaluation Board
Figure 3-7. DIP Switches for Manual Addressing on the PLC Evaluation Boards
Note that the powerline network protocol supports 8-bit logical addressing, 16-bit extended logical
addressing, and 64-bit physical addressing; all of these are supported through software. An external
host or PSoC microcontroller can talk to the CY8CPLC10 internal memory map to set the appropri-
ate mode and wr ite a particular log ica l add re ss .
Manual addressing is an easy method to quickly assign a particular address between 0 and 7 to the
board, which may be a no de in a network.
Note After changing the address of the node, press the RESET button on the PLC LV board for the
change to take effect.
3.4.3 Setting Up the I2C Address of the Node
S2[1] dip switch is used to assign a specific I2C address to the node to communicate with the exter-
nal microcontroller/PSoC or USB-I2C bridge. When the S2[1] switch is in the OFF position, the
address of the node is 0x01 and when the position is ON, the address of the node is 0x7A. For fur-
ther details on I2C addressing, refer to the data sheet available on the CD.
3.4.4 Jumper Settings for the PLC LV Boards
Figure 3-8. Six Jumpers Available on Board
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26 CY3273 Cypress Low Voltage Powerline Communication Evaluation Kit Guide, Doc. # 001-55382 Rev. *C
PLC LV Evaluation Board
Table 3-6. Jumper Description
3.5 Code Example
The CY3273 kit is designed for systems that require a communication interface over low voltage
powerlines. Typically, these systems consist of a microcontroller or processor along wit h other elec-
tronic components that implement the host application functionality. For more information on this
interface, refer to AN52478 - Designing an External Host Application for Cypress's Powerline Com-
munication IC CY8CPLC10.
3.6 Technical Reference
For a real-time list of knowledge base articles for the CY3273 kit, refer to our Online Knowledge
Base. For any help with the installation of the Control Panel, refer to the Control Panel User Guide
provided in the kit CD. You can also download the latest revision of the GUI setup and user guide
from www.cypress.com/go/plc.
Jumper Name Use
INT This is not a jumper. It is a 2-pin header to connect the interrupt pin of the CY8CPLC10
device to an external host. Refer to the CY3273 board schematics to determine interrupt
and ground pins for this header .
PWR
This jumper should be connected if the user wants to provide power to an external board.
After this jumper is connected, power for the external board can be derived from the V
(VDD) and G (Gnd) connectors on the I2C header (J5). For example, if we connect
another PSoC EVAL1 board with this board, the PLC board can supply power to that
board too. The CY3273 board can provide a maximum of 50 mA at 5 V to an external
board through the V and G pins on the I2C header (J5).
RES This jumper is for enabling reset of the PLC device through an external board. After this
jumper is connected, the extern al board reset can be connected to the R (Reset) pin on
the I2C header (J8).
SCL
This is a pull up jumper. While communicating through I 2C (J8), one side has to pull up
the line. When the jumper is connected, the SCL line gets pulled high. Thi s ne eds to be
done when the user wants the I2C link to be pulled up by the CY3273 board.
This jumper does not need to be placed if the USB-I2C bridge is used for communication
to the host.
SDA
This is a pull up jumper. While communicating through I 2C (J8), one side has to pull up
the line. When the jumper is connected, the SDA line is pulled high. This must be done
when the user wants the I2C link to be pulled up by the CY3273 board.
This jumper does not need to be placed if the USB-I2C bridge is used for communication
to the host.
CLK This jumper is not available for use and should be left unconnected by the user.
[+] Feedback
CY3273 Cypress Low Voltage Powerline Commu nication Evaluation Kit Guide, Do c. # 001-55382 Rev. *C 37
A.3 Bill of Materials
Description Designator Qty Value Manufacturer Manufact urer Part# Digi-Key#
CAPACITOR,
CERAMIC, .1UF, 25V,
5%, X7R, 0603, SMD
C1, C5, C7,
C9, C11 5 .1UF AVX 06033C104JAT2A 478-3713-1-ND
CAPACITOR,
CERAMIC, 22PF,
100V, 5%, C0G, 0603,
SMD
C2, C3 2 22PF MURATA GRM1885C2A220J
A01D 490-1335-1-ND
CAPACITOR,
CERAMIC, .01UF , 25V ,
5%, N0G, 0603, SMD C4, C6, C22 3 .01UF TDK C1608C0G1E103J 445-2664-1-ND
CAPACITOR,
CERAMIC, .01UF , 25V
X7R 0603 C8 1 0.01uF AVX 06033C103JAT2A 06033C103JAT2A-ND
CAPACITOR
CERAMIC 1UF 16V
X7R 0603 C10 1 1UF PANASONIC GRM188R71C105K
A12D 490-3900-1-ND
CAPACITOR,
CERAMIC, 1.0UF , 25V ,
20%, X5S, 0603, SMD C18 1 1UF PANASONIC ECJ-1V41E105M PCC2354CT-ND
CAP 100UF 10V
ALUM ELECTRO-
LYTIC RADIAL C24 1 100uF PANASONIC ECA-1AM101 P5123-ND
CAPACITOR, ELEC-
TROLYTIC, RADIAL,
220UFD, 50VDC, 20% C25 1 220UF PANASONIC ECA-1HM221 P5183-ND
CAPACITOR,
CERAMIC, 100PF,
100V, 5%, C0G, 0603,
SMD
C26 1 100PF AVX 06031A101JAT2A 478-1146-1-ND
CAP CER .47UF 50V
X7R 1206 T/R C30 1 0.47UF TDK C3216X7R1H474K 445-1380-1-ND
CAPACITOR,
CERAMIC, 1UF, 50V,
20%, Y5V, 0805, SMD C31 1 1UF MURATA GRM21BF51H105Z
A12L 490-3903-1-ND
Capacitor 10uF,10V C39 1 10uF, 10V Vishay 293D106X9010A2T
E3 718-1121-1-ND
DUAL DIODE, W/
SERIES CONN.,
SCHOTTKY, 30V,
300MA
D1 1 BAT54S STMICRO BAT54SFILM 497-2522-1-ND
RECTIFIER, ES1B,
ULTRAFAST, 100V, 1A D2, D3, D10 3 ES1B DIODES INC. ES1B ES1B-FDICT-ND
TVS, BI-DIR., 44V,
600W, SMB D9 1 SMBJ33CA LITTELFUSE SMBJ33CA SMBJ33CALFCT-ND
LED, BLUE CLEAR,
470NM, 0603 SMD DS1 1 BLUE ROHM SML-E12BC7TT86 511-1589-1-ND
[+] Feedback
38 CY3273 Cypress Low Voltage Powerline Communication Evaluation Kit Guide, Doc. # 001-55382 Rev. *C
LED, CLEAR GREEN,
SMD, 2012 (0805) DS2 1 GRN LITE-ON LTST-C170KGKT 160-1414-1-ND
LED, SUPER RED
CLEAR, SMD, 2012
(0805) DS3 1 RED LITE-ON LTST-C170KRKT 160-1415-1-ND
LED, CLEAR YEL-
LOW, SMD, 2012
(0805) DS5 1 YEL LITE-ON LTST-C170KSKT 160-1416-1-ND
CONN HEADER 2POS
3.96MM VERT TIN J1 1 MOLEX 09-65-2028 WM18823-ND
HEADER, 2-pin J2 1 2 POS SULLINS PEC02SAAN S1012E-02-ND
HEADER, 2-pin J3, J6, J7,
J9, J10 5 2 POS SULLINS PEC02SAAN S1012E-02-ND
POWER JACK,
2.5X5.5MM, MALE,
CLOSED, SMD J4 1 JACK CUI INC PJ-002A-SMT CP-002APJCT-ND
CONN HEADER VERT
5POS .100 TIN J8 1 5 POS AMP/TYCO 640456-5 A19471-ND
FERRITE BEAD, EMI
FIL TER, 100 OHM, 4A,
0805 L2 1 100 TDK MPZ2012S101A 445-1567-1-ND
INDUCTOR, PWR,
470UH, 20%,
DCR=1.460, 0.5A,
SMD
L3 1 470UH PULSE P0752.474NLT 553-1071-1-ND
INDUCTOR, PWR,
470UH, 20%,
DCR=1.460, 0.5A,
SMD
L4 1 470UH PULSE P0752.474NLT 553-1071-1-ND
MOUNTING HOLES MT1, MT2,
MT3, MT4 4
NPN, GEN., 40V, .2A,
.225W,SOT23 Q1 1 MMBT3904 INFINEON MMBT3904LT1 MMBT3904LT1INCT-ND
NPN, LO-SA T , 45V , 3A,
DPAK Q2 1 ZXT690BK ZETEX ZXT690BKTC ZXT690BKCT-ND
PNP, LO-SA T, 40V, 3A,
DPAK Q3 1 ZXT790AK ZETEX ZXT790AK ZXT790AKCT-ND
RESISTOR, 330, 1%,
1/10W, 0603 SMD R2 1 330 YAGEO RC0603FR-
07330RL 311-330HRCT-ND
RESISTOR, 620,
0603, 1%, 1/10W , SMD R3, R4 2 620 ROHM MCR03EZPFX6200 RHM620HCT-ND
RESISTOR, 4.99,
0603, 1%, 1/10W , SMD R5 1 4.99 YAGEO RC0603FR-
074R99L 311-4.99HRCT-ND
RESISTOR, 0.0, 5% ,
1/10W, 0603 SMD R6 1 0.0 ROHM MCR03EZPJ000 RHM0.0GCT-ND
Description Designator Qty Value Manufacturer Manufact urer Part# Digi-Key#
[+] Feedback
CY3273 Cypress Low Voltage Powerline Commu nication Evaluation Kit Guide, Do c. # 001-55382 Rev. *C 39
RESISTOR, 2.1k, 5% ,
1/10W, 0603 SMD R9 1 2.1k Rohm MCR03EZPFX2101 RHM2.10KHCT-ND
RESISTOR, 10.0K,
1%, 1/10W, 0603 SMD
R13, R23,
R33, R43,
R48 5 10K ROHM MCR03EZPFX1002 RHM10.0KHCT-ND
RESISTOR, 402,
0603, 1%, 1/10W , SMD R14 1 402 ROHM MCR03EZPFX4020 RHM402HCT-ND
RESISTOR, 1.00K,
1%, 1/10W, 0603 SMD R15, R16,
R49 3 1.00K ROHM MCR03EZPFX1001 RHM1.00KHCT-ND
RESISTOR 4.70K, 1/
10W 1% 0603, SMD R25 1 4.7K YAGEO RC0603FR-074K7L 311-4.70KHRCT-ND
RESISTOR, 0.5, 1%,
1/4W, 2012 (0805),
SMD R27, R28 2 0.5 SUSUMU RL1220S-R50-F RL12S.50FCT-ND
RESISTOR, 7.50K,
0603, 1%, 1/10W , SMD R35, R36 2 7.50K ROHM MCR03EZPFX7501 RHM7.50KHCT-ND
RESISTOR, 10K, 1%,
1/10W, 0603 SMD R37, R39 2 10K ROHM MCR03EZPFX1002 RHM10.0KHCT- ND
RESISTOR, 715, 1%,
1/10W, 0603 SMD R45 1 715 ROHM MCR03EZPFX7150 RHM715HCT-ND
RESISTOR, 240,
0603, 1%, 1/10W , SMD R46 1 240 ROHM MCR03EZPFX2400 RHM240HCT-ND
RESISTOR, 100.0,
0603, 1%, 1/10W , SMD R52 1 100 ROHM MCR03EZPFX1000 RHM100HCT-ND
RESISTOR, 10 OHM
1W 5% METAL OXIDE R54 1 10 Ohm, 1W Stackpole RSMF 1 10 5% R RSMF110JRCT-ND
PUSH BUTTON, NO,
LIGHT TOUCH, 6MM,
160G FORCE, SMD S1 1 N.O. E-SWITCH TL3301AF160QG EG2526CT-ND
SWITCH DIP LOW
PRO 5 POS GOLD S2 1 E-Switch KAJ05LAGT EG4429-ND
OP AMP, R-R W/DIS-
ABLE, 190MHZ U1 1 LM6639 NATIONAL
SEMI LMH6639MF/NOPB LMH6639MFCT-ND
CY8CPLC10 Part U2 1 Cypress CY8CPLC10-
28PVXI
VOLT REG, ADJUST-
ABLE 1.2-37V, 1.5A,
SMD, DPAK U7 1 +ADJ ST MICRO LM317MDT-TR 497-1574-1-ND
CRYSTAL 32.768KHZ
12.5PF, CYLINDER,
SERIES ECS-31X Y1 1 32.768KHZ ECS INC ECS-3X8X X1123-ND
OSC 24.000MHZ 5.0V
+/-100PPM SMD Y2 1 24.00 MHz Crystek C3290-24.000 C3290-24.000-ND
Y2 (2nd
source) Citizen CSX750FCC24.000
M-UT 300-7214-2-ND
Description Designator Qty Value Manufacturer Manufact urer Part# Digi-Key#
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