The LCX08 contains four 2-input AND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. Features 5V tolerant inputs 2.3V-3.6V VCC specifications provided 5.5ns tPD max. (VCC = 3.3V), 10A ICC max. Power down high impedance inputs and outputs The 74LVX08 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. 24mA output drive (VCC = 3.0V) Implements proprietary noise/EMI reduction circuitry Latch-up performance exceeds JEDEC 78 conditions ESD performance: - Human body model > 2000V - Machine model > 150V Leadless DQFN package Ordering Information Order Number 74LCX08M Package Number M14A 74LCX08SJ M14D (1) Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX08BQX MLP14A 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm 74LCX08MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Note: 1. DQFN package available in Tape and Reel only. Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. (c)1995 Semiconductor Components Industries, LLC. August-2017, Rev. 2 Publication Order Number: 74LCX08/D 74LCX08 -- Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs 74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs General Description Pin Assignments for SOIC, SOP, and TSSOP IEEE/IEC Pad Assignments for DQFN (Top View) (Bottom View) Pin Description Pin Names Description An, Bn Inputs On Outputs DAP No Connect Note: DAP (Die Attach Pad) www.onsemi.com 2 74LCX08 -- Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs Logic Symbol Connection Diagrams Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC VI Parameter Rating Supply Voltage -0.5V to +7.0V DC Input Voltage -0.5V to +7.0V VO DC Output Voltage, Output in HIGH or LOW IIK DC Input Diode Current, VI < GND IOK DC Output Diode Current State(2) -0.5V to VCC + 0.5V -50mA VO < GND -50mA VO > VCC +50mA IO DC Output Source/Sink Current ICC DC Supply Current per Supply Pin IGND DC Ground Current per Ground Pin TSTG Storage Temperature 50mA 100mA 100mA -65C to +150C Note: 2. IO Absolute Maximum Rating must be observed. Recommended Operating Conditions(3) The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCC Parameter Min. Max. Units Operating 2.0 3.6 V Data Retention 1.5 3.6 Supply Voltage VI Input Voltage 0 5.5 V VO Output Voltage, HIGH or LOW State 0 VCC V VCC = 3.0V-3.6V 24 mA VCC = 2.7V-3.0V 12 VCC = 2.3V-2.7V 8 IOH / IOL TA t / V Output Current Free-Air Operating Temperature Input Edge Rate, VIN = 0.8V-2.0V, VCC = 3.0V Note: 3. Unused inputs must be held HIGH or LOW. They may not float. www.onsemi.com 3 -40 85 C 0 10 ns / V 74LCX08 -- Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs Absolute Maximum Ratings TA = -40C to +85C Symbol VIH VIL VOH VOL II Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage LOW Level Output Voltage Input Leakage Current VCC (V) Min. 2.3-2.7 1.7 2.7-3.6 2.0 Max. 2.3-2.7 0.7 0.8 2.3-3.6 IOH = -100A IOH = -8mA 1.8 2.7 IOH = -12mA 2.2 3.0 IOH = -18mA 2.4 IOH = -24mA 2.2 V IOL = 100A 0.2 2.3 IOL = 8mA 0.6 2.7 IOL = 12mA 0.4 3.0 IOL = 16mA 0.4 IOL = 24mA 0.55 0 VI 5.5V 2.3-3.6 Power-Off Leakage Current 0 ICC Quiescent Supply Current 2.3-3.6 Increase in ICC per Input 2.3-3.6 V VCC - 0.2 2.3 2.3-3.6 Units V 2.7-3.6 IOFF ICC Conditions V 5.0 A VI or VO = 5.5V 10 A VI = VCC or GND 10 A 3.6V VI 5.5V 10 VIH = VCC - 0.6V 500 A AC Electrical Characteristics TA = -40C to +85C, RL = 500 VCC = 3.3V 0.3V, CL = 50pF Symbol tPHL, tPLH Parameter Propagation Delay tOSHL, tOSLH Output to Output Skew(4) Min. 1.5 VCC = 2.7V, CL = 50pF VCC = 2.5V 0.2V, CL = 30pF Max. Min. Max. Min. Max. 5.5 1.5 6.2 1.5 6.6 Units 1.0 Note: 4. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). www.onsemi.com 4 ns ns 74LCX08 -- Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs DC Electrical Characteristics TA = 25C Symbol Parameter VCC (V) VOLP Quiet Output Dynamic Peak VOL 3.3 VOLV Quiet Output Dynamic Valley VOL Conditions Typical Unit CL = 50pF, VIH = 3.3V, VIL = 0V 0.8 V 2.5 CL = 30pF, VIH = 2.5V, VIL = 0V 0.6 3.3 CL = 50pF, VIH = 3.3V, VIL = 0V -0.8 2.5 CL = 30pF, VIH = 2.5V, VIL = 0V -0.6 V Capacitance Symbol Parameter Typical Units Input Capacitance VCC = Open, VI = 0V or VCC 7 pF COUT Output Capacitance VCC = 3.3V, VI = 0V or VCC 8 pF CPD Power Dissipation Capacitance VCC = 3.3V, VI = 0V or VCC, f = 10MHz 25 pF CIN Conditions www.onsemi.com 5 74LCX08 -- Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs Dynamic Switching Characteristics Test Switch tPLH, tPHL Open tPZL, tPLZ 6V at VCC = 3.3 0.3V VCC x 2 at VCC = 2.5 0.2V tPZH, tPHZ GND Figure 1. AC Test Circuit (CL includes probe and jig capacitance) Waveform for Inverting and Non-Inverting Functions 3-STATE Output High Enable and Disable Times for Logic Propagation Delay. Pulse Width and trec Waveforms Setup Time, Hold Time and Recovery Time for Logic 3-STATE Output Low Enable and Disable Times for Logic trise and tfall VCC Symbol 3.3V 0.3V 2.7V 2.5V 0.2V Vmi 1.5V 1.5V VCC / 2 Vmo 1.5V 1.5V VCC / 2 Vx VOL + 0.3V VOL + 0.3V VOL + 0.15V Vy VOH - 0.3V VOH - 0.3V VOH - 0.15V Figure 2. Waveforms (Input Characteristics; f = 1MHz, tr = tf = 3ns) www.onsemi.com 6 74LCX08 -- Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs AC Loading and Waveforms (Generic for LCX Family) www.onsemi.com 7 74LCX08 -- Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs Schematic Diagram (Generic for LCX Family) Tape Format for DQFN Package Designator Tape Section Number of Cavities Cavity Status Cover Tape Status BQX Leader (Start End) 125 (Typ.) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (Typ.) Empty Sealed Tape Dimensions inches (millimeters) Reel Dimensions inches (millimeters) Tape Size A B C D N W1 W2 12mm 13.0 (330.0) 0.059 (1.50) 0.512 (13.00) 0.795 (20.20) 2.165 (55.00) 0.488 (12.4) 0.724 (18.4) www.onsemi.com 8 74LCX08 -- Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs Tape and Reel Specification ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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