This is information on a product in full production.
April 2016 Doc ID 023829 Rev 5 1/31
VN5T006ASP-E
Single-channel high-side driver with analog current sense
for 24 V automotive applications
Datasheet
−
production data
Features
•AEC-Q100 qualified
•General
– Very low standby current
– 3 V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– Compliance with 2002/95/EC European
directive
– Fault reset standby pin (FR_Stby)
•Diagnostic functions
– Proportional load current sense
– Current sense precision for wide range
currents
– Off-state open-load detection
– Output short to V
CC
detection
– Overload and short to ground latch-off
– Therm al sh utdown latc h-off
– Very low current sense leakage
•Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Therm al sh utdow n
– Reverse battery protected with self switch
of the PowerMO S
– Electros tatic disc harge protection
Application
•All types of resistive, inductive and capacitive
loads
Description
The VN5T006ASP-E is a device made using
STMicroelectronics
®
VIPower
®
technology,
intended for driving resistive or inductive loads
with one side connected to ground. Active V
CC
pin voltage clamp protects the device against low
energy spi k es .
This device integrates an analog current sense
which delivers a current proportional to the load
current. Fault conditions such as overload,
overtemperature or short to V
CC
are reported via
the current sense pin.
Output current limitation protects the device in
overload condition. The device latches off in case
of overload or thermal shutdown.
The device is reset by a low-level pass on the
fault reset standby pin.
A permanent low level on the inputs and fault
reset standby pin disables all outputs and sets the
device in standby m ode .
Max transient supply voltage V
CC
58 V
Operati ng vol tage range V
CC
8 V to 36 V
Typ on-state resista nc e R
ON
6mΩ
Current lim itation (typ) I
LIM
115 A
Off-sta t e sup pl y curr e nt I
S
2µA
(1)
1. Typical value with all loads connected.
PowerSO-10
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Contents VN5T006ASP-E
2/31 Doc ID 023829 Rev 5
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Elect rical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.2 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3 Maximum demagneti zation energy (VCC = 24 V) . . . . . . . . . . . . . . . . . . 22
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.1 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.1 ECOPACK
®
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.2 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Doc ID 023829 Rev 5 3/31
VN5T006ASP-E List of tables
3
List of tables
Table 1. Pin function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC = 24 V; Tj = 25°C). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Current sense (8 V < V
CC
< 36 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 10. Open-load detection (FR_Stby = 5 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 16. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 17. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
List of figures VN5T006ASP-E
4/31 Doc ID 023829 Rev 5
List of figures
Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. T
reset
definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. T
stby
definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Output stuck to V
CC
detection delay time at FR
STBY
activation . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Open-load off-state delay timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Delay response time between rising edge of output current and rising edge of
current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Output voltage drop limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 12. Device behavior in overload condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 13. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 17. Input high level voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. On state resistance vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 20. On state resistance vs V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 21. I
LIMH
vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 25. Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. PowerSO-10 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 27. Rthj-amb vs PCB copper area in open box free air condition (one channel on). . . . . . . . . 23
Figure 28. PowerSO-10 thermal impedance junction ambient single pulse (one channel on). . . . . . . 24
Figure 29. Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 24
Figure 30. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 31. PowerSO-10 suggested pad layout and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . 28
Figure 32. PowerSO-10 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Doc ID 023829 Rev 5 5/31
VN5T006ASP-E Block diagram and pin description
30
1 Block diagram and pin description
Figure 1. Block diagram
Table 1. Pin function
Name Function
V
CC
Battery connec ti on.
OUT Power output.
GND Ground connection.
IN Voltage controlled input pin with hysteresis, CMOS compatible; it controls output
switch state.
CS Analog current sense pin; it delivers a current proportional to the load current.
FR_Stby In case of latch-off for overtemperature /overcurrent condition, a low pulse on the
FR_Stby pin is needed to reset the channel.
The device enters in standby mode if all inputs and the FR_Stby pin are low.
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Block diagram and pin description VN5T006ASP-E
6/31 Doc ID 023829 Rev 5
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection /
pin CS N.C. OUT IN FR_Stby
Floating Not allowed X
(1)
1. X: do not care.
XXX
To ground Through 10 KΩ
resistor X Not allowed Through 10 KΩ
resistor Through 10 KΩ
resistor
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Doc ID 023829 Rev 5 7/31
VN5T006ASP-E Electrical specifications
30
2 Electrical specifications
Fig ure 3. Current and voltage conventions
2.1 Absolute maximum ratings
Stressing the device above the ratings listed in Table 3 may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to the conditions reported in this section for extended periods may affect device
reliability.
IS
IGND
VCC
OUT
IOUT
ISENSE
IN
IIN
GND
FR_Stby
VFR_Stby
VIN
CS VSENSE
VOUT
VF
IFR_Stby
VCC
GAPGCFT00195
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
DC supply voltage 58 V
-V
CC
Reverse DC supply voltage -32 V
I
OUT
DC output current Internally limited A
-I
OUT
Reverse D C output current 90 A
I
IN
DC input current -1 to 10 mA
I
FR_Stby
Fault reset standby DC input current -1 to 1.5 mA
V
CSENSE
Current sense maximum voltage V
CC
- 58 to +V
CC
V
E
MAX
Maximum switching energy
(L = 10 mH; V
bat
= 32 V; T
jstart
= 150°C; I
OUT
=8.9A) 880 mJ
L
SMAX
Maximum stray inductance in short circuit condition
V
bat
= 32 V; R
L
= 300 mΩ; T
jstart
= 150°C; I
OUT
=I
limH_max
40 µH
Electrical specifications VN5T006ASP-E
8/31 Doc ID 023829 Rev 5
2.2 Thermal data
V
ESD
Electrostatic discharge
(human body model: R = 1.5 KΩ; C = 100 pF)
–IN
–CS
–FR_Stby
–OUT
–V
CC
4000
2000
4000
5000
5000
V
V
V
V
V
V
ESD
Charge device model (CDM-AEC-Q100-011) 750 V
T
j
Junction operating temperature -40 to 150 °C
T
stg
Storage temperature -55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Table 4. Thermal data
Symbol Parameter Value Unit
R
thj-case
Thermal resis t an ce jun cti on -cas e (ma x.) (with one channel on) 0.8 °C/W
R
thj-amb
Thermal resistance junction-ambient (max.) See Figure 27 °C/W
Doc ID 023829 Rev 5 9/31
VN5T006ASP-E Electrical specifications
30
2.3 Electrical characteristics
8 V < V
CC
< 36 V; -40°C < T
j
< 150°C, unless otherwise specified.
Table 5. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CC
Operating supply voltage 8 24 36 V
V
USD
Undervo lt age shut do w n 3.5 5 V
V
USDhyst
Undervo lt age shut do w n
hysteresis 0.5 V
R
ON
On-state resistance
(2)
I
OUT
=10A; T
j
= 25°C;
8V<V
CC
<36V 6mΩ
I
OUT
=10A; T
j
= 150°C;
8V<V
CC
<36V 12
R
ON REV
Reverse battery
on-state resistance V
CC
=-24V; I
OUT
= -10 A;
T
j
=25°C 6mΩ
V
clamp
Clamp vo lt ag e I
S
=20mA 58 64 70 V
I
S
Supply cu rrent
Off-state: V
CC
=24V; T
j
=25°C;
V
IN
=V
OUT
=V
SENSE
=0V 2
(1)
1. PowerMOS leakage included.
5µA
On-st a te: V
CC
=24V; V
IN
=5V;
I
OUT
=0A 36mA
I
L(off1)
Off-state output current
V
IN
=V
OUT
=0V; V
CC
=24V;
T
j
=25°C 00.013 µA
V
IN
=V
OUT
=0V; V
CC
=24V;
T
j
=125°C 05
Table 6. Switching (V
CC
=24V; T
j
= 25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
Turn-on delay time R
L
=2.4Ω—32—µs
t
d(off)
Turn-off delay time R
L
=2.4Ω—67—µs
dV
OUT
/dt
(on)
Turn-on voltage slope R
L
=2.4Ω0.7 V/µs
dV
OUT
/dt
(off)
Turn-off voltage slope R
L
=2.4Ω0.46 V/µs
W
ON
Switching energy
loss es during t
won
R
L
=2.4Ω—4.15— mJ
W
OFF
Switching energy
loss es during t
woff
R
L
=2.4Ω—2.7—mJ
Electrical specifications VN5T006ASP-E
10/31 Doc ID 023829 Rev 5
Figure 4. T
reset
definition
Table 7. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IL
Low-level input voltag e 0.9 V
I
IL
Low-level inp ut curre nt V
IN
=0.9V 1 µA
V
IH
High-level input voltage 2.1 V
I
IH
High-level input current V
IN
=2.1V 10 µA
V
I(hyst)
Input hysteresis voltage 0.25 V
V
ICL
Input cl amp voltage I
IN
= 1mA 5.5 7 V
I
IN
=-1mA -0.7
V
FR_Stby_L
Low-level
fault-reset-standby
voltage 0.9 V
I
FR_Stby_L
Low-level
fault-reset-standby
current V
FR_Stby
=0.9V 1 µA
V
FR_Stby_H
High-level
fault-reset-standby
voltage 2.1 V
I
FR_Stby_H
High-level
fault-reset-standby
current V
FR_Stby
=2.1V 10 µA
V
FR_Stby
(hyst) Fault-reset-standby
hysteresis voltage 0.25 V
V
FR_Stby_CL
Fault-reset-standby
clamp voltage I
FR_Stby
= 15 mA (10 ms) 11 15 V
I
FR_Stby
=-1mA -0.7
t
reset
Overload latch-off reset
time See Figure 4 224µs
t
stby
Standby delay See Figure 5 120 1200 µs
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Doc ID 023829 Rev 5 11/31
VN5T006ASP-E Electrical specifications
30
Figure 5. T
stby
definition
Table 8. Protections and diagnostics
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
DC short-circuit current V
CC
= 24 V 81 115 162 A
5V<V
CC
< 36 V 162 A
I
limL
Short-circuit current
during thermal cycling V
CC
=24V; T
R
<T
j
<T
TSD
29 A
T
TSD
Shutdown temperature 150 175 200 °C
T
R
Reset te mpera ture T
RS
+ 1 T
RS
+ 5 °C
T
RS
Thermal reset of status 135 °C
T
HYST
Thermal hysteresis
(T
TSD
- T
R
)7°C
V
DEMAG
Turn-off output voltage
clamp I
OUT
=10A; V
IN
=0V;
L=6mH V
CC
- 58 V
CC
- 64 V
CC
- 70 V
V
ON
Output vol tage drop
limitation I
OUT
= 1 A;
T
j
= -40°C to 150°C 25 mV
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Electrical specifications VN5T006ASP-E
12/31 Doc ID 023829 Rev 5
f
Table 9. Current sense (8 V < V
CC
<36V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
K
0
I
OUT
/I
SENSE
I
OUT
= 0.6 A; V
SENSE
=0.5V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 3930
5035 11250 19850
17055
dK
0
/K
0(1)
Current sense
ratio drift I
OUT
= 0.6 A; V
SENSE
= 0.5 V;
T
j
= -40°C to 150°C -30 30 %
K
1
I
OUT
/I
SENSE
I
OUT
= 1.6 A; V
SENSE
=1V;
T
j
= -40°C to 150°C;
T
j
= 25°C to 150°C 5600
6215 10750 16940
14660
dK
1
/K
1(1)
Current sense
ratio drift I
OUT
= 1.6 A; V
SENSE
=1V;
T
j
= -40°C to 150°C -28 25 %
K
2
I
OUT
/I
SENSE
I
OUT
= 2.4 A; V
SENSE
=1V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 6030
6200 10370 15865
13635
dK
2
/K
2(1)
Current sense
ratio drift I
OUT
= 2.4 A; V
SENSE
=1V;
T
j
= -40°C to 150°C -26 23 %
K
3
I
OUT
/I
SENSE
I
OUT
= 3 A; V
SENSE
=2V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 6040
6040 10070 15285
13090
dK
3
/K
3(1)
Current sense
ratio drift I
OUT
= 3 A; V
SENSE
=2V;
T
j
= -40°C to 150°C -25 22 %
K
4
I
OUT
/I
SENSE
I
OUT
= 6 A; V
SENSE
=4V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 5845
6000 8670 13630
10895
dK
4
/K
4(1)
Current sense
ratio drift I
OUT
= 6 A; V
SENSE
=4V;
T
j
= -40°C to 150°C -20 20 %
K
5
I
OUT
/I
SENSE
I
OUT
=10A; V
SENSE
=4V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 5920
6730 8400 11520
9765
dK
5
/K
5(1)
Current sense
ratio drift I
OUT
=10A; V
SENSE
=4V;
T
j
= -40°C to 150°C -15 15 %
K
6
I
OUT
/I
SENSE
I
OUT
=20A; V
SENSE
=4V;
T
j
= -40°C to 150°C 6960 8330 10090
dK
6
/K
6(1)
Current sense
ratio drift I
OUT
=20A; V
SENSE
=4V;
T
j
= -40°C to 150°C -8 8 %
dK/K
BULB1(1)
Current sense
ratio drift
I
OUT
= 0.6 A to 6 A; I
CAL
= 3 A;
V
SENSE
=0.5V;
T
j
= -40°C to 150°C -30 50 %
dK/K
BULB2(1)
Current sense
ratio drift
I
OUT
= 1.6 A to 4.2 A;
I
OUTCAL
= 3 A; V
SENSE
=2V;
T
j
= -40°C to 150°C -30 26 %
dK/K
BULB3(1)
Current sense
ratio drift
I
OUT
= 0.6 A to 2.4 A;
I
OUTCAL
= 1.6 A; V
SENSE
=2V;
T
j
= -40°C to 150°C -27 25 %
Doc ID 023829 Rev 5 13/31
VN5T006ASP-E Electrical specifications
30
I
SENSE0
Analog sense
leakage current
I
OUT
= 0 A; V
SENSE
=0V;
V
IN
=0V; T
j
= -40°C to 150°C 01
µA
I
OUT
= 0 A; V
SENSE
=0V;
V
IN
=5V; T
j
= -40°C to 150°C 02
V
SENSE
Max analog
sense output
voltage I
OUT
=40A; R
SENSE
=3.9KΩ5V
V
SENSEH
Analog sense
output voltage in
fault condition
(2)
V
CC
=24V; R
SENSE
=3.9KΩ8V
I
SENSEH
Analog sense
output current in
fault co ndition
(2)
V
CC
=24V; V
SENSE
=5V 9 12 mA
t
DSENSE2H
Delay r esp on se
time from rising
edge of IN pin
V
SENSE
<4V; 1A<I
OUT
<40A;
I
SENSE
=90% of I
SENSEMAX
(see Figure 7)300 600 µs
Δt
DSEN
SE
2H
Delay r esp on se
time between
rising edge of
output current
and rising edge
of current sense
V
SENSE
<4V;
I
SENSE
= 90% of I
SENSEMAX,
I
OUT
=90% of I
OUTMAX
I
OUTMAX
= 10 A (see Figure 10)
450 µs
t
DSENSE2L
Delay r esp on se
time from falling
edge of IN pin
V
SENSE
<4V; 1A<I
OUT
<40A;
I
SENSE
= 10 % of I
SENSEMAX
(see Figure 7)520µs
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open-load in OFF-state condition.
Table 10. Open-load detection (FR_Stby = 5 V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
OL
Open-lo ad Off-st ate
voltage detection
threshold V
IN
=0V; 8V<V
CC
<36V 2 4 V
t
DSTKON
Output sho rt-c ircuit to
V
CC
detection delay at
turn-off See Figure 8 180 1800 µs
I
L(off2)
Off - st a te outp ut curre nt
at V
OUT
= 4 V V
IN
=0V; V
SENSE
=0V;
V
OUT
rising from 0 V to 4 V -120 0 µA
Table 9. Current sense (8 V < V
CC
< 36 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Electrical specifications VN5T006ASP-E
14/31 Doc ID 023829 Rev 5
Figure 6. Output stuck to V
CC
detection delay time at FR
STBY
activation
Figure 7. Current sense delay characteristics
t
d_vol
Delay r espon se from
output rising edge to
V
SENSE
rising edge in
open-load
V
OUT
=4V; V
IN
=0V;
V
SENSE
= 90% of V
SENSEH
20 µs
t
DFRSTK_ON
Output short circuit to
V
CC
detection delay at
FR
STBY
activation See Figure 6; Inpu t
1,2
= low 50 µs
Table 10. Open-load detection (FR_Stby = 5 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
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VN5T006ASP-E Electrical specifications
30
Figure 8. Open-load off-state delay timing
Figure 9. Switching characteristics
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Electrical specifications VN5T006ASP-E
16/31 Doc ID 023829 Rev 5
Figure 10. Delay response time between rising edge of output c urrent and rising edge
of current sense
Figure 11. Output voltage drop limitation
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VN5T006ASP-E Electrical specifications
30
Figure 12. Device behavior in overload condition
Table 11. Truth table
Conditions Fault reset
standby Input Output Sense
Standby L L X 0
Normal operati on X
XL
HL
H0
Nominal
Overload X
XL
HL
H0
> Nominal
Overtemperature /
short to ground
X
L
H
L
H
H
L
Cycling
Latched
0
V
SENSEH
V
SENSEH
Undervoltage X X L 0
Short to V
BAT
L
H
X
L
L
H
H
H
H
0
V
SENSEH
< Nominal
Open-load Off-state
(with pull-up)
L
H
X
L
L
H
H
H
H
0
V
SENSEH
0
Negative output
voltage clamp X L Negative 0
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Electrical specifications VN5T006ASP-E
18/31 Doc ID 023829 Rev 5
Table 12. Electrical transient requirements (p art 1)
ISO 7637-2:
2004(E)
Test pulse
Test levels
(1)
1. The above test levels must be considered referred to V
CC
= 24.5V except for pulse 5b
Number of
pulses or
test times
Burst cycle/p ulse
repetition time Delays and
impedance
III IV
1 - 450 V - 600 V 5000
pulses 0.5 s 5 s 1 ms, 50 Ω
2a + 37 V + 50 V 5000
pulses 0.2 s 5 s 50 µs, 2 Ω
3a - 150 V - 200 V 1h 90 ms 100 ms 0.1 µs, 50 Ω
3b + 150 V + 200 V 1h 90 ms 100 ms 0.1 µs, 50 Ω
4 - 12 V - 16 V 1 pulse 100 ms, 0.01
Ω
5b
(2)
2. Valid in case of external load dump clamp: 58V maximum referred to ground.
+ 123 V + 174 V 1 pulse 350 ms, 1
Ω
Table 13. Electrical transient requirements (part 2)
ISO 7637-2:
2004(E)
Test pulse
Test level result s
III IV
1C C
(1)
1. With R
LOAD
<24Ω.
2a C C
3a C C
3b
(2)
2. Without capacitor between V
CC
and GND.
EE
3b
(3)
3. With 10 nF between V
CC
and GND.
CC
4C C
5b
(4)
4. External load dump clamp: 58 V maximum, referred to ground.
CC
Table 14. Electrical transient requirements (part 3)
Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
EOne or m ore funct ions of th e device are not pe rformed as de signed a fter exposure to
disturba nce and canno t be returne d to proper opera tion with out repla cing th e devic e.
Doc ID 023829 Rev 5 19/31
VN5T006ASP-E Electrical specifications
30
2.4 Electrical characteristics curves
Figure 13. Off-state output current Figure 14. High l evel input current
Figure 15. Input clamp voltage Figure 16. Input low level voltage
Figure 17. Input high level voltage Figure 18. Input hysteresis voltage
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Electrical specifications VN5T006ASP-E
20/31 Doc ID 023829 Rev 5
Figure 19. On state resistance vs T
case
Figure 20. On state resistance vs V
CC
Figure 21. I
LIMH
vs T
case
Figure 22. Turn-On voltage slope
Figure 23. Turn-Off voltage slope
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Doc ID 023829 Rev 5 21/31
VN5T006ASP-E Application information
30
3 Application information
Figure 24. Application schematic
3.1 Load dump protection
D
ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line
that are greater than the ones shown in the ISO 7637-2 2004 (E) table.
3.2 MCU I/Os protection
When negative transients are present on the V
CC
line, the control pins is pulled negative. ST
suggests to insert a resistor (R
prot
) in line to prevent the microcontroller I/O pins from
latching-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of
microcontroller I/Os.
Equation 1
-V
CCpeak
/ I
latchup
≤ R
prot
≤ (V
OHμC
- V
IH
) / I
IHmax
Calculation example:
For V
CCpeak
= -600 V and I
latchup
≥ 20 mA; V
OHμC
≥ 4.5 V
30 KΩ ≤ R
prot
≤ 190 kΩ.
Recommended value: R
prot
= 56 kΩ
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Application information VN5T006ASP-E
22/31 Doc ID 023829 Rev 5
3.3 Maximum demagnetization energy (V
CC
=24V)
Figure 25. Maximum turn-off current versus inductance
Note: Values are generated with R
L
=0
Ω
.
In case of repetitive pulses, T
jstart
(at the beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
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Doc ID 023829 Rev 5 23/31
VN5T006ASP-E Package and PCB thermal data
30
4 Package and PCB thermal data
4.1 PowerSO-10 thermal data
Figure 26. PowerSO-10 PC board
1. Layout condition of R
th
and Z
th
measurements (Board finish thickness 1.6 mm +/- 10%; Board double layer;
Board dimension 77 x 86; Board Material FR4; Cu thickness 0.070 mm (front and back side); Thermal vias
separation 1.2 mm; Thermal via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias 0.025 mm).
Figure 27. R
thj-amb
vs PCB copper area in open box free air condition (one channel
on)
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Package and PCB thermal data VN5T006ASP-E
24/31 Doc ID 023829 Rev 5
Figure 28. PowerSO-10 thermal impedance junction ambient single pulse (one
channel on)
Figure 29. Thermal fitting model of a double channel HSD in PowerSO-10
1. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Equation 2: pulse calculation formula
where δ = t
P
/T
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Doc ID 023829 Rev 5 25/31
VN5T006ASP-E Package and PCB thermal data
30
Table 15. Thermal parameters
Area/island (cm
2
)Footprint28
R1 (°C/W) 0.05
R2 (°C/W) 0.3
R3 (°C/W) 1.2
R4 (°C/W) 7
R5 (°C/W) 13 12 8
R6 (°C/W) 24 20 14
C1 (W.s/°C) 0.05
C2 (W.s/°C) 0.1
C3 (W.s/°C) 1
C4 (W.s/°C) 2
C5 (W.s/°C) 3 4 8
C6 (W.s/°C) 6 8 14
Package information VN5T006ASP-E
26/31 Doc ID 023829 Rev 5
5 Package information
5.1 ECOPACK
®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
5.2 PowerSO-10 mechanical data
Figure 30. PowerSO-10 package dimensions
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Doc ID 023829 Rev 5 27/31
VN5T006ASP-E Package information
30
Table 16. PowerSO-10 mechanical data
Symbol Millimeters
Min. Typ. Max.
A 3.35 3.65
A
(1)
1. Muar only POA P013P.
3.4 3.6
A1 0.00 0.10
B 0.40 0.60
B
(1)
0.37 0.53
C 0.35 0.55
C
(1)
0.23 0.32
D 9.40 9.60
D1 7.40 7.60
E 9.30 9.50
E2 7.20 7.60
E2
(1)
7.30 7.50
E4 5.90 6.10
E4
(1)
5.90 6.30
e1.27
F 1.25 1.35
F
(1)
1.20 1.40
H 13.80 14.40
H
(1)
13.85 14.35
h0.50
L 1.20 1.80
L
(1)
0.80 1.10
a0º 8º
α
(1)
2º 8º
Package information VN5T006ASP-E
28/31 Doc ID 023829 Rev 5
5.3 Packing information
Figure 31. PowerSO-10 suggested pad layout and tube shipment (no suffix)
Figure 32. PowerSO-10 tape and reel shipment (suffix “TR”)
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Doc ID 023829 Rev 5 29/31
VN5T006ASP-E Order codes
30
6 Order codes
Table 17. Device summary
Package Order codes
Tube Tape and reel
PowerSO-10 VN5T006ASP-E VN5T006ASPTR-E
Revision history VN5T006ASP-E
30/31 Doc ID 023829 Rev 5
7 Revision history
Table 18. Document revision history
Date Revision Changes
19-Dec-2012 1 Initial release.
16-Jan-2013 2
Updated Figure 3: Current and voltage conventions
Table 6: Switching (VCC = 24 V; Tj = 25°C):
–dV
OUT
/dt
(on)
dV
OUT
/dt
(on)
: updated values
Table 9: Current sense (8 V < V
CC
<36V):
–I
OL
: removed row
– dK/K
BULB2
, dK/K
BULB2
: updated test conditions
Updated Tabl e 22: Tur n-On voltage slope and Table 23: Turn-Off
vol tage slope
16-Jun-2013 3 Changed document status from “preliminary data” to “production
data”
17-Sep-2013 4 Updated disclaimer.
11-Apr-2016 5 Added AEC-Q101 qualif ied in Features section
Table 9: Current sense (8 V < V
CC
<36V):
–dK
6
/K
6
: updated test conditions
Doc ID 023829 Rev 5 31/31
VN5T006ASP-E
31
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