VN5T006ASP-E Single-channel high-side driver with analog current sense for 24 V automotive applications Datasheet - production data * Protections - Undervoltage shutdown - Overvoltage clamp - Load current limitation - Self limiting of fast thermal transients - Protection against loss of ground and loss of VCC - Thermal shutdown - Reverse battery protected with self switch of the PowerMOS - Electrostatic discharge protection ("1($'5 PowerSO-10 Features Max transient supply voltage VCC 58 V Operating voltage range VCC 8 V to 36 V Typ on-state resistance RON 6 m Current limitation (typ) ILIM 115 A Off-state supply current IS 2 A(1) Application * All types of resistive, inductive and capacitive loads Description 1. Typical value with all loads connected. * AEC-Q100 qualified * General - Very low standby current - 3 V CMOS compatible input - Optimized electromagnetic emission - Very low electromagnetic susceptibility - Compliance with 2002/95/EC European directive - Fault reset standby pin (FR_Stby) * Diagnostic functions - Proportional load current sense - Current sense precision for wide range currents - Off-state open-load detection - Output short to VCC detection - Overload and short to ground latch-off - Thermal shutdown latch-off - Very low current sense leakage April 2016 This is information on a product in full production. The VN5T006ASP-E is a device made using STMicroelectronics(R) VIPower(R) technology, intended for driving resistive or inductive loads with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes. This device integrates an analog current sense which delivers a current proportional to the load current. Fault conditions such as overload, overtemperature or short to VCC are reported via the current sense pin. Output current limitation protects the device in overload condition. The device latches off in case of overload or thermal shutdown. The device is reset by a low-level pass on the fault reset standby pin. A permanent low level on the inputs and fault reset standby pin disables all outputs and sets the device in standby mode. Doc ID 023829 Rev 5 1/31 www.st.com Contents VN5T006ASP-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 4 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.1 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.2 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.3 Maximum demagnetization energy (VCC = 24 V) . . . . . . . . . . . . . . . . . . 22 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.1 5 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.1 ECOPACK(R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.2 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2/31 Doc ID 023829 Rev 5 VN5T006ASP-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 24 V; Tj = 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Current sense (8 V < VCC < 36 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Open-load detection (FR_Stby = 5 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Doc ID 023829 Rev 5 3/31 3 List of figures VN5T006ASP-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. 4/31 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Treset definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Tstby definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Output stuck to VCC detection delay time at FRSTBY activation . . . . . . . . . . . . . . . . . . . . . 14 Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Delay response time between rising edge of output current and rising edge of current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Device behavior in overload condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 On state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 On state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Rthj-amb vs PCB copper area in open box free air condition (one channel on) . . . . . . . . . 23 PowerSO-10 thermal impedance junction ambient single pulse (one channel on). . . . . . . 24 Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 24 PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 PowerSO-10 suggested pad layout and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . 28 PowerSO-10 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Doc ID 023829 Rev 5 VN5T006ASP-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram 9&& 6LJQDO&ODPS 5HYHUVH EDWWHU\ SURWHFWLRQ 8QGHUYROWDJH ,1 &RQWURO 'LDJQRVWLF 3RZHU &ODPS '5,9(5 &+ 921 /LPLWDWLRQ &XUUHQW /LPLWDWLRQ 2YHU 7HPSHUDWXUH 2))VWDWH 2SHQORDG )5B6WE\ 96(16(+ &6 &XUUHQW 6HQVH /2*,& 287 29(5/2$'3527(&7,21 $&7,9(32:(5/,0,7$7,21 *1' *$3*&)7 Table 1. Pin function Name Function VCC Battery connection. OUT Power output. GND Ground connection. IN Voltage controlled input pin with hysteresis, CMOS compatible; it controls output switch state. CS Analog current sense pin; it delivers a current proportional to the load current. FR_Stby In case of latch-off for overtemperature /overcurrent condition, a low pulse on the FR_Stby pin is needed to reset the channel. The device enters in standby mode if all inputs and the FR_Stby pin are low. Doc ID 023829 Rev 5 5/31 30 Block diagram and pin description VN5T006ASP-E Figure 2. Configuration diagram (top view) *1' ,1 &6 )5B6WE\ 1& 287 287 287 287 287 9&& ("1($'5 Table 2. Suggested connections for unused and not connected pins Connection / pin CS N.C. OUT IN FR_Stby Floating Not allowed X(1) X X X To ground Through 10 K resistor X Not allowed 1. X: do not care. 6/31 Doc ID 023829 Rev 5 Through 10 K Through 10 K resistor resistor VN5T006ASP-E 2 Electrical specifications Electrical specifications Figure 3. Current and voltage conventions IS VCC IOUT IFR_Stby OUT FR_Stby VFR_Stby IIN CS IN VIN VCC VF VOUT ISENSE VSENSE GND IGND GAPGCFT00195 2.1 Absolute maximum ratings Stressing the device above the ratings listed in Table 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to the conditions reported in this section for extended periods may affect device reliability. Table 3. Absolute maximum ratings Symbol Parameter Value Unit VCC DC supply voltage 58 V -VCC Reverse DC supply voltage -32 V IOUT DC output current Internally limited A -IOUT Reverse DC output current 90 A DC input current -1 to 10 mA Fault reset standby DC input current -1 to 1.5 mA VCC - 58 to +VCC V IIN IFR_Stby VCSENSE Current sense maximum voltage EMAX Maximum switching energy (L = 10 mH; Vbat = 32 V; Tjstart = 150C; IOUT = 8.9 A) 880 mJ LSMAX Maximum stray inductance in short circuit condition Vbat = 32 V; RL = 300 m; Tjstart = 150C; IOUT = IlimH_max 40 H Doc ID 023829 Rev 5 7/31 30 Electrical specifications VN5T006ASP-E Table 3. Absolute maximum ratings (continued) Symbol Value Unit VESD Electrostatic discharge (human body model: R = 1.5 K; C = 100 pF) - IN - CS - FR_Stby - OUT - VCC 4000 2000 4000 5000 5000 V V V V V VESD Charge device model (CDM-AEC-Q100-011) 750 V Junction operating temperature -40 to 150 C Storage temperature -55 to 150 C Value Unit 0.8 C/W See Figure 27 C/W Tj Tstg 2.2 Parameter Thermal data Table 4. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case (max.) (with one channel on) Rthj-amb 8/31 Thermal resistance junction-ambient (max.) Doc ID 023829 Rev 5 VN5T006ASP-E 2.3 Electrical specifications Electrical characteristics 8 V < VCC < 36 V; -40C < Tj < 150C, unless otherwise specified. Table 5. Power section Symbol Parameter VCC Operating supply voltage VUSD VUSDhyst RON RON REV Vclamp IS IL(off1) Test conditions Min. Typ. Max. Unit 8 24 36 V Undervoltage shutdown 3.5 5 V Undervoltage shutdown hysteresis 0.5 On-state resistance(2) IOUT = 10 A; Tj = 25C; 8 V < VCC < 36 V V 6 m IOUT = 10 A; Tj = 150C; 8 V < VCC < 36 V 12 Reverse battery on-state resistance VCC = -24 V; IOUT = -10 A; Tj = 25C 6 m Clamp voltage IS = 20 mA 64 70 V Off-state: VCC = 24 V; Tj = 25C; VIN = VOUT = VSENSE = 0 V 2(1) 5 A On-state: VCC = 24 V; VIN = 5 V; IOUT = 0 A 3 6 mA 0.01 3 Supply current Off-state output current 58 VIN = VOUT = 0 V; VCC = 24 V; Tj = 25C 0 VIN = VOUT = 0 V; VCC = 24 V; Tj = 125C 0 A 5 1. PowerMOS leakage included. Table 6. Switching (VCC = 24 V; Tj = 25C) Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 2.4 -- 32 -- s td(off) Turn-off delay time RL = 2.4 -- 67 -- s dVOUT/dt(on) Turn-on voltage slope RL = 2.4 0.7 V/s dVOUT/dt(off) Turn-off voltage slope RL = 2.4 0.46 V/s WON Switching energy losses during twon RL = 2.4 -- 4.15 -- mJ WOFF Switching energy losses during twoff RL = 2.4 -- 2.7 -- mJ Doc ID 023829 Rev 5 9/31 30 Electrical specifications VN5T006ASP-E Table 7. Logic inputs Symbol Parameter VIL Low-level input voltage IIL Low-level input current VIH High-level input voltage IIH High-level input current VI(hyst) Input hysteresis voltage VICL Input clamp voltage VFR_Stby_L Low-level fault-reset-standby voltage IFR_Stby_L Low-level fault-reset-standby current VFR_Stby_H High-level fault-reset-standby voltage IFR_Stby_H High-level fault-reset-standby current VFR_Stby (hyst) Fault-reset-standby hysteresis voltage VFR_Stby_CL Fault-reset-standby clamp voltage Test conditions VIN = 0.9 V Min. Typ. Unit 0.9 V 1 A 2.1 V VIN = 2.1 V 10 0.25 IIN = 1 mA A V 5.5 7 V IIN = -1 mA -0.7 0.9 VFR_Stby = 0.9 V A 2.1 V VFR_Stby = 2.1 V 10 0.25 IFR_Stby = 15 mA (10 ms) V 1 A V 11 15 V IFR_Stby = -1 mA -0.7 treset Overload latch-off reset time See Figure 4 2 24 s tstby Standby delay See Figure 5 120 1200 s Figure 4. Treset definition 7BUHVHW )5B67%< ,1 287387 &6 2YHUORDG &KDQQHO *$3*&)7 10/31 Max. Doc ID 023829 Rev 5 VN5T006ASP-E Electrical specifications Figure 5. Tstby definition )5B6WGE\ ,1387Q ,*1' WVWE\ WVWE\ *$3*&)7 Table 8. Protections and diagnostics Symbol Parameter Test conditions IlimH DC short-circuit current IlimL Short-circuit current during thermal cycling TTSD Shutdown temperature Reset temperature TRS Thermal reset of status VDEMAG VON Typ. Max. Unit 81 115 162 A 162 A 5 V < VCC < 36 V TR THYST VCC = 24 V Min. VCC = 24 V; TR < Tj < TTSD 29 150 175 TRS + 1 TRS + 5 A 200 135 Thermal hysteresis (TTSD - TR) Turn-off output voltage clamp IOUT = 10 A; VIN = 0 V; L = 6 mH Output voltage drop limitation IOUT = 1 A; Tj = -40C to 150C Doc ID 023829 Rev 5 C C C 7 C VCC - 58 VCC - 64 VCC - 70 V 25 mV 11/31 30 Electrical specifications f Table 9. Current sense (8 V < VCC < 36 V) Symbol Parameter Test conditions Min. Typ. Max. Unit IOUT/ISENSE IOUT = 0.6 A; VSENSE = 0.5 V; Tj = -40C to 150C Tj = 25C to 150C Current sense ratio drift IOUT = 0.6 A; VSENSE = 0.5 V; Tj = -40C to 150C IOUT/ISENSE IOUT = 1.6 A; VSENSE = 1 V; Tj = -40C to 150C; Tj = 25C to 150C Current sense ratio drift IOUT = 1.6 A; VSENSE = 1 V; Tj = -40C to 150C IOUT/ISENSE IOUT = 2.4 A; VSENSE = 1 V; Tj = -40C to 150C Tj = 25C to 150C Current sense ratio drift IOUT = 2.4 A; VSENSE = 1 V; Tj = -40C to 150C IOUT/ISENSE IOUT = 3 A; VSENSE = 2 V; Tj = -40C to 150C Tj = 25C to 150C Current sense ratio drift IOUT = 3 A; VSENSE = 2 V; Tj = -40C to 150C IOUT/ISENSE IOUT = 6 A; VSENSE = 4 V; Tj = -40C to 150C Tj = 25C to 150C Current sense ratio drift IOUT = 6 A; VSENSE = 4 V; Tj = -40C to 150C IOUT/ISENSE IOUT = 10 A; VSENSE = 4 V; Tj = -40C to 150C Tj = 25C to 150C Current sense ratio drift IOUT = 10 A; VSENSE = 4 V; Tj = -40C to 150C -15 IOUT/ISENSE IOUT = 20 A; VSENSE = 4 V; Tj = -40C to 150C 6960 dK6/K6(1) Current sense ratio drift IOUT = 20 A; VSENSE = 4 V; Tj = -40C to 150C -8 8 % dK/KBULB1(1) Current sense ratio drift IOUT = 0.6 A to 6 A; ICAL = 3 A; VSENSE = 0.5 V; Tj = -40C to 150C -30 50 % dK/KBULB2(1) Current sense ratio drift IOUT = 1.6 A to 4.2 A; IOUTCAL = 3 A; VSENSE = 2 V; Tj = -40C to 150C -30 26 % dK/KBULB3(1) Current sense ratio drift IOUT = 0.6 A to 2.4 A; IOUTCAL = 1.6 A; VSENSE = 2 V; Tj = -40C to 150C -27 25 % K0 dK0/K0(1) K1 dK1/K1(1) K2 dK2/K2(1) K3 dK3/K3(1) K4 dK4/K4(1) K5 dK5/K5(1) K6 12/31 VN5T006ASP-E Doc ID 023829 Rev 5 3930 5035 11250 19850 17055 -30 5600 6215 30 10750 16940 14660 -28 6030 6200 25 23 22 8670 -20 5920 6730 % 10070 15285 13090 -25 5845 6000 % 10370 15865 13635 -26 6040 6040 % 13630 10895 20 8400 % 11520 9765 15 8330 % % 10090 VN5T006ASP-E Electrical specifications Table 9. Current sense (8 V < VCC < 36 V) (continued) Symbol ISENSE0 Parameter Test conditions Analog sense leakage current Min. IOUT = 0 A; VSENSE = 0 V; VIN = 0 V; Tj = -40C to 150C 0 IOUT = 0 A; VSENSE = 0 V; VIN = 5 V; Tj = -40C to 150C 0 5 VSENSE Max analog sense output voltage IOUT = 40 A; RSENSE = 3.9 K VSENSEH Analog sense output voltage in fault condition(2) VCC = 24 V; RSENSE = 3.9 K ISENSEH Analog sense output current in VCC = 24 V; VSENSE = 5 V fault condition (2) tDSENSE2H Delay response time from rising edge of IN pin VSENSE < 4 V; 1 A < IOUT < 40 A; ISENSE = 90% of ISENSEMAX (see Figure 7) tDSENSE2H Delay response time between rising edge of output current and rising edge of current sense VSENSE < 4 V; ISENSE = 90% of ISENSEMAX, IOUT = 90% of IOUTMAX IOUTMAX = 10 A (see Figure 10) tDSENSE2L Delay response time from falling edge of IN pin VSENSE < 4 V; 1 A < IOUT < 40 A; ISENSE = 10 % of ISENSEMAX (see Figure 7) Typ. Max. Unit 1 A 2 V 8 V 9 12 mA 300 600 s 450 s 20 s Max. Unit 5 1. Parameter guaranteed by design; it is not tested. 2. Fault condition includes: power limitation, overtemperature and open-load in OFF-state condition. Table 10. Open-load detection (FR_Stby = 5 V) Symbol Test conditions Min. Open-load Off-state voltage detection threshold VIN = 0 V; 8 V < VCC < 36 V 2 4 V tDSTKON Output short-circuit to VCC detection delay at turn-off See Figure 8 180 1800 s IL(off2) Off-state output current at VOUT = 4 V VIN = 0 V; VSENSE = 0 V; VOUT rising from 0 V to 4 V -120 0 A VOL Parameter Doc ID 023829 Rev 5 Typ. 13/31 30 Electrical specifications VN5T006ASP-E Table 10. Open-load detection (FR_Stby = 5 V) (continued) Symbol td_vol Parameter Test conditions Delay response from output rising edge to VSENSE rising edge in open-load Output short circuit to tDFRSTK_ON VCC detection delay at FRSTBY activation Min. Typ. Max. Unit VOUT = 4 V; VIN = 0 V; VSENSE = 90% of VSENSEH 20 s See Figure 6; Input1,2 = low 50 s Figure 6. Output stuck to VCC detection delay time at FRSTBY activation )567%< 9VHQVH+ 9&6 W')567.B21 ,QSXW /RZ *$3*&)7 Figure 7. Current sense delay characteristics ,1387 /2$'&855(17 6(16(&855(17 W'6(16(+ W'6(16(/ *$3*&)7 14/31 Doc ID 023829 Rev 5 VN5T006ASP-E Electrical specifications Figure 8. Open-load off-state delay timing 2XWSXWVWXFNDW9&&ZLWK)5B6WE\ 9 9287!92/ 9,1 96(16(+ 9&6 W'67.21 *$3*&)7 Figure 9. Switching characteristics 9287 W:RQ VOUT W:RII tWon tWoff 90% G9287GW RII 80% G9287GW RQ WU dVOUT/dt (on) tr WI 10% dVOUT/dt(off) W tf t ,1387 WG RQ INPUT WG RII td(on) td(off) W t *$3*&)7 Doc ID 023829 Rev 5 15/31 30 Electrical specifications VN5T006ASP-E Figure 10. Delay response time between rising edge of output current and rising edge of current sense 9,1 W'6(16(+ W ,287 ,2870$; ,2870$; W ,6(16( ,6(16(0$; ,6(16(0$; W *$3*&)7 Figure 11. Output voltage drop limitation 9&&9287 7M & 7M & 7M & 921 ,287 921521 7 $*9 16/31 Doc ID 023829 Rev 5 VN5T006ASP-E Electrical specifications Figure 12. Device behavior in overload condition WBUHVHW WBUHVHW )$8/7B5(6(7 ,1Q 287387Q 9VHQVH+ &6Q RYHUORDG RYHUORDGUHVHW RYHUORDGGLDJUHVHW 29(5/2$' &+$11(/Q 287387QDQG&6QFRQWUROOHGE\,1Q )$8/7B5(6(7IURPWRQRDFWLRQRQ&6QSLQ RYHUORDGODWFKRII,QQKLJK&6QKLJK )$8/7B5(6(7ORZ$1'7HPSFKDQQHOQRYHUORDGBUHVHWRYHUORDGODWFKUHVHWDIWHUWBUHVHW WR)$8/7B5(6(7ORZ$1',1QKLJKWKHUPDOF\FOLQJ&6QKLJK )$8/7B5(6(7KLJKODWFKRIIUHVHWGLVDEOHG WRRYHUORDGHYHQWDQG)$8/7B5(6(7KLJKODWFKRIIQRWKHUPDOF\FOLQJ WRRYHUORDGGLDJQRVWLFGLVDEOHGHQDEOHGE\WKHLQSXW RYHUORDGODWFKRIIUHVHWE\)$8/7B5(6(7 29(5/2$' WKHUPDOVKXWGRZQ25SRZHUOLPLWDWLRQ *$3*&)7 Table 11. Truth table Fault reset standby Input Output Sense Standby L L X 0 Normal operation X X L H L H 0 Nominal Overload X X L H L H 0 > Nominal Overtemperature / short to ground X L H L H H L Cycling Latched 0 VSENSEH VSENSEH Undervoltage X X L 0 Short to VBAT L H X L L H H H H 0 VSENSEH < Nominal Open-load Off-state (with pull-up) L H X L L H H H H 0 VSENSEH 0 Negative output voltage clamp X L Negative 0 Conditions Doc ID 023829 Rev 5 17/31 30 Electrical specifications VN5T006ASP-E Table 12. Electrical transient requirements (part 1) Test levels(1) ISO 7637-2: 2004(E) Number of pulses or test times Burst cycle/pulse repetition time Delays and impedance Test pulse III IV 1 - 450 V - 600 V 5000 pulses 0.5 s 5s 1 ms, 50 2a + 37 V + 50 V 5000 pulses 0.2 s 5s 50 s, 2 3a - 150 V - 200 V 1h 90 ms 100 ms 0.1 s, 50 3b + 150 V + 200 V 1h 90 ms 100 ms 0.1 s, 50 4 - 12 V - 16 V 1 pulse 100 ms, 0.01 5b(2) + 123 V + 174 V 1 pulse 350 ms, 1 1. The above test levels must be considered referred to VCC = 24.5V except for pulse 5b 2. Valid in case of external load dump clamp: 58V maximum referred to ground. Table 13. Electrical transient requirements (part 2) ISO 7637-2: 2004(E) Test level results Test pulse III IV 1 C C(1) 2a C C 3a C C 3b(2) E E 3b(3) C C 4 C C 5b(4) C C 1. With RLOAD < 24 . 2. Without capacitor between VCC and GND. 3. With 10 nF between VCC and GND. 4. External load dump clamp: 58 V maximum, referred to ground. Table 14. Electrical transient requirements (part 3) 18/31 Class Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. Doc ID 023829 Rev 5 VN5T006ASP-E 2.4 Electrical specifications Electrical characteristics curves Figure 13. Off-state output current Figure 14. High level input current ,ORII>X$@ ,LK>X$@ 9LQ 9 2II6WDWH 9FF 9 9LQ 9RXW 7F> &@ 7F> &@ Figure 15. Input clamp voltage ("1($'5 Figure 16. Input low level voltage 9LO>9@ 9LFO>9@ ("1($'5 ,LQ P$ 7F> &@ 7F> &@ ("1($'5 ("1($'5 Figure 17. Input high level voltage Figure 18. Input hysteresis voltage 9LK\VW>9@ 9LK>9@ 7F> &@ ("1($'5 Doc ID 023829 Rev 5 7F> &@ ("1($'5 19/31 30 Electrical specifications VN5T006ASP-E Figure 19. On state resistance vs Tcase Figure 20. On state resistance vs VCC 5RQ>P2KP@ 5RQ>P2KP@ 7F & 7F & ,RXW $ 9FF 9 7F> &@ 7F & 7F & 6CC ;6= ("1($'5 Figure 21. ILIMH vs Tcase ("1($'5 Figure 22. Turn-On voltage slope ,OLPK>$@ G9RXWGW 2Q>9XV@ 9FF 9 9FF 9 5/ 7F> &@ ("1($'5 Figure 23. Turn-Off voltage slope G9RXWGW 2II>9XV@ 9FF 9 5/ 7F> &@ 20/31 ("1($'5 Doc ID 023829 Rev 5 7F> &@ ("1($'5 VN5T006ASP-E 3 Application information Application information Figure 24. Application schematic 9 6 && 5SURW )5B6WE\ 'OG 0&8 5SURW ,1 5SURW 287 &6 56(16( *1' &H[W ("1($'5 3.1 Load dump protection Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2 2004 (E) table. 3.2 MCU I/Os protection When negative transients are present on the VCC line, the control pins is pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/O pins from latching-up. The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of microcontroller I/Os. Equation 1 -VCCpeak / Ilatchup Rprot (VOHC - VIH ) / IIHmax Calculation example: For VCCpeak = -600 V and Ilatchup 20 mA; VOHC 4.5 V 30 K Rprot 190 k. Recommended value: Rprot = 56 k Doc ID 023829 Rev 5 21/31 30 Application information 3.3 VN5T006ASP-E Maximum demagnetization energy (VCC = 24 V) Figure 25. Maximum turn-off current versus inductance 917$63 0D[LPXPWXUQRIIFXUUHQWYHUVXVLQGXFWDQFH , $ 917$636LQJOH3XOVH 5HSHWLWLYHSXOVH7MVWDUW & 5HSHWLWLYHSXOVH7MVWDUW & / P+ *$3*&)7 A: Tjstart = 150C single pulse B: Tjstart = 100C repetitive pulse C: Tjstart = 125C repetitive pulse 9,1 , / 'HPDJQHWL]DWLRQ 'HPDJQHWL]DWLRQ 'HPDJQHWL]DWLRQ $*9 Note: 22/31 W Values are generated with RL = 0 . In case of repetitive pulses, Tjstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. Doc ID 023829 Rev 5 VN5T006ASP-E Package and PCB thermal data 4 Package and PCB thermal data 4.1 PowerSO-10 thermal data Figure 26. PowerSO-10 PC board *$3*&)7 1. Layout condition of Rth and Zth measurements (Board finish thickness 1.6 mm +/- 10%; Board double layer; Board dimension 77 x 86; Board Material FR4; Cu thickness 0.070 mm (front and back side); Thermal vias separation 1.2 mm; Thermal via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias 0.025 mm). Figure 27. Rthj-amb vs PCB copper area in open box free air condition (one channel on) 57+MBDPEYV&XKHDWVLQNDUHD 57+MDPE 57+MBDPE &: 3&%&XKHDWVLQNDUHD FPA *$3*&)7 Doc ID 023829 Rev 5 23/31 30 Package and PCB thermal data VN5T006ASP-E Figure 28. PowerSO-10 thermal impedance junction ambient single pulse (one channel on) =7+ &: &X FP &X FP &X IRRWSULQW 7LPH V *$3*&)7 Figure 29. Thermal fitting model of a double channel HSD in PowerSO-10 *$3*&)7 1. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. Equation 2: pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tP/T 24/31 Doc ID 023829 Rev 5 VN5T006ASP-E Package and PCB thermal data Table 15. Thermal parameters 2 Area/island (cm ) Footprint 2 8 R1 (C/W) 0.05 R2 (C/W) 0.3 R3 (C/W) 1.2 R4 (C/W) 7 R5 (C/W) 13 12 8 R6 (C/W) 24 20 14 C1 (W.s/C) 0.05 C2 (W.s/C) 0.1 C3 (W.s/C) 1 C4 (W.s/C) 2 C5 (W.s/C) 3 4 8 C6 (W.s/C) 6 8 14 Doc ID 023829 Rev 5 25/31 30 Package information VN5T006ASP-E 5 Package information 5.1 ECOPACK(R) In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 5.2 PowerSO-10 mechanical data Figure 30. PowerSO-10 package dimensions % $ % + ( ( ( 6($7,1* 3/$1( H % '(7$,/$ K $ & ' ' 6($7,1* 3/$1( $ ) $ $ / '(7$,/$ D 3$ ("1($'5 26/31 Doc ID 023829 Rev 5 VN5T006ASP-E Package information Table 16. PowerSO-10 mechanical data Millimeters Symbol Min. Max. A 3.35 3.65 A(1) 3.4 3.6 A1 0.00 0.10 B 0.40 0.60 B(1) 0.37 0.53 C 0.35 0.55 C(1) 0.23 0.32 D 9.40 9.60 D1 7.40 7.60 E 9.30 9.50 E2 7.20 7.60 E2(1) 7.30 7.50 E4 5.90 6.10 E4(1) 5.90 6.30 e 1.27 F 1.25 1.35 F(1) 1.20 1.40 H 13.80 14.40 H(1) 13.85 14.35 h 1. Typ. 0.50 L 1.20 1.80 L(1) 0.80 1.10 a 0 8 (1) 2 8 Muar only POA P013P. Doc ID 023829 Rev 5 27/31 30 Package information 5.3 VN5T006ASP-E Packing information Figure 31. PowerSO-10 suggested pad layout and tube shipment (no suffix) &$6$%/$1&$ " 08$5 & & $ $ % $OOGLPHQVLRQVDUHLQPP &DVDEODQFD 0XDU %DVH4W\ %XON4W\ 7XEHOHQJWK $ % & ("1($'5 *$3*&)7 Figure 32. PowerSO-10 tape and reel shipment (suffix "TR") 5((/',0(16,216 %DVH4W\ %XON4W\ $ PD[ % PLQ & ) * 1 PLQ 7 PD[ $OOGLPHQVLRQVDUHLQPP 7$3(',0(16,216 $FFRUGLQJWR(OHFWURQLF,QGXVWULHV$VVRFLDWLRQ (,$ 6WDQGDUGUHY$)HE 7DSHZLGWK 7DSH+ROH6SDFLQJ &RPSRQHQW6SDFLQJ +ROH'LDPHWHU +ROH'LDPHWHU +ROH3RVLWLRQ &RPSDUWPHQW'HSWK +ROH6SDFLQJ : 3 3 ' ' PLQ ) . PD[ 3 $OOGLPHQVLRQVDUHLQPP (QG 6WDUW 7RS 1RFRPSRQHQWV &RPSRQHQWV 1RFRPSRQHQWV FRYHU WDSH PPPLQ (PSW\FRPSRQHQWVSRFNHWV VDOHGZLWKFRYHUWDSH PPPLQ 8VHUGLUHFWLRQRIIHHG ("1($'5 28/31 Doc ID 023829 Rev 5 VN5T006ASP-E 6 Order codes Order codes Table 17. Device summary Order codes Package PowerSO-10 Tube Tape and reel VN5T006ASP-E VN5T006ASPTR-E Doc ID 023829 Rev 5 29/31 30 Revision history 7 VN5T006ASP-E Revision history Table 18. Document revision history 30/31 Date Revision Changes 19-Dec-2012 1 Initial release. 16-Jan-2013 2 Updated Figure 3: Current and voltage conventions Table 6: Switching (VCC = 24 V; Tj = 25C): - dVOUT/dt(on)dVOUT/dt(on): updated values Table 9: Current sense (8 V < VCC < 36 V): - IOL: removed row - dK/KBULB2, dK/KBULB2: updated test conditions Updated Table 22: Turn-On voltage slope and Table 23: Turn-Off voltage slope 16-Jun-2013 3 Changed document status from "preliminary data" to "production data" 17-Sep-2013 4 Updated disclaimer. 11-Apr-2016 5 Added AEC-Q101 qualified in Features section Table 9: Current sense (8 V < VCC < 36 V): - dK6/K6: updated test conditions Doc ID 023829 Rev 5 VN5T006ASP-E IMPORTANT NOTICE - PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. 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