Semiconductor Components Industries, LLC, 2001
July, 2001 – Rev. 4 Publication Order Number:
MC74LCX08/D
1
MC74LCX08
Low-Voltage CMOS Quad
2-Input AND Gate
With 5 V–Tolerant Inputs
The MC74LCX08 is a high performance, quad 2–input AND gate
operating from a 2.3 to 3.6 V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5 V allows MC74LCX08 inputs to be safely driven
from 5 V devices.
Current drive capability is 24 mA at the outputs.
•Designed for 2.3 V to 3.6 V VCC Operation
•5 V Tolerant Inputs – Interface Capability With 5 V TTL Logic
•LVTTL Compatible
•LVCMOS Compatible
•24 mA Balanced Output Sink and Source Capability
•Near Zero Static Supply Current (10 µA) Substantially Reduces
System Power Requirements
•Latchup Performance Exceeds 500 mA
•ESD Performance: Human Body Model >2000 V;
Machine Model >200 V
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ORDERING INFORMATION
MC74LCX08D SO–14 55 Units/Rail
MC74LCX08DR2 SO–14
MC74LCX08DT TSSOP–14
2500 Units/Reel
96 Untis/Rail
TSSOP–14
DT SUFFIX
CASE 948G
14
1
EIAJ SO–14
M SUFFIX
CASE 965
SO–14
D SUFFIX
CASE 751A
14
1
MARKING
DIAGRAMS
1
14
1
14
LCX
08
ALYW
74LCX08
ALYW
LCX08
AWLYWW
A = Assembly Location
L, WL = Wafer Lot
Y = Year
W, WW = Work Week
MC74LCX08DTR2 TSSOP–14 2500 Units/Reel
MC74LCX08M EIAJ
SO–14 50 Units/Rail
MC74LCX08MEL EIAJ
SO–14 2000 Units/Reel
14
1
14
1
MC74LCX08
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2
Figure 1. Pinout: 14–Lead (Top View)
1314 12 11 10 9 8
21 34567
VCC A2 B2 O2 A3 B3 O3
A0 B0 O0 A1 B1 O1 GND
3O0
1
A0
Figure 2. Logic Diagram
2
B0
6O1
4
A1 5
B1
11 O2
13
A2 12
B2
8O3
10
A3 9
B3
PIN NAMES
Pins Function
An, Bn Data Inputs
On Outputs
TRUTH TABLE
Inputs Outputs
An Bn On
L L L
L H L
H L L
H H H
H = High Voltage Level
L = Low Voltage Level
For ICC reasons, DO NOT FLOAT Inputs
MAXIMUM RATINGS
Symbol Parameter Value Condition Unit
VCC DC Supply Voltage –0.5 to +7.0 V
VIDC Input Voltage –0.5 ≤ VI ≤ +7.0 V
VODC Output Voltage –0.5 ≤ VO ≤ VCC + 0.5 Output in HIGH or LOW State (Note 1.) V
IIK DC Input Diode Current –50 VI < GND mA
IOK DC Output Diode Current –50 VO < GND mA
+50 VO > VCC mA
IODC Output Source/Sink Current ±50 mA
ICC DC Supply Current Per Supply Pin ±100 mA
IGND DC Ground Current Per Ground Pin ±100 mA
TSTG Storage Temperature Range –65 to +150 °C
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute maximum–rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
1. IO absolute maximum rating must be observed.
MC74LCX08
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3
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Type Max Unit
VCC Supply Voltage Operating
Data Retention Only 2.0
1.5 2.5, 3.3
2.5, 3.3 3.6
3.6 V
VIInput Voltage 0 5.5 V
VOOutput Voltage (HIGH or LOW State)
(3–State) 0 VCC V
IOH HIGH Level Output Current VCC = 3.0 V – 3.6 V
VCC = 2.7 V – 3.0 V
VCC = 2.3 V – 2.7 V
–24
–12
–8
mA
IOL LOW Level Output Current VCC = 3.0 V – 3.6 V
VCC = 2.7 V – 3.0 V
VCC = 2.3 V – 2.7 V
+24
+12
+8
mA
TAOperating Free–Air Temperature –40 +85 °C
∆t/∆VInput Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V 0 10 ns/V
DC ELECTRICAL CHARACTERISTICS
TA = –40°C to +85°C
Symbol Characteristic Condition Min Max Unit
VIH HIGH Level Input Voltage (Note 2.) 2.3 V ≤ VCC ≤ 2.7 V 1.7 V
2.7 V ≤ VCC ≤ 3.6 V 2.0
VIL LOW Level Input Voltage (Note 2.) 2.3 V ≤ VCC ≤ 2.7 V 0.7 V
2.7 V ≤ VCC ≤ 3.6 V 0.8
VOH HIGH Level Output Voltage 2.3 V ≤ VCC ≤ 3.6 V; IOH = –100 µA VCC – 0.2 V
VCC = 2.3 V; IOH = –8 mA 1.8
VCC = 2.7 V; IOH = –12 mA 2.2
VCC = 3.0 V; IOH = –18 mA 2.4
VCC = 3.0 V; IOH = –24 mA 2.2
VOL LOW Level Output Voltage 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 µA 0.2 V
VCC = 2.3 V; IOL = 8 mA 0.6
VCC = 2.7 V; IOL = 12 mA 0.4
VCC = 3.0 V; IOL = 16 mA 0.4
VCC = 3.0 V; IOL = 24 mA 0.55
IIInput Leakage Current 2.3 V ≤ VCC ≤ 3.6 V; 0 V ≤ VI ≤ 5.5 V ±5µA
ICC Quiescent Supply Current 2.3 ≤ VCC ≤ 3.6 V; VI = GND or VCC 10 µA
2.3 ≤ VCC ≤ 3.6 V; 3.6 ≤ VI or VO ≤ 5.5 V ±10
∆ICC Increase in ICC per Input 2.3 ≤ VCC ≤ 3.6 V; VIH = VCC – 0.6 V 500 µA
2. These values of VI are used to test DC electrical characteristics only.
MC74LCX08
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4
AC CHARACTERISTICS tR = tF = 2.5 ns; RL = 500 Ω
Limits
TA = –40°C to +85°C
VCC = 3.3 V ± 0.3 V VCC = 2.7 V VCC = 2.5 V ± 0.2 V
CL = 50 pF CL = 50 pF CL = 30 pF
Symbol Parameter Waveform Min Max Min Max Min Max Unit
tPLH Propagation Delay Time 1 1.5 5.5 1.5 6.2 1.5 6.6 ns
tPHL Input to Output 1.5 5.5 1.5 6.2 1.5 6.6
tOSHL Output–to–Output Skew 1.0 ns
tOSLH (Note 3.) 1.0
3. Skew is defined as the absolute value of the dif ference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter
guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25°C
Symbol Characteristic Condition Min Typ Max Unit
VOLP Dynamic LOW Peak Voltage VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V 0.8 V
(Note 4.) VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V 0.6 V
VOLV Dynamic LOW Valley Voltage VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V –0.8 V
(Note 4.) VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V –0.6 V
4. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW or LOW–to–HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol Parameter Condition Typical Unit
CIN Input Capacitance VCC = 3.3 V, VI = 0 V or VCC 7 pF
COUT Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 8 pF
CPD Power Dissipation Capacitance 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 25 pF
MC74LCX08
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5
WAVEFORM 1 – PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Vcc
0 V
VOH
VOL
An, Bn
On
tPLH
tPHL
Vmi
Vmo
Vmi
Vmo
Vcc
Symbol 3.3 V + 0.3 V 2.7 V 2.5 V + 0.2 V
Vmi 1.5 V 1.5 V Vcc/2
Vmo 1.5 V 1.5 V Vcc/2
Figure 3. AC Waveforms
PULSE
GENERATOR RT
DUT
VCC
RL
CL
CL= 50 pF at VCC = 3.3 + 0.3 V or equivalent (includes jig and probe capacitance)
CL= 30 pF at VCC = 2.5 + 0.2 V or equivalent (includes jig and probe capacitance)
RL= R1 = 500 Ω or equivalent
RT= ZOUT of pulse generator (typically 50 Ω)
Figure 4. Test Circuit
MC74LCX08
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6
PACKAGE DIMENSIONS
SO–14
D SUFFIX
CASE 751A–03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
–A–
–B–
G
P7 PL
14 8
71 M
0.25 (0.010) B M
S
B
M
0.25 (0.010) A S
T
–T–
F
RX 45
SEATING
PLANE D14 PL K
C
J
M
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A8.55 8.75 0.337 0.344
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.228 0.244
R0.25 0.50 0.010 0.019
TSSOP–14
DT SUFFIX
CASE 948G–01
ISSUE O
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A4.90 5.10 0.193 0.200
B4.30 4.50 0.169 0.177
C--- 1.20 --- 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.50 0.60 0.020 0.024
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-.
S
U0.15 (0.006) T
2X L/2
S
U
M
0.10 (0.004) V S
T
L–U–
SEATING
PLANE
0.10 (0.004)
–T–
ÇÇÇ
ÇÇÇ
ÇÇÇ
SECTION N–N
DETAIL E
JJ1
K
K1
ÉÉÉ
ÉÉÉ
DETAIL E
F
M
–W–
0.25 (0.010)
8
14
7
1
PIN 1
IDENT.
H
G
A
D
C
B
S
U0.15 (0.006) T
–V–
14X REFK
N
N
MC74LCX08
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7
PACKAGE DIMENSIONS
EIAJ SO–14
M SUFFIX
CASE 965–01
ISSUE O
HE
A1
DIM MIN MAX MIN MAX
INCHES
--- 2.05 --- 0.081
MILLIMETERS
0.05 0.20 0.002 0.008
0.35 0.50 0.014 0.020
0.18 0.27 0.007 0.011
9.90 10.50 0.390 0.413
5.10 5.45 0.201 0.215
1.27 BSC 0.050 BSC
7.40 8.20 0.291 0.323
0.50 0.85 0.020 0.033
1.10 1.50 0.043 0.059
0
0.70 0.90 0.028 0.035
--- 1.42 --- 0.056
A1
HE
Q1
LE
10 0
10
LEQ1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
0.13 (0.005) M0.10 (0.004)
D
Z
E
1
14 8
7
eA
b
VIEW P
c
L
DETAIL P
M
A
b
c
D
E
e
L
M
Z
MC74LCX08
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8
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MC74LCX08/D
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