UC2842/3/4/5
UC3842/3/4/5
October1998
CURRENTMODE PWM CONTROLLER
.OPTIMIZED FOR OFF-LINE AND DC TO DC
CONVERTERS
.LOWSTART-UP CURRENT (< 1 mA)
.AUTOMATIC FEED FORWARD COMPENSA-
TION
.PULSE-BY-PULSECURRENT LIMITING
.ENHANCED LOAD RESPONSE CHARAC-
TERISTICS
.UNDER-VOLTAGELOCKOUTWITHHYSTER-
ESIS
.DOUBLEPULSESUPPRESSION
.HIGHCURRENT TOTEMPOLEOUTPUT
.INTERNALLY TRIMMED BANDGAP REFER-
ENCE
.500 KHz OPERATION
.LOWROERRORAMP
DESCRIPTION
TheUC3842/3/4/5familyofcontrolICsprovidesthe
necessary features to implement off-line or DC to
DC fixed frequency current mode controlschemes
witha minimalexternalpartscount.Internallyimple-
mentedcircuitsincludeundervoltagelockoutfeatur-
ingstart-up current lessthan 1 mA,a precisionref-
erencetrimmedforaccuracyattheerroramp input,
logicto insurelatchedoperation,a PWMcompara-
torwhichalsoprovidescurrentlimitcontrol,andato-
tem pole output stage designed to source or sink
high peak current. The output stage, suitable for
drivingN-ChannelMOSFETs,islowintheoff-state.
Differencesbetweenmembersof thisfamilyarethe
under-voltage lockout thresholds and maximum
dutycycle ranges.The UC3842 and UC3844have
UVLOthresholdsof 16V (on) and 10V (off), ideally
suited off-line applications The corresponding
thresholdsfor the UC3843 and UC3845 are 8.5 V
and 7.9 V. The UC3842 and UC3843 can operate
to duty cycles approaching 100%. A range of the
zero to < 50 % is obtained by the UC3844 and
UC3845bytheadditionof aninternaltoggleflipflop
which blanksthe outputoff every otherclock cycle.
BLOCK DIAGRAM (toggle flip flop used only in U3844 and UC3845)
Minidip SO14
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*All voltages are withrespect to pin5, all currents are positive intothe specified terminal.
PIN CONNECTIONS (top views)
SO14 Minidip
ORDERING NUMBERS
Type Minidip SO14
UC2842
UC3843
UC2844
UC2845
UC2842N
UC2843N
UC2844N
UC2845N
UC2842D
UC2843D
UC2844D
UC2845D
UC3842
UC3843
UC3844
UC3845
UC3842N
UC3843N
UC3844N
UC3845N
UC3842D
UC3843D
UC3844D
UC3845D
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
ViSupply Voltage (low impedance source) 30 V
ViSupplyVoltage(Ii < 30mA) SelfLimiting
IOOutput Current ±1A
EOOutput Energy (capacitive load) 5 µJ
Analog Inputs (pins 2, 3) – 0.3 to 6.3 V
ErrorAmplifier Output SinkCurrent 10 mA
Ptot Power Dissipation at Tamb ≤50 °C (minidip, DIP-14) 1W
P
tot Power Dissipation at Tamb ≤25°C (SO14) 725 mW
Tstg Storage Temperature Range – 65 to 150 °C
TLLead Temperature (soldering 10s) 300 °C
THERMAL DATA
Symbol Description Minidip SO14 Unit
Rthj-amb Thermal Resistance Junction-ambient. max. 100 165 °C
UC2842/3/4/5-UC3842/3/4/5
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ELECTRICAL CHARACTERISTICS (Unless otherwise stated,these specifications apply for -25 < Tamb <
85°C for UC2824X;0 < Tamb <70°C forUC384X;Vi=15V (note 5); RT= 10K;CT= 3.3nF)
Symbol Parameter Test Conditions UC284X UC384X Unit
Min. Typ. Max. Min. Typ. Max.
REFERENCE SECTION
VREF Output Voltage Tj=25
°
CI
o
= 1mA 4.95 5.00 5.05 4.90 5.00 5.10 V
∆VREF Line Regulation 12V ≤Vi≤25V 620 620mV
∆
V
REF Load Regulation 1≤Io≤20mA 625 625mV
∆V
REF/∆TTemperature Stability (Note 2) 0.2 0.4 0.2 0.4 mV/°C
Total Output Variant Line, Load, Temperature (2) 4.9 5.1 4.82 5.18 V
eNOutput Noise Voltage 10Hz ≤f≤10KHz Tj=25°C
(2) 50 50 µV
Long Term Stability Tamb = 125°C, 1000Hrs (2) 525 525mV
I
SC Output Short Circuit -30 -100 -180 -30 -100 -180 mA
OSCILLATOR SECTION
fsInitial Accuracy Tj=25
°
C (6) 47 52 57 47 52 57 KHz
Voltage Stability 12 ≤Vi≤25V 0.2 1 0.2 1 %
Temperature Stability TMIN ≤Tamb ≤TMAX (2) 55%
V
4Amplitude VPIN4 Peak to Peak 1.7 1.7 V
ERROR AMP SECTION
V2Input Voltage VPIN1 = 2.5V 2.45 2.50 2.55 2.42 2.50 2.58 V
IbInput Bias Current -0.3 -1 -0.3 -2 µA
AVOL 2≤Vo≤4V 65 90 65 90 dB
B Unity Gain Bandwidth (2) 0.7 1 0.7 1 MHz
SVR Supply Voltage Rejection 12V ≤Vi≤25V 60 70 60 70 dB
IoOutput Sink Current VPIN2 = 2.7V VPIN1 = 1.1V 2 6 2 6 V
IoOutput Source Current VPIN2 = 2.3V VPIN1 = 5V -0.5 -0.8 -0.5 -0.8 mA
VOUT High VPIN2 = 2.3V;
RL= 15KΩto Ground 56 56 V
V
OUT Low VPIN2 = 2.7V;
RL= 15KΩto Pin 8 0.7 1.1 0.7 1.1 V
CURRENT SENSE SECTION
GVGain (3 & 4) 2.85 3 3.15 2.8 3 3.2 V/V
V3Maximum Input Signal VPIN1 = 5V (3) 0.9 1 1.1 0.9 1 1.1 V
SVR Supply Voltage Rejection 12 ≤Vi≤25V (3) 70 70 dB
IbInput Bias Current -2 -10 -2 -10 µA
Delay to Output 150 300 150 300 ns
OUTPUT SECTION
IOL Output Low Level ISINK = 20mA 0.1 0.4 0.1 0.4 V
ISINK = 200mA 1.5 2.2 1.5 2.2 V
IOH Output High Level ISOURCE = 20mA 13 13.5 13 13.5 V
ISOURCE = 200mA 12 13.5 12 13.5 V
trRise Time Tj=25
°
CC
L
= 1nF (2) 50 150 50 150 ns
tfFall Time Tj=25°CC
L
= 1nF (2) 50 150 50 150 ns
UC2842/3/4/5-UC3842/3/4/5
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Notes : 2. These parameters, although guaranteed, are not 100% tested in production.
3. Parameter measured at trippoint of latchwith VPIN2 =0.
4. Gaindefined as :
∆VPIN1
A= ;0≤V
PIN3 ≤0.8V
∆VPIN3
5. Adjust Viabove the startthreshold before settingat 15V.
6. Outputfrequency equals oscillator frequency for the UC3842and UC3843.
Outputfrequency is one halfoscillator frequency for the UC3844 and UC3845.
ELECTRICAL CHARACTERISTICS (continued)
Symbol Parameter Test Conditions UC284X UC384X Unit
Min. Typ. Max. Min. Typ. Max.
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold X842/4 15 16 17 14.5 16 17.5 V
X843/5 7.8 8.4 9.0 7.8 8.4 9 V
Min Operating Voltage
After Turn-on X842/4 9 10 11 8.5 10 11.5 V
X843/5 7.0 7.6 8.2 7.0 7.6 8.2 V
PWM SECTION
Maximum Duty Cycle X842/3 93 97 100 93 97 100 %
X844/5 46 48 50 47 48 50 %
Minimum Duty Cycle 0 0 %
TOTAL STANDBY CURRENT
Ist Start-up Current 0.5 1 0.5 1 mA
IiOperating Supply Current VPIN2 =V
PIN3 =0V 11 20 11 20 mA
V
iz Zener Voltage Ii= 25mA 34 34 V
UC2842/3/4/5-UC3842/3/4/5
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Figure 1 : ErrorAmpConfiguration.
Error ampcan source or
sink up to 0.5mA
Figure 2 : UnderVoltageLockout.
During Under-VoltageLockout,the outputdriver is
biased to sink minor amounts of current. Pin 6
shouldbeshuntedto groundwitha bleederresistor
to preventactivatingthepowerswitchwithextrane-
ous leakagecurrents.
Figure 3 : Current SenseCircuit .
Peakcurrent (is) is determinedby the formula
1.0V
IS max ≈RS
A small RC filtermay be requiredto suppress switch transients.
UC2842/3/4/5-UC3842/3/4/5
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Figure 4. Figure 5 : Deadtimevs. CT(RT>5KΩ).
1.72
for RT>5KΩf= R
T
CT
Figure 7 : OutputSaturationCharacteristics.Figure 6 : TimingResistancevs. Frequency.
Figure 8 : Error AmplifierOpen-loopFrequency
Response.
UC2842/3/4/5-UC3842/3/4/5
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Figure 9 : OpenLoop Test Circuit.
Highpeakcurrentsassociatedwithcapacitiveloads
necessitate careful grounding techniques. Timing
and bypass capacitors should be connectedclose
to pin 5 in a singlepoint ground.The transistorand
5KΩpotentiometerareusedtosampletheoscillator
waveformand applyan adjustableramp topin 3.
Figure 10 : ShutdownTechniques.
Shutdownof the UC2842 can be accomplished by
twomethods; eitherraisepin3 above1V orpullpin
1 below a voltage two diode drops above ground.
Either method cause the outputof the PWM com-
parator to be high (refer to block diagram). The
PWM latch is resetdominant so that the outputwill
remain low until the next clock cycle after theshut-
downconditionatpins1and/or3isremoved.Inone
example, an externally latched shutdown may be
accomplishedby addingan SCRwhichwillbereset
bycyclingVibelowthelowerUVLOthreshold.Atthis
pointthereferenceturnsoff,allowingtheSCRtore-
set.
UC2842/3/4/5-UC3842/3/4/5
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Figure 11 : Off-lineFlybackRegulator.
Power Supply Specifications
1. InputVoltage: 95 VAC to 130 VAC
(50Hz/60Hz)
2. LineIsolation: 3750V
3. SwitchingFrequency: 40KHz
4. Efficiency@ FullLoad: 70%
5. OutputVoltage:
A. + 5 V, ±5% : 1 A to 4 A load
Ripple voltage: 50 mV P-P Max.
B. + 12 V, ±3 % : 0.1A to 0.3A load
Ripple voltage: 100mV P-PMax.
C. – 12 V, ±3 % : 0.1A to 0.3 A load
Ripple voltage: 100mV P-PMax.
Figure 12 : SlopeCompensation.
A fraction of the oscillator ramp can be resistively
summed with the current sense signal to provide
slope compensation for converters requiring duty
cycles over 50%.
Note that capacitor, C, forms a filter with R2to su-
pressthe leadingedgeswitch spikes.
UC2842/3/4/5-UC3842/3/4/5
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SO14
DIM. mm inch
MIN.. TYP. MAX.. MIN.. TYP.. MAX..
A 1.75 0.069
a1 0.1 0.25 0.004 0.009
a2 1.6 0.063
b 0.35 0.46 0.014 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.020
c1 45°(typ.)
D (1) 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62 0.300
F (1) 3.8 4 0.150 0.157
G 4.6 5.3 0.181 0.209
L 0.4 1.27 0.016 0.050
M 0.68 0.027
S8°
(1) D and F do notincludemold flash or protrusions. Moldflash or
potrusions shall notexceed 0.15mm (.006inch).
OUTLINE AND
MECHANICAL DATA
(max.)
UC2842/3/4/5-UC3842/3/4/5
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Minidip 0.300”
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 3.3 0.130
a1 0.7 0.028
B 1.39 1.65 0.055 0.065
B1 0.91 1.04 0.036 0.041
b 0.5 0.020
b1 0.38 0.5 0.015 0.020
D 9.8 0.386
E 8.8 0.346
e 2.54 0.100
e3 7.62 0.300
e4 7.62 0.300
F 7.1 0.280
I 4.8 0.189
L 3.3 0.130
Z 0.44 1.6 0.017 0.063
OUTLINE AND
MECHANICAL DATA
UC2842/3/4/5-UC3842/3/4/5
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the conse-
quences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this
publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMi-
croelectronics products are not authorized for use as critical components in life support devices or systems without express written
approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics
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UC2842/3/4/5-UC3842/3/4/5
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