1. General description
The HEF4052B is a dual 4-channel analog multiplexer/demultiplexer with common
channel select logic. Each multiplexer/demultiplexer has four independent inputs/outputs
(nY0 to nY3) and a common input/o utput (nZ). The co mmon chan nel select logic includes
two select inputs (S1 and S2) and an active LOW enable input (E). Both
multiplexers/demu ltipl exers contain four b idirectio nal ana log switch es, each with one side
connected to an independent input/outpu t (nY0 to nY3) and the other side connected to a
common input/output (nZ). With E LOW, one of the four switches is selected
(low-impedance ON-state) by S1 and S2. With E HIGH, all switches are in the
high-impedance OFF-state, independe nt of S1 and S2. If break before make is needed,
then it is necessary to use the enable input.
VDD and VSS are the supply voltage connections for the digital control inputs (S1 and S2,
and E). The VDD to VSS range is 3 V to 15 V. The analog inputs/outputs (nY0 to nY3, and
nZ) can swing between VDD as a positive limit and VEE as a negative limit. VDD VEE may
not exceed 15 V. Unused inputs must be connec te d to VDD, VSS, or another input. Fo r
operation as a digital multiplexer/demultiplexer, VEE is connected to VSS (typically
ground). VEE and VSS are the supply voltage connections for the switches.
2. Features and benefits
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C and 40 C to +125 C
Complies with JEDEC standard JESD 13-B
3. Applications
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
Rev. 10 — 25 March 2016 Product data sheet
© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 2 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
4. Ordering information
5. Functional diagram
Table 1. Ordering information
All types operate from
40
C to +125
C.
Type number Package
Name Description Version
HEF4052BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
HEF4052BTT TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
Fig 1. Functional di agram
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© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 3 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
Fig 3. Logic symbol Fig 4. IEC logic symbol
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© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 4 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
Fig 5. Logic diag ram
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© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 5 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
6.2 Pin description
Fig 6. Pin configuration SOT109-1 Fig 7. Pin configuration SOT403-1
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Table 2. Pin description
Symbol Pin Description
E6 enable input (active LOW)
VEE 7 supply voltage
VSS 8 ground supply voltage
S1, S2 10, 9 select input
1Y0, 1Y1, 1Y2, 1Y3, 2Y0, 2Y1, 2Y2, 2Y3 12, 14, 15, 11, 1, 5, 2, 4 independent input or output
1Z, 2Z 13, 3 common output or input
VDD 16 supply voltage
© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 6 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
7. Functional description
7.1 Function table
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
8. Limiting values
[1] To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across the bidirectional
switch must not exceed 0.4 V . If the switch current flows into terminal Z, no VDD current will flow out of terminals Y, and in this case there
is no limit for the voltage drop across the switch, but the voltages at Y and Z may not exceed VDD or VEE.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
For SSOP16 package: Ptot derates linearly with 5.5 mW/K above 60 C.
Table 3. Function table[1]
Input Channel on
ES2 S1
LLLnY0 to nZ
L L H nY1 to nZ
LHLnY2 to nZ
LHHnY3 to nZ
H X X switches off
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter Conditions Min Max Unit
VDD supply voltage 0.5 +18 V
VEE supply voltage referenced to VDD [1] 18 +0.5 V
IIK input clamping current pins Sn and E;
VI<0.5 V or VI>V
DD + 0.5 V -10 mA
VIinput voltage 0.5 VDD + 0.5 V
II/O input/output current - 10 mA
IDD supply current - 50 mA
Tstg storage temperature 65 +150 C
Tamb ambient temperature 40 +125 C
Ptot total power dissipation Tamb = 40 C to +125 C
SO16 package [2] -500mW
TSSOP16 package [2] -500mW
P power dissipation per output - 100 mW
© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 7 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
9. Recommended operating conditions
10. Static characteristics
Table 5. Re commended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VDD supply voltage see Figure 8 3-15V
VIinput voltage 0 - VDD V
Tamb ambient temperature in free air 40 - +125 C
t/V input transition rise and fall
rate VDD = 5 V - - 3.75 s/V
VDD = 10 V - - 0.5 s/V
VDD = 15 V - - 0.08 s/V
Fig 8. Operating area as a function of the supply voltages
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Table 6. Static characteristics
VSS = VEE = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter Conditions VDD Tamb = 40 C Tamb = 25 C Tamb = 85 C Tamb = 125 CUnit
Min Max Min Max Min Max Min Max
VIH HIGH-level
input voltage IO < 1 A 5 V 3.5 - 3.5 - 3.5 - 3.5 - V
10 V 7.0 - 7.0 - 7.0 - 7.0 - V
15 V 11.0 - 11.0 - 11.0 - 11.0 - V
VIL LOW-level
input voltage IO < 1 A 5 V - 1.5 - 1.5 - 1.5 - 1.5 V
10 V - 3.0 - 3.0 - 3.0 - 3.0 V
15 V - 4.0 - 4.0 - 4.0 - 4.0 V
IIinput leakage
current 15 V - 0.1 - 0.1 - 1.0 - 1.0 A
© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 8 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
10.1 Test circuits
IS(OFF) OFF-state
leakage
current
Z port;
all channels OFF;
see Figure 9
15 V - - - 1000 - - - - nA
Y port;
per channel;
see Figure 10
15 V - - - 200 - - - - nA
IDD supply current IO = 0 A 5 V - 5 - 5 - 150 - 150 A
10 V - 10 - 10 - 300 - 300 A
15 V - 20 - 20 - 600 - 600 A
CIinput
capacitance Sn, E inputs - - - - 7.5 - - - - pF
Table 6. Static characteristics …continued
VSS = VEE = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter Conditions VDD Tamb = 40 C Tamb = 25 C Tamb = 85 C Tamb = 125 CUnit
Min Max Min Max Min Max Min Max
Fig 9. Test circuit for measuring OFF-state leakage current Z port
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Fig 10. Test circuit for measuring OFF-state leakage current nYn port
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© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 9 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
10.2 On resistance
10.2.1 On resistance waveform and test circuit
Table 7. ON resistance
Tamb = 25
C; ISW =200
A; VSS = VEE = 0 V.
Symbol Parameter Conditions VDD VEE Typ Max Unit
RON(peak) ON resistance (peak) VI = 0 V to VDD VEE;
see Figure 11 and Figure 12 5 V 350 2500
10 V 80 245
15 V 60 175
RON(rail) ON resistance (rail) VI = 0 V; see Figure 11 and Figure 12 5 V 115 340
10 V 50 160
15 V 40 115
VI = VDD VEE;
see Figure 11 and Figure 12 5 V 120 365
10 V 65 200
15 V 50 155
RON ON resistance mismatch
between channel s VI = 0 V to VDD VEE; see Figure 11 5 V 25 -
10 V 10 -
15 V 5 -
RON =V
SW /I
SW.
Fig 11. Test circuit for measuring RON
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© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 10 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
11. Dynamic characteristics
Fig 12. Typical RON as a function of input voltage
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Table 8. Dy namic characteristics
Tamb = 25
C; VSS = VEE = 0 V; for test circuit see Figure 16.
Symbol Parameter Conditions VDD Typ Max Unit
tPHL HIGH to LOW propagation delay nYn, nZ to nZ, nYn; see Figure 13 5 V 10 20 ns
10 V 5 10 ns
15 V 5 10 ns
Sn to nYn, nZ; see Figure 14 5 V 150 305 ns
10 V 65 135 ns
15 V 50 100 ns
tPLH LOW to HIGH propagation delay Yn, nZ to nZ, nYn; see Figure 13 5 V 10 20 ns
10 V 5 10 ns
15 V 5 10 ns
Sn to nYn, nZ; see Figure 14 5 V 150 300 ns
10 V 75 150 ns
15 V 50 100 ns
tPHZ HIGH to OFF-state
propagation delay Eto nYn, nZ; see Figure 15 5 V 95 190 ns
10 V 90 180 ns
15 V 85 180 ns
tPZH OFF-state to HIGH
propagation delay Eto nYn, nZ; see Figure 15 5 V 130 2 60 ns
10 V 55 115 ns
15 V 45 85 ns
tPLZ LOW to OFF-state
propagation delay Eto nYn, nZ; see Figure 15 5 V 100 2 05 ns
10 V 90 180 ns
15 V 90 180 ns
© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 11 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
11.1 Waveforms and test circuit
tPZL OFF-state to LOW
propagation delay Eto nYn, nZ; see Figure 15 5 V 120 2 40 ns
10 V 50 100 ns
15 V 35 75 ns
Table 8. Dy namic characteristics …continued
Tamb = 25
C; VSS = VEE = 0 V; for test circuit see Figure 16.
Symbol Parameter Conditions VDD Typ Max Unit
Measurement points are given in Table 9. Measurement points are given in Table 9.
Fig 13. nYn, nZ to nZ, nYn propagation delays Fig 14. Sn to nYn, nZ propagation delays
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Fig 15. Enabl e and disable times
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Table 9. Measurement points
Supply voltage Input Output
VDD VMVM
5 V to 15 V 0.5VDD 0.5VDD
© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 12 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
[1] For nYn to nZ propagation delays use VEE. For Sn to nYn or nZ propagation delays use VDD.
Test data is given in Table 10.
Definitions:
DUT = Device Under Test.
RT= Termination resistance should be equal to output impedance Zo of the pulse generator.
CL= Load capacitance including test jig and probe.
RL= Load resistance.
Fig 16. Test circuit for measuring switching times
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Table 10. Test data
Input Load S1 position
nYn, nZ Sn and E tr, tfVMCLRLtPHL[1] tPLH tPZH, tPHZ tPZL, tPLZ other
VDD or VEE VDD or VSS 20 ns 0.5VDD 50 pF 10 kVDD or VEE VEE VEE VDD VEE
© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 13 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
11.2 Additional dynamic parameters
[1] fi is biased at 0.5 VDD; VI=0.5V
DD (p-p).
11.2.1 Test circuits
Table 11. Additional dynamic characteristics
VSS = VEE = 0 V; Tamb = 25
C.
Symbol Parameter Conditions VDD Typ Max Unit
THD total harmonic distortion see Figure 17; RL=10k; CL=15pF;
channel ON; VI=0.5V
DD (p-p);
fi=1kHz
5 V [1] 0.25 - %
10 V [1] 0.04 - %
15 V [1] 0.04 - %
f(3dB) 3 dB frequency response see Figure 18; RL = 1 k; CL = 5 pF;
channel ON; VI=0.5V
DD (p-p) 5 V [1] 13 - MHz
10 V [1] 40 - MHz
15 V [1] 70 - MHz
iso isolation (OFF-state) see Figure 19; fi= 1 MHz; RL = 1 k;
CL = 5 pF; channel OFF;
VI=0.5V
DD (p-p)
10 V [1] 50 - dB
Vct crosstalk voltage digital inputs to switch; see Figure 20;
RL = 10 k; CL=15pF;
Eor Sn = VDD (square-wave)
10 V 50 - mV
Xtalk crosstalk between switches; see Figure 21;
fi= 1 MHz; RL=1 k;
VI=0.5V
DD (p-p)
10 V [1] 50 - dB
Table 12. Dynamic power dissipation PD
PD can be calculated from the formulas shown; VEE = V SS =0 V; t
r = tf
20 ns; Tamb = 25
C.
Symbol Parameter VDD Typical formula for PD (W) where:
PDdynamic power
dissipation 5V P
D = 1300 fi + (fo CL) VDD2fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VDD = supply voltage in V;
(CL fo) = sum of the outputs.
10 V PD = 6100 fi + (fo CL) VDD2
15 V PD = 15600 fi + (fo CL) VDD2
Fig 17. Test circuit for measuring total harmonic
distortion Fig 18. Test circuit for measuring frequen cy response
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© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 14 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
Fig 19. Test circuit for measuring isol ati on (OFF-state)
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a. Test circuit
b. Input and output pulse definitions
Fig 20. Test circuit for measuring crosstalk voltage between digital inputs and switch
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© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 15 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
a. Switch closed condition b. Switch open condition
Fig 21. Test circuit for measuring crosstalk between switches
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© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 16 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
12. Package outline
Fig 22. Package outline SOT109-1 (SO16)
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© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 17 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
Fig 23. Package outline SOT403-1 (TSSOP16)
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© Nexperia B.V. 2017. All rights reserved
HEF4052B All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 10 — 25 March 2016 18 of 21
Nexperia HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
13. Abbreviations
14. Revision history
Table 13 . Abbreviations
Acronym Description
DUT Device Under Test
Table 14. Revision history
Document ID Release date Data sheet status Change notice Supersedes
HEF4052B v.10 20160325 Product data sheet - HEF4052B v.9
Modifications: •Type number HEF4052BP (SOT38-4 ) removed .
HEF4052B v.9 20140911 Product data sheet - HEF4052B v.8
Modifications: •Figure 20: Test circuit modified
HEF4052B v.8 20111117 Product data sheet - HEF4052B v.7
Modifications: •Legal pages updated.
•Changes in “General description”, “Features and benefits” and “Applications”.
HEF4052B v.7 20100326 Product data sheet - HEF4052B v.6
HEF4052B v.6 20100308 Product data sheet - HEF4052B v.5
HEF4052B v.5 20091127 Product data sheet - HEF4052B v. 4
HEF4052B v.4 20090924 Product data sheet - HEF4052B_CNV v.3
HEF4052B_CNV v.3 19950101 Product specification - HEF4052B_CNV v.2
HEF4052B_CNV v.2 19950101 Product specification - -