
Page 6Cortina Systems®LXT971A Single-Port 10/100 Mbps PHY Transceiver
LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
Tables
Tables
1 Related Documents ....................................................................................................................... 10
2 PHY Signal Types .........................................................................................................................12
3 LQFP Numeric Pin List ..................................................................................................................14
4 PHY Signal Types .........................................................................................................................17
5 MII Data Interface Signal Descriptions ..........................................................................................18
6 MII Controller Interface Signal Descriptions .................................................................................. 19
7 Network Interface Signal Descriptions...........................................................................................20
8 Standard Bus and Interface Signal Descriptions ........................................................................... 20
9 Configuration and LED Driver Signal Descriptions ........................................................................ 20
10 Power, Ground, No-Connect Signal Descriptions ......................................................................... 22
11 JTAG Test Signal Descriptions......................................................................................................22
12 Pin Types and Modes.................................................................................................................... 23
13 Hardware Configuration Settings...................................................................................................33
14 Carrier Sense, Loopback, and Collision Conditions ...................................................................... 40
15 4B/5B Coding ................................................................................................................................46
16 Valid JTAG Instructions ................................................................................................................. 53
17 BSR Mode of Operation ................................................................................................................53
18 Device ID Register.........................................................................................................................53
19 Magnetics Requirements...............................................................................................................54
20 I/O Pin Comparison of NIC and Switch RJ-45 Setups...................................................................54
21 Absolute Maximum Ratings...........................................................................................................61
22 Recommended Operating Conditions ........................................................................................... 61
23 Digital I/O Characteristics (Except for MII, XI/XO, and LED/CFG Pins) ........................................62
24 Digital I/O Characteristics1 - MII Pins ............................................................................................62
25 I/O Characteristics - REFCLK/XI and XO Pins ..............................................................................63
26 I/O Characteristics - LED/CFG Pins ..............................................................................................63
27 I/O Characteristics – SD/TP_L Pin ................................................................................................ 63
28 100BASE-TX PHY Characteristics ................................................................................................63
29 100BASE-FX PHY Characteristics ................................................................................................64
30 10BASE-T PHY Characteristics ....................................................................................................64
31 10BASE-T Link Integrity Timing Characteristics............................................................................ 65
32 Thermal Characteristics................................................................................................................. 65
33 100BASE-TX Receive Timing Parameters - 4B Mode .................................................................. 66
34 100BASE-TX Transmit Timing Parameters - 4B Mode ................................................................. 67
35 100BASE-FX Receive Timing Parameters.................................................................................... 68
36 100BASE-FX Transmit Timing Parameters................................................................................... 69
37 10BASE-T Receive Timing Parameters ........................................................................................ 71
38 10BASE-T Transmit Timing Parameters ....................................................................................... 72
39 10BASE-T Jabber and Unjabber Timing .......................................................................................73
40 PHY 10BASE-T SQE (Heartbeat) Timing......................................................................................73
41 Auto-Negotiation and Fast Link Pulse Timing Parameters............................................................74
42 MDIO Timing .................................................................................................................................75
43 Power-Up Timing........................................................................................................................... 76
44 RESET_L Pulse Width and Recovery Timing ............................................................................... 77
45 Register Set for IEEE Base Registers ...........................................................................................78
46 Control Register - Address 0, Hex 0 ..............................................................................................79
47 MII Status Register #1 - Address 1, Hex 1 ....................................................................................80
48 PHY Identification Register 1 - Address 2, Hex 2..........................................................................81