ENABLE
ACC_PWR
GND
VCC
POK ACC_DET
A1
B1
C1
A2
B2
C2
LM34902
PC
Accessory
Device
220k
1M
Accessory
Detection
VCC Main: 2.8V to 5.3V
1.8V
VIN
220k
LM34902
www.ti.com
SNVS804B MAY 2012REVISED APRIL 2013
300mA Current Limited Power Switch
Check for Samples: LM34902
1FEATURES DESCRIPTION
The LM34902 is a 0.3A PFET switch used to control
2 Input Voltage of 2.8V to 5.3V the input voltage of electronic devices. It is easily
0.3A Maximum Switch Current integrated into system designs that have a 2.8V to
0.64ΩTypical Total On-Resistance 5.3V voltage rail. Besides the 0.45ΩPFET switch, the
LM34902 can be enabled or disabled by a logic
Load Detection signal. The IC monitors the presence of a
Enable/Disable downstream electronic device via a dedicated pin to
Switch On Indicator decide whether to turn on the PFET switch. A power
good signal generated by the IC can be used by
Peak Current Limit system control to determine the status of the switch.
Thermal Shutdown The LM34902 also provides over-current and over-
6-Bump Thin DSBGA Package temperature protection. The IC comes in a tiny 6-
bump Thin DSBGA package.
APPLICATIONS
Handsets, Tablets, Notebooks
Portable devices
Typical Application Circuit
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2012–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM34902
SNVS804B MAY 2012REVISED APRIL 2013
www.ti.com
Connection Diagram
Figure 1. Top View
6-Bump Thin DSBGA Package
See Package Number YFQ
PIN DESCRIPTION
Pin
Name Function
Number
Power input of the PFET switch. It also provides power to the entire IC. Connect to the voltage rail that the
VCC A1 accessory device is expected to work off.
GND B1 Common Ground (device substrate).
POK C1 Open-drain PFET status indicator. When the PFET is off, this pin floats. When PFET is on, it is grounded.
ACC_DET C2 Pull this pin low to tell the IC that the downstream accessory device is plugged in.
When this pin is low, the PFET will be turned off and POK will be open-drained. Current limit circuitry will also
ENABLE B2 be disabled. The IC will be in a low-power state. This pin should be held low until VCC is established to
ensure proper initial state of internal logic. When ENABLE is high, the PFET switch will be allowed to turn on.
ACC_PWR A2 Power output terminal of the PFET switch. Connect to input rail of accessory device.
Truth Table
Input Output
Current Limit TJLimit PFET Switch
ENABLE ACC_DET 2.8V < VCC < 5.3V POK
Detected Exceeded Status
0 x No No Yes Open Open Drain
x 1 No No Yes Open Open Drain
0 to 1 0 No No Yes On Grounded
0 to 1 0 Yes No Yes Current Limited Grounded
x x x Yes 2.2V < VCC < 5.3V Open Open Drain
0 x x No 2.2V < VCC < 2.8V Open Open Drain
Note: "x" stands for "don't care".
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)
VCC -0.3V to 6V
ENABLE, POK, ACC_DET,
ACC_PWR(2) -0.3V to 6V
Junction Temperature (TJ) +150°C
Storage Temperature Range 65°C to +150°C
ESD Susceptibility, Human Body Model(3) 2kV
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits and
associated test conditions, see the Electrical Characteristics table.
(2) The voltages on these pins should never exceed VCC+0.3V.
(3) The human body model is a 100pF capacitor discharged through a 1.5 kΩresistor into each pin. Test method is per JESD-22-A114.
2Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: LM34902
LM34902
www.ti.com
SNVS804B MAY 2012REVISED APRIL 2013
Operating Ratings(1)
VCC Voltage(2) 2.8V to 5.3V
Junction Temperature (TJ), LM34902 -40°C to +85°C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits and
associated test conditions, see the Electrical Characteristics table.
(2) For VCC between 2.2V and 2.8V, if ENABLE is a logic low, the LM34902 will not turn on the PFET switch.
Electrical Characteristics
Unless otherwise stated, the following conditions apply: VCC = 3V. Limits in standard type are for TJ= 25°C only; limits in
boldfacetype apply over the operating junction temperature (TJ) range. Minimum and Maximum limits are ensured through
test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ= 25°C and are provided
for reference purposes only.
Symbol Parameter Conditions Min Typ Max Units
Input Low Voltage, ACC_DET,
VIL 0.45 V
ENABLE
Input High Voltage, ACC_DET,
VIH 1.35 V
ENABLE
Input Hysteresis, ACC_DET,
VIHS 55 mV
ENABLE
ILK Input Current, ACC_DET, ENABLE ACC_DET, ENABLE between 0V and VCC 1 µA
VENABLE = 0V
ISD VCC Current in Shutdown Mode 10 µA
VVCC = 5.3V
VENABLE = 1.8V
IQVCC Quiescent Current 47 100 µA
VVCC = 5.3V, IACC_PWR = 0A
VVCC = 3V
Total On Resistance Between
RON 0.64 1Ω
VCC and ACC_PWR Pins IACC_PWR = 0.3A
VACC_PWR = 0V to VCC
ACC_PWR Leakage Current
ILK_ACC VVCC = 5.3V 1 µA
When PFET is Off VENABLE = 0V
VVCC = 2.8V to 5.3V
ILIMIT PFET Switch Current Limit 0.3 0.45 0.65 A
VACC_PWR = 0V
VPOK POK Current Sink Capability POK asserted. 1mA sink current. 0.4 V
POK de-asserted.
IPOK POK Leakage Current 1 µA
VPOK = 3.3V
ACC_DET rising to either PFET or POK FET
T1ACC_DET Response Time 40 ns
turn-off
ENABLE rising to either PFET or POK FET turn-
T2ENABLE Response Time 10 µs
on
ACC_DET tied to ground. ENABLE logic high =
T3Minimum ENABLE Cycle Time(1) 300 ns
1.8V. VCC = 2.8V to 5.3V.
(1) If ENABLE toggles low from a high state, it needs to stay low for at least T3long before toggling back to high. Otherwise the internal flip-
flop may not be set and the PFET switch may not turn on.
Thermal Characteristics Typical
Symbol Description Conditions Unit
Value
Mount device on a standard 4-layer 4" x 3" JEDEC board. Apply known amount of
Junction-to-Ambient
θJA1 power to the package. Measure junction temperature and surrounding air 104 °C/W
Thermal Resistance temperature. No air flow. Refer to JESD51-7 for more information.
Junction-to-Ambient Mount device on a 2-layer 2.19" x 2.9" board. Copper thickness is 1 oz per layer.
θJA2 136 °C/W
Thermal Resistance No airflow. Power dissipation is 0.5W.
Thermal Shutdown Raise TJfrom below 150°C until POK is de-asserted. No load is connected at
TSD 170 °C
Threshold ACC_PWR.
Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: LM34902
LM34902
SNVS804B MAY 2012REVISED APRIL 2013
www.ti.com
Typical Performance Characteristics
Unless indicated otherwise, VCC = 3V and TJ= 25°C.
Total ON Resistance vs Temperature Total ON Resistance vs Switch Current
Figure 2. Figure 3.
Total ON Resistance vs VCC Current Limit vs Temperature
Figure 4. Figure 5.
Input Logic High Threshold vs Temperature Input Logic Low Threshold vs Temperature
Figure 6. Figure 7.
4Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: LM34902
LM34902
www.ti.com
SNVS804B MAY 2012REVISED APRIL 2013
BLOCK DIAGRAM
APPLICATION HINTS
To turn on the PFET switch, both the ENABLE and the ACC_DET pins need to be asserted. In addition,
ACC_DET needs to be asserted no later than the rising edge of the ENABLE signal. De-assertion of either the
ENABLE or the ACC_DET will result in turned-off PFET switch and de-asserted POK signal.
To prevent a glitch in the otherwise asserted ACC_DET from keeping the FETs turned off, it is a good practice to
cycle the ENABLE following every falling edge in the ACC_DET signal. When cycling the ENABLE, make sure it
stays low for at least T3long before toggling back high. If ENABLE logic high level is not 1.8V, make sure
ENABLE stays low for at least 1µs.
When laying out the PCB, try to keep the ENABLE and ACC_DET traces as short as possible and away from
noisy traces.
Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: LM34902
LM34902
SNVS804B MAY 2012REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Changes from Revision A (April 2013) to Revision B Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 5
6Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: LM34902
PACKAGE OPTION ADDENDUM
www.ti.com 15-Apr-2017
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM34902ITM/NOPB ACTIVE DSBGA YFQ 6 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 K
LM34902ITMX/NOPB ACTIVE DSBGA YFQ 6 3000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 K
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 15-Apr-2017
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM34902ITM/NOPB DSBGA YFQ 6 250 178.0 8.4 0.89 1.3 0.7 4.0 8.0 Q1
LM34902ITMX/NOPB DSBGA YFQ 6 3000 178.0 8.4 0.89 1.3 0.7 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Nov-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM34902ITM/NOPB DSBGA YFQ 6 250 210.0 185.0 35.0
LM34902ITMX/NOPB DSBGA YFQ 6 3000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Nov-2013
Pack Materials-Page 2
MECHANICAL DATA
YFQ0006xxx
www.ti.com
TMD06XXX (Rev B)
E
0.600±0.075
D
A
. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
4215075/A 12/12
D: Max =
E: Max =
1.24 mm, Min =
0.84 mm, Min =
1.18 mm
0.78 mm
IMPORTANT NOTICE
Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its
semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers
should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated
circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and
services.
Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced
documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements
different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the
associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers
remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have
full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products
used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with
respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous
consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and
take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will
thoroughly test such applications and the functionality of such TI products as used in such applications.
TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information,
including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to
assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any
way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource
solely for this purpose and subject to the terms of this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically
described in the published documentation for a particular TI Resource.
Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that
include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE
TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM,
INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF
PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL,
DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN
CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949
and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.
Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such
products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards
and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must
ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in
life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.
Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all
medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).
Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-
compliance with the terms and provisions of this Notice.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2017, Texas Instruments Incorporated