74LVC1G38 2-input NAND gate; open drain Rev. 8 -- 7 December 2016 Product data sheet 1. General description The 74LVC1G38 provides a 2-input NAND function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant outputs for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V). ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V 24 mA output drive (VCC = 3.0 V) CMOS low power consumption Open drain outputs Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from 40 C to +125 C. 74LVC1G38 Nexperia 2-input NAND gate; open drain 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G38GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 74LVC1G38GV 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753 74LVC1G38GM 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; SOT886 6 terminals; body 1 1.45 0.5 mm 74LVC1G38GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; SOT891 6 terminals; body 1 1 0.5 mm 74LVC1G38GN 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 0.9 1.0 0.35 mm SOT1115 74LVC1G38GS 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 1.0 1.0 0.35 mm SOT1202 74LVC1G38GX 40 C to +125 C X2SON5 X2SON5: plastic thermal enhanced extremely thin small outline package; no leads; 5 terminals; body 0.8 0.8 0.35 mm SOT1226 4. Marking Table 2. Marking Type number Marking code[1] 74LVC1G38GW YB 74LVC1G38GV YB 74LVC1G38GM YB 74LVC1G38GF YB 74LVC1G38GN YB 74LVC1G38GS YB 74LVC1G38GX YB [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram < $ % Logic symbol 74LVC1G38 Product data sheet % *1' DDE DDE Fig 1. $ < Fig 2. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 DDE Fig 3. Logic diagram (c) Nexperia B.V. 2017. All rights reserved 2 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain 6. Pinning information 6.1 Pinning /9&* /9&* $ % *1' $ 9&& % QF *1' < 9&& < DDE 7UDQVSDUHQWWRSYLHZ DDE Fig 4. Pin configuration SOT353-1 and SOT753 Fig 5. Pin configuration SOT886 /9&* /9&* $ $ 9&& % QF *1' < 9&& < *1' % DDI DDD 7UDQVSDUHQWWRSYLHZ 7UDQVSDUHQWWRSYLHZ Fig 6. Pin configuration SOT891, SOT1115 and SOT1202 Fig 7. Pin configuration SOT1226 (X2SON5) 6.2 Pin description Table 3. Pin description Symbol Pin Description TSSOP5 and X2SON5 XSON6 A 1 1 data input B 2 2 data input GND 3 3 ground (0 V) Y 4 4 data output n.c. - 5 not connected VCC 5 6 supply voltage 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 3 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain 7. Functional description Table 4. Function table[1] Input Output A B Y L L Z L H Z H L Z H H L [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF state 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current VI input voltage IOK output clamping current output voltage VO Conditions Min VI < 0 V [1] Max Unit 0.5 +6.5 50 - 0.5 +6.5 V V mA - 50 mA Active mode [1][2] 0.5 +6.5 V Power-down mode [1][2] 0.5 +6.5 V - 50 mA 100 mA VO > VCC or VO < 0 V IO output current ICC supply current - IGND ground current 100 - mA Tstg storage temperature 65 +150 C - 300 mW total power dissipation Ptot VO = 0 V to VCC Tamb = 40 C to +125 C [3] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. [3] For TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 and X2SON 5packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K. 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 4 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VO output voltage Conditions Min Typ Max Unit 1.65 - 5.5 V 0 - 5.5 V Active mode 0 - 5.5 V Disable mode; VCC = 1.65 V to 5.5 V 0 - 5.5 V Power-down mode; VCC = 0 V 0 - 5.5 V 40 - +125 C - - 20 ns/V - - 10 ns/V Min Typ Tamb ambient temperature t/V input transition rise and VCC = 1.65 V to 2.7 V fall rate VCC = 2.7 V to 5.5 V 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 40 C to +85 VIH VIL VOL Conditions Max Unit C[1] HIGH-level input voltage LOW-level input voltage LOW-level output voltage 0.65 VCC - - V VCC = 2.3 V to 2.7 V 1.7 - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V 0.7 VCC - - V VCC = 1.65 V to 1.95 V - - VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - VI = VIH or VIL VCC = 1.65 V to 1.95 V 0.35 VCC V 0.3 VCC V - - - IO = 100 A; VCC = 1.65 V to 5.5 V - - 0.1 V IO = 4 mA; VCC = 1.65 V - - 0.45 V IO = 8 mA; VCC = 2.3 V - - 0.3 V IO = 12 mA; VCC = 2.7 V - - 0.4 V IO = 24 mA; VCC = 3.0 V - - 0.55 V IO = 32 mA; VCC = 4.5 V - - 0.55 V II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - 0.1 1 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - 0.1 2 A IOFF power-off leakage current VI or VO = 5.5 V; VCC = 0 V - 0.1 2 A ICC supply current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A - 0.1 4 A ICC additional supply current VI = VCC 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V; per pin - 5 500 A CI input capacitance - 2.5 - pF 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 5 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain Table 7. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit 0.65 VCC - - V Tamb = 40 C to +125 C HIGH-level input voltage VIH LOW-level input voltage VIL LOW-level output voltage VOL VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V 1.7 - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V 0.7 VCC - - V VCC = 1.65 V to 1.95 V - - 0.35 VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - VI = VIH or VIL - - 0.3 VCC V - IO = 100 A; VCC = 1.65 V to 5.5 V - - 0.1 V IO = 4 mA; VCC = 1.65 V - - 0.70 V IO = 8 mA; VCC = 2.3 V - - 0.45 V IO = 12 mA; VCC = 2.7 V - - 0.60 V IO = 24 mA; VCC = 3.0 V - - 0.80 V IO = 32 mA; VCC = 4.5 V - - 0.80 V II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - - 1 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - 2 A IOFF power-off leakage current VI or VO = 5.5 V; VCC = 0 V - - 2 A ICC supply current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A - - 4 A ICC additional supply current VI = VCC 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V; per pin - - 500 A [1] All typical values are measured at VCC = 3.3 V and Tamb = 25 C. 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 6 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9. Symbol Parameter propagation delay tpd power dissipation capacitance CPD 40 C to +85 C Conditions 40 C to +125 C Unit Min Typ[1] Max Min Max VCC = 1.65 V to 1.95 V 1.0 3.0 10.0 1.0 12.5 ns VCC = 2.3 V to 2.7 V 0.5 1.8 6.0 0.5 7.5 ns VCC = 2.7 V 0.5 2.5 5.0 0.5 6.5 ns VCC = 3.0 V to 3.6 V 0.5 2.3 4.5 0.5 5.7 ns VCC = 4.5 V to 5.5 V 0.5 1.5 3.9 0.5 4.9 ns - 6 - - - pF A, B to Y; see Figure 8 [2] [3] VCC = 3.3 V; VI = GND to VCC [1] Typical values are measured at Tamb = 25 C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. [2] tpd is the same as tPZL and tPLZ. [3] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi N + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL VCC2 fo) = sum of outputs. 12. AC waveforms 9, $%LQSXW 90 *1' W 3/= W 3=/ 9&& <RXWSXW 90 92/ 9; DDE Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. The input (A, B) to output (Y) propagation delays. 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 7 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain Table 9. Measurement points Supply voltage Input Output VCC VM VM VX 1.65 V to 1.95 V 0.5 VCC 0.5 VCC VOL + 0.15 V 2.3 V to 2.7 V 0.5 VCC 0.5 VCC VOL + 0.15 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V 3.0 V to 3.6 V 1.5 V 1.5 V VOL + 0.3 V 4.5 V to 5.5 V 0.5 VCC 0.5 VCC VOL + 0.3 V 9(;7 9&& * 9, 5/ 92 '87 57 &/ 5/ PQD Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 9. Table 10. Test circuit for measuring switching times Test data Supply voltage Input VCC VI tr, tf CL RL tPZL, tPLZ 1.65 V to 1.95 V VCC 2.0 ns 30 pF 1 k VCC 2.3 V to 2.7 V VCC 2.0 ns 30 pF 500 VCC 2.7 V 2.7 V 2.5 ns 50 pF 500 VCC 3.0 V to 3.6 V 2.7 V 2.5 ns 50 pF 500 VCC 4.5 V to 5.5 V VCC 2.5 ns 50 pF 500 VCC 74LVC1G38 Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 VEXT (c) Nexperia B.V. 2017. All rights reserved 8 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain 13. Package outline 76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ( ' 627 $ ; F \ +( Y 0 $ = $ $ $ $ /S H / Z 0 ES GHWDLO; H PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H H +( PP / /S Y Z \ = 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ 02 6&$ (8523($1 352-(&7,21 ,668('$7( Fig 10. Package outline SOT353-1 (TSSOP5) 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 9 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain 3ODVWLFVXUIDFHPRXQWHGSDFNDJHOHDGV 627 ' % $ ( \ ; +( Y 0 $ 4 $ $ F /S GHWDLO; ES H Z 0 % PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ $ ES F ' ( H +( /S 4 Y Z \ PP 287/,1( 9(56,21 5()(5(1&(6 ,(& -('(& -(,7$ 6&$ 627 (8523($1 352-(&7,21 ,668('$7( Fig 11. Package outline SOT753 (SC-74A) 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 10 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain 627 ;621SODVWLFH[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGVWHUPLQDOVERG\[[PP E [ / / H H H [ $ $ ' ( WHUPLQDO LQGH[DUHD PP VFDOH 'LPHQVLRQV PPDUHWKHRULJLQDOGLPHQVLRQV 8QLW PP PD[ QRP PLQ $ $ E ' ( H H / / 1RWHV ,QFOXGLQJSODWLQJWKLFNQHVV &DQEHYLVLEOHLQVRPHPDQXIDFWXULQJSURFHVVHV 2XWOLQH YHUVLRQ 627 VRWBSR 5HIHUHQFHV ,(& -('(& -(,7$ (XURSHDQ SURMHFWLRQ ,VVXHGDWH 02 Fig 12. Package outline SOT886 (XSON6) 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 11 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain ;621SODVWLFH[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGVWHUPLQDOVERG\[[PP 627 E i / / H H H i $ $ ' ( WHUPLQDO LQGH[DUHD PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ PD[ E ' ( H H / / PP 1RWH &DQEHYLVLEOHLQVRPHPDQXIDFWXULQJSURFHVVHV 5()(5(1&(6 287/,1( 9(56,21 ,(& 627 -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7( Fig 13. Package outline SOT891 (XSON6) 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 12 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain ;621H[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV WHUPLQDOVERG\[[PP 627 E i / / H H H i $ $ ' ( WHUPLQDO LQGH[DUHD VFDOH 'LPHQVLRQV 8QLW PP PP $ $ E ' ( H / H PD[ QRP PLQ / 1RWH ,QFOXGLQJSODWLQJWKLFNQHVV 9LVLEOHGHSHQGLQJXSRQXVHGPDQXIDFWXULQJWHFKQRORJ\ VRWBSR 5HIHUHQFHV 2XWOLQH YHUVLRQ ,(& -('(& -(,7$ 627 (XURSHDQ SURMHFWLRQ ,VVXHGDWH Fig 14. Package outline SOT1115 (XSON6) 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 13 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain ;621H[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV WHUPLQDOVERG\[[PP 627 E i / / H H H i $ $ ' ( WHUPLQDO LQGH[DUHD VFDOH 'LPHQVLRQV 8QLW PP PP $ $ E ' ( H / H / PD[ QRP PLQ 1RWH ,QFOXGLQJSODWLQJWKLFNQHVV 9LVLEOHGHSHQGLQJXSRQXVHGPDQXIDFWXULQJWHFKQRORJ\ VRWBSR 5HIHUHQFHV 2XWOLQH YHUVLRQ ,(& -('(& -(,7$ 627 (XURSHDQ SURMHFWLRQ ,VVXHGDWH Fig 15. Package outline SOT1202 (XSON6) 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 14 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain ;621SODVWLFWKHUPDOHQKDQFHGH[WUHPHO\WKLQVPDOORXWOLQHSDFNDJHQROHDGV WHUPLQDOVERG\[[PP ' $ % 627 ; $ ( $ $ GHWDLO; WHUPLQDO LQGH[DUHD H & Y Z E WHUPLQDO LQGH[DUHD & $ % & \ & \ N ' K / PP VFDOH 'LPHQVLRQV 8QLW PP $ $ $ ' 'K ( E H N / PD[ QRP PLQ Y Z \ \ 1RWH 'LPHQVLRQ$LVLQFOXGLQJSODWLQJWKLFNQHVV 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 2XWOLQH YHUVLRQ 5HIHUHQFHV ,(& -('(& (,$- VRWBSR (XURSHDQ SURMHFWLRQ ,VVXHGDWH 627 Fig 16. Package outline SOT1226 (X2SON5) 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 15 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain 14. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC1G38 v.8 20161207 Product data sheet - 74LVC1G38 v.7 Modifications: 74LVC1G38 v.7 Modifications: 74LVC1G38 v.6 Modifications: 74LVC1G38 v.5 Modifications: * Table 7: The maximum limits for leakage current and supply current have changed. 20121004 * 74LVC1G38 v.6 Product data sheet - 74LVC1G38 v.5 Added type number 74LVC1G38GX (SOT1226) Package outline drawing of SOT886 (Figure 12) modified. 20111206 * - Pin configuration SOT1226 (Figure 7) modified. 20120702 * * Product data sheet Product data sheet - 74LVC1G38 v.4 Legal pages updated. 74LVC1G38 v.4 20101005 Product data sheet - 74LVC1G38 v.3 74LVC1G38 v.3 20070827 Product data sheet - 74LVC1G38 v.2 74LVC1G38 v.2 20060913 Product data sheet - 74LVC1G38 v.1 74LVC1G38 v.1 20041018 Product data sheet - - 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 16 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term `short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 16.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 16.3 Disclaimers Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia's aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes -- Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74LVC1G38 Product data sheet Suitability for use -- Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the Nexperia product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). Nexperia does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 17 of 19 74LVC1G38 Nexperia 2-input NAND gate; open drain Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products -- Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia's warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia's specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia's standard warranty and Nexperia's product specifications. Translations -- A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com 74LVC1G38 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 18 of 19 Nexperia 74LVC1G38 2-input NAND gate; open drain 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 (c) General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 07 December 2016