74LVC14APW,118 - NXP - searchdatasheet.com

1. General description

The 74LVC14A provides six inverting buffers with Schmitt trigger input. It is capable of

transforming slowly-changing input signals into sharply defined, jitter-free output signals.

The input s switch at differ ent points fo r positive and negative-going si gnals. The difference

between the po sit ive vo ltage VT+ and the negative voltage VT is defined as the input

hysteresis voltage VH.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this

device as a translator in mixed 3.3 V and 5 V applications.

2. Features and benefits

Wide supply voltage range from 1.2 V to 3.6 V

5 V tolerant input for interfacing with 5 V logic

CMOS low-power consumption

Direct interface with TTL levels

Unlimited input rise and fall times

Inputs accept voltages up to 5.5 V

Complies with JEDEC standard JESD8-C/JESD36 (2.7 V to 3.6 V)

ESD protection:

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-B ex ce ed s 200 V

CDM JESD22-C101E exceeds 1000 V

Multiple package options

Specified from 40 C to +85 C and from 40 C to +125 C

3. Applications

Wave and pulse shapers for highly noisy environments

Astable multivibrators

Monostable multivibrators

74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

Rev. 5 — 23 December 2011 Product data sheet

Product data sheet Rev. 5 — 23 December 2011 2 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

4. Ordering information

5. Functional diagram

Table 1. Ordering information

Type number Package

Temperatu re range Name Description Version

74LVC14AD 40 C to +125 C SO14 plastic small outline package; 14 leads;

body width 3.9 mm SOT108-1

74LVC14ADB 40 C to +125 C SSOP14 plastic thin shrink small outline package; 14 leads;

body width 5.3 mm SOT337-1

74LVC14APW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;

body width 4.4 mm SOT402-1

74LVC14ABQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin

quad flat package; no leads; 14 terminals;

body 2.5 30.85 mm

SOT762-1

Fig 1. Logic symbol Fig 2. IEC logic symbol

mna204

1A 1Y

2A 2Y

3A 3Y

4A 4Y

5A 5Y

11 10

6A 6Y

13 12

001aac497

Fig 3. Logic diagram for one Schmitt trigger

mna025

Product data sheet Rev. 5 — 23 December 2011 3 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

6. Pinning information

6.1 Pinning

6.2 Pin description

7. Functional description

[1] H = HIGH voltage level; L = LOW voltage level

(1) This is not a supply pin. The substrate is attached to this

pad using conductive die attach material. There is no

electrical or mechanical requirement to solder this pad.

However, if it is soldered, the solder land should remain

floating or be connected to GND.

Fig 4. Pin configuration SO14, SSOP14 and

TSSOP14 Fig 5. Pin configuration DHVQFN14

14A

1A V

1Y 6A

2A 6Y

2Y 5A

3A 5Y

3Y 4A

GND 4Y

001aac518

001aac519

14A

GND(1)

Transparent top view

3Y 4A

3A 5Y

2Y 5A

2A 6Y

1Y 6A

GND

VCC

6 9

5 10

4 11

3 12

2 13

terminal 1

index area

Table 2. Pin description

Symbol Pin Description

1A, 2A, 3A, 4A, 5A, 6A 1, 3, 5, 9, 11, 13 data input

1Y, 2Y, 3Y, 4Y, 5Y, 6Y 2, 4, 6, 8, 10, 12 data output

GND 7 ground (0 V)

VCC 14 supply voltage

Table 3. Function table[1]

Input nA Output nY

Product data sheet Rev. 5 — 23 December 2011 4 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

8. Limiting values

[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.

[2] The output voltage ratings may be exceeded if the output current ratings are observed.

[3] When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.

[4] For SO14 packages: Ptot derates linearly with 8 mW/K above 70 C.

For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.

For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C.

9. Recommended operating conditions

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage 0.5 +6.5 V

VIinput voltage [1] 0.5 +6.5 V

VOoutput voltage [2][3] 0.5 VCC + 0.5 V

IIK input clamping current VI < 0 V 50 - mA

IOK output clamping current VO > VCC or VO < 0 V - 50 mA

IOoutput current VO = 0 V to VCC -50 mA

ICC supply current - 100 mA

IGND ground current 100 - mA

Tstg storage temperature 65 +150 C

Ptot total power dissipation Tamb = 40 C to +125 C[4] -500mW

Table 5. Recommended operating con ditions

Symbol Parameter Conditions Min Typ Max Unit

VCC supply voltage 1.65 - 3.6 V

functional 1.2 - - V

VIinput voltage 0 - 5.5 V

VOoutput voltage 0 - VCC V

Tamb ambient temperature 40 - +125 C

Product data sheet Rev. 5 — 23 December 2011 5 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

10. Static characteristics

[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb =25C.

11. Dynamic characteristics

Table 6. Static characteristics

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit

Min Typ[1] Max Min Max

VOH HIGH-level

output voltage VI=V

T+ or VT

IO=100 A;

VCC = 1.65 V to 3.6 V VCC 0.2--V

CC 0.3 - V

IO=4mA; V

CC = 1.65 V 1.2 - - 1.05 - V

IO=8mA; V

CC = 2.3 V 1.8 - - 1.65 - V

IO=12 mA; VCC = 2.7 V 2.2 - - 2.05 - V

IO=18 mA; VCC = 3.0 V 2.4 - - 2.25 - V

IO=24 mA; VCC = 3.0 V 2.2 --2.0 -V

VOL LOW-level

voltage output VI=V

T+ or VT

IO= 100 A; VCC = 1.6 5 V to 3.6 V - - 0.2 - 0.3 V

IO=4mA; V

CC = 1.65 V - - 0.45 - 0.65 V

IO=8mA; V

CC = 2.3 V - - 0.6 - 0.8 V

IO = 12 mA; VCC = 2.7 V - - 0.4 - 0.6 V

IO = 24 mA; VCC = 3.0 V - - 0.55 - 0.8 V

IIinput leakage

current VCC = 3.6 V; VI = 5.5 V or GND - 0.1 5- 20 A

ICC supply current VCC = 3.6 V; VI = VCC or GND;

IO=0A -0.110-40A

ICC additional

supply current per input pin; VCC = 2.7 V to 3.6 V ;

VI=V

CC  0.6 V; IO = 0 A - 5 500 - 5000 A

CIinput

capacitance VCC = 0 V to 3.6 V; VI = GND to VCC - 4.0-- -pF

Table 7. Dynamic characteristics

Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.

Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit

Min Typ[1] Max Min Max

tpd propagation delay nA to nY; see Figure 6 [2]

VCC = 1.2 V - 16 - - - ns

VCC = 1.65 V to 1.95 V 1.0 6.1 12.7 1.0 14.7 ns

VCC = 2.3 V to 2.7 V 1.5 3.5 7.8 1.5 10.0 ns

VCC = 2.7 V 1.5 3.6 7.5 1.5 9.5 ns

VCC = 3.0 V to 3.6 V 1.0 3.2 6.4 1.0 8.0 ns

tsk(o) output skew time VCC = 3.0 V to 3.6 V [3] - - 1.0 - 1.5 ns

Product data sheet Rev. 5 — 23 December 2011 6 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

[1] Typical values are measured at Tamb =25C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.

[2] tpd is the same as tPLH and tPHL.

[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.

[4] CPD is used to determine the dynamic power dissipation (PDin W).

PD=C

PD VCC2fiN+(CLVCC2fo) where:

fi= input frequency in MHz; fo= output frequency in MHz

CL= output load capacitance in pF

VCC = supply voltage in Volts

N = number of inputs switching

(CLVCC2fo) = sum of the outputs.

12. Waveforms

CPD power dissipation

capacitance per buffer; VI=GNDtoV

CC [4]

VCC = 1.65 V to 1.95 V - 9.0 - - - pF

VCC = 2.3 V to 2.7 V - 12.5 - - - pF

VCC = 3.0 V to 3.6 V - 15.6 - - - pF

Table 7. Dynamic characteristics …continued

Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.

Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit

Min Typ[1] Max Min Max

VM= 1.5 V at VCC 2.7 V

VM=0.5 VCC at VCC <2.7V.

VOL and VOH are typical output voltage levels that occur with the output load.

Fig 6. Propagation delay input (nA) to output (nY)

mna344

PHL

PLH

nA input

nY output

GND

Product data sheet Rev. 5 — 23 December 2011 7 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

Test data is given in Table 8. Definitions for test circuit:

RL = Load resistance

CL = Load capacitance including jig and probe capacitance

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

Fig 7. Load circuitry for measuring switching times

10 %

90 %

0 V

negative

pulse

positive

pulse

0 V

90 %

10 %

001aaf615

DUT

RTRL

PULSE

GENERATOR

Table 8. Test data

Supply voltage Input Load

VItr, tfCLRL

1.2 V VCC  2 ns 30 pF 1 k

1.65 V to 1.95 V VCC  2 ns 30 pF 1 k

2.3 V to 2.7 V VCC  2 ns 30 pF 500 

2.7 V 2.7 V  2.5ns 50pF 500

3.0Vto3.6V 2.7V  2.5ns 50pF 500

Product data sheet Rev. 5 — 23 December 2011 8 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

13. Transfer characteristics

[1] Typical transfer characteristic is displayed in Figure 9.

Table 9. Transfer characteristics

Voltages are referenced to GND (ground = 0 V); see Figure 8.

Symbol Parameter Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 CUnit

Min Max Min Max

VT+ positive-going

threshold vo ltage VCC = 1.2 V 0.2 1.0 0.2 1.0 V

VCC = 1.65 V 0.4 1.3 0.4 1.3 V

VCC = 1.95 V 0.6 1.5 0.6 1.5 V

VCC = 2.3 V 0 .8 1.7 0.8 1.7 V

VCC = 2.5 V 0 .9 1.7 0.9 1.7 V

VCC = 2.7 V 1 .1 2 1.1 2 V

VCC = 3 V 1.2 2 1.2 2 V

VCC = 3.6 V 1 .2 2 1.2 2 V

VTnegative-going

threshold vo ltage VCC = 1.2 V 0.12 0.75 0.12 0.75 V

VCC = 1.65 V 0.15 0.85 0.15 0.85 V

VCC = 1.95 V 0.25 0.95 0.25 0.95 V

VCC = 2.3 V 0 .4 1.1 0.4 1.1 V

VCC = 2.5 V 0 .4 1.2 0.4 1.2 V

VCC = 2.7 V 0 .8 1.4 0.8 1.4 V

VCC = 3 V 0.8 1.5 0.8 1.5 V

VCC = 3.6 V 0 .8 1.5 0.8 1.5 V

VHhysteresis voltage

(VT+ VT)VCC = 1.2 V 0.1 1 .0 0.1 1.0 V

VCC = 1.65 V 0.2 1.15 0.2 1.15 V

VCC = 1.95 V 0.2 1.25 0.2 1.25 V

VCC = 2.3 V 0 .3 1.3 0.3 1.3 V

VCC = 2.5 V 0 .3 1.3 0.3 1.3 V

VCC = 2.7 V 0 .3 1.1 0.3 1.1 V

VCC = 3 V 0.3 1.2 0.3 1.2 V

VCC = 3.6 V [1] 0.3 1.2 0.3 1.2 V

Product data sheet Rev. 5 — 23 December 2011 9 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

14. Waveforms transfer characteristics

VT at 20 % and VT+ at 70 %

Fig 8. Definition of VT+, VT and VH

mna207

VHVT+

VT−

mna208

T+

T−

VCC = 3.3 V.

Fig 9. Typical transfer characteristic

0 0.6 1.2 3

mna582

1.8 2.4 VI (V)

ICC

(mA)

Product data sheet Rev. 5 — 23 December 2011 10 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

15. Application information

(1) Positive-going edge.

(2) Negative going-edge.

Linear change of VI between 0.8 V to 2.0 V.

All values given are typical unless otherwise specifie d.

Fig 10. Average supply current as a function of supply voltage

2.1 2.7 3.9

2.5

0.5

1.5

1.0

2.0

mna581

3.32.4 3.0 3.6

VCC (V)

ICC

(mA)

(1)

(2)

at VCC = 3.0 V

Fig 11. Relaxatio n os c illator

mna035

---1

0.8 RC

---------------------

=

Product data sheet Rev. 5 — 23 December 2011 11 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

16. Package outline

Fig 12. Package outline SOT108-1 (SO14)

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10 1.45

1.25 0.25 0.49

0.36 0.25

0.19 8.75

8.55 4.0

3.8 1.27 6.2

5.8 0.7

0.6 0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT108-1

detail X

vMA

(A )

076E06 MS-012

pin 1 index

0.069 0.010

0.004 0.057

0.049 0.01 0.019

0.014 0.0100

0.0075 0.35

0.34 0.16

0.15 0.05

1.05

0.041

0.244

0.228 0.028

0.024 0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

99-12-27

03-02-19

0 2.5 5 mm

scale

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

Product data sheet Rev. 5 — 23 December 2011 12 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

Fig 13. Package outline SOT337-1 (SSOP14)

UNIT A1A2A3bpcD

(1) E(1) eH

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.21

0.05 1.80

1.65 0.25 0.38

0.25 0.20

0.09 6.4

6.0 5.4

5.2 0.65 1.25 0.2

7.9

7.6 1.03

0.63 0.9

0.7 1.4

0.9 8

0.13 0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

SOT337-1 99-12-27

03-02-19

(1)

vMA

14 8

detail X

(A )

MO-150

pin 1 index

0 2.5 5 mm

scale

SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1

max.

Product data sheet Rev. 5 — 23 December 2011 13 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

Fig 14. Package outline SOT402-1 (TSSOP14)

UNIT A1A2A3bpcD

(1) E(2) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.15

0.05 0.95

0.80 0.30

0.19 0.2

0.1 5.1

4.9 4.5

4.3 0.65 6.6

6.2 0.4

0.3 0.72

0.38 8

0.13 0.10.21

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT402-1 MO-153 99-12-27

03-02-18

0.25

14 8

detail X

(A )

vMA

0 2.5 5 mm

scale

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1

max.

1.1

pin 1 index

Product data sheet Rev. 5 — 23 December 2011 14 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

Fig 15. Package outline SOT762-1 (DHVQFN14)

terminal 1

index area

0.51

A1Eh

UNIT ye

0.2

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 3.1

2.9

1.65

1.35

2.6

2.4 1.15

0.85

0.30

0.18

0.05

0.00 0.05 0.1

DIMENSIONS (mm are the original dimensions)

SOT762-1 MO-241 - - -- - -

0.5

0.3

0.1

0.05

0 2.5 5 mm

scale

SOT762-1

DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;

14 terminals; body 2.5 x 3 x 0.85 mm

A(1)

max.

AA1c

detail X

y1C

13 9

02-10-17

03-01-27

terminal 1

index area

E(1)

Note

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

D(1)

Product data sheet Rev. 5 — 23 December 2011 15 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

17. Abbreviations

18. Revision history

Table 10. Abbreviations

Acronym Description

CDM Charged Device Mo del

DUT Device Under Test

ESD ElectroStatic Discharge

HBM Human Body Model

MM Machine Model

TTL Transistor-Tran s istor Logic

Table 11. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74LVC14A v.5 20111223 Product data sheet - 74LVC14A v.4

Modifications: •The format of this data sheet has been redesigned to comply with the new identity guidelines

of NXP Semiconductors.

•Legal texts have been adapted to the new company name where appropriate.

•Table 4, Table 5, Table 6, Table 7 and Table 8: values added for lower voltage ranges.

74LVC14A v.4 20050215 Product data sheet - 74LVC14A v.3

74LVC14A v.3 20030228 Product specification - 74LVC14A v.2

74LVC14A v.2 20020315 Product specification - 74LVC14A v.1

74LVC14A v.1 19980428 Product specification -

Product data sheet Rev. 5 — 23 December 2011 16 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

19. Legal information

19.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

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Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

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Characteristics sections of this document is not warranted. Constant or

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products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individua l agreement. In case an individual

agreement is concluded only the ter ms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing i n this document may be interpreted or

construed as an of fer t o sell product s that is open for accept ance or t he grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulatio ns. Export might require a prior

authorization from competent authorities.

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contains data from the objective specification for product development.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] dat a sheet Production This document contains the product specification.

Product data sheet Rev. 5 — 23 December 2011 17 of 18

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for automotive use. It i s neither qua lified nor test ed

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automot ive specifications and standard s, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, damages or failed product claims resulting from custome r design and

use of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specif ications.

19.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respect i ve ow ners.

20. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors 74LVC14A

Hex inverting Schmitt trigger with 5 V tolerant input

For more information, please visit: http://www.nxp.co m

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 23 December 2011

Document identifier: 74LVC14A

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

21. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

3 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Functional de scription . . . . . . . . . . . . . . . . . . . 3

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4

9 Recommended operating conditions. . . . . . . . 4

10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5

11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5

12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

13 Transfer characteristics . . . . . . . . . . . . . . . . . . 8

14 Waveforms transfer characteristics. . . . . . . . . 9

15 Application information. . . . . . . . . . . . . . . . . . 10

16 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11

17 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 15

18 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15

19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16

19.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16

19.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

19.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 16

19.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17

20 Contact information. . . . . . . . . . . . . . . . . . . . . 17

21 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18