L4978 2A STEP DOWN SWITCHING REGULATOR 1 2 Features Figure 1. Packages UP TO 2A STEP DOWN CONVERTER OPERATING INPUT VOLTAGE FROM 8V TO 55V PRECISE 3.3V (1%) INTERNAL REFERENCE VOLTAGE OUTPUT VOLTAGE ADJUSTABLE FROM 3.3V TO 50V SWITCHING FREQUENCY ADJUSTABLE UP TO 300KHz VOLTAGE FEEDFORWARD ZERO LOAD CURRENT OPERATION INTERNAL CURRENT LIMITING (PULSEBYPULSE AND HICCUP MODE) INHIBIT FOR ZERO CURRENT CONSUMPTION PROTECTION AGAINST FEEDBACK DISCONNECTION THERMAL SHUTDOWN SOFT START FUNCTION DIP-8 SO16W Table 1. Order Codes Part Number Package L4978 DIP-8 L4978D SO16 L4978D013TR SO16 in Tape & Reel efficency and high switching speed. A switching frequency up to 300KHz is achievable (the maximum power dissipation of the packages must be observed). A wide input voltage range between 8V to 55V and output voltages regulated from 3.3V to 50V cover the majority of today's applications. Features of this new generations of DCDC converter include pulse-by-pulse current limit, hiccup mode for short circuit protection, voltage feedforward regulation, soft-start, protection against feedback loop disconnection, inhibit for zero current consumption and thermal shutdown. DESCRIPTION The L4978 is a step down monolithic power switching regulator delivering 2A at a voltage between 3.3V and 50V (selected by a simple external divider). Realized in BCD mixed technology, the device uses an internal power D-MOS transistor (with a typical Rdson of 0.25) to obtain very high The device is available in plastic dual in line, DIP8 for standard assembly, and SO16W for SMD assembly. Figure 2. Typical Application Circuit Vi=8V to 55V 5 8 R1 20K L4978 3 C1 220F 63V C7 220nF C2 2.7nF C5 100nF 2 4 1 7 R2 9.1K C4 22nF L1 126H (77120) 6 C6 100nF D1 ST PS3L60U VO=3.3V/2A C8 330F D98IN837A May 2005 Rev. 9 1/13 L4978 Table 2. Block Diagram VCC 5 THERMAL SHUTDOWN VOLTAGES MONITOR CBOOT CHARGE 2 SS_INH INHIBIT SOFTSTART 3.3V INTERNAL REFERENCE INTERNAL SUPPLY 5.1V 7 COMP 6 E/A 8 FB PWM R 3.3V Q S CBOOT CHARGE AT LIGHT LOADS DRIVE OSCILLATOR 1 3 OSC BOOT 4 GND D97IN594 OUT Figure 3. Pins Connection (Top view) N.C. 1 16 N.C. GND 2 15 N.C. SS_INH 3 14 FB GND 1 8 FB SS_INH 2 7 COMP OSC 4 13 COMP OSC 3 6 BOOT OUT 5 12 BOOT OUT 4 5 VCC OUT 6 11 VCC N.C. 7 10 N.C. N.C. 8 9 N.C. D97IN595 D97IN596 DIP-8 SO16W Table 3. Pin Description N Pin Name 1 2 GND 2 3 SS_INH A logic signal (active low) disables the device (sleep mode operation). A capacitor connected between this pin and ground determines the soft start time. When this pin is grounded disables the device (driven by open collector/drain). 3 4 OSC An external resistor connected between the unregulated input voltage and this pin and a capacitor connected from this pin to ground fix the switching frequency. (Line feed forward is automatically obtained) 2/13 Function Ground L4978 Table 3. Pin Description (continued) N Pin Name Function 4 5, 6 OUT Stepdown regulator output 5 11 VCC Unregulated DC input voltage 6 12 BOOT A capacitor connected between this pin and OUT allows to drive the internal DMOS Transistors 7 13 COMP E/A output to be used for frequency compensation 8 14 FB Stepdown feedback input. Connecting directly to this pin results in an output voltage of 3.3V. An external resistive divider is required for higher output voltages. (*) Pins 1, 7, 8, 9, 10, 15 and 16 are not internally, electrically connected to the die. Table 4. Thermal Data Symbol Rth(j-amb) Parameter Thermal Resistance Junction to ambient Minidip SO16 Unit 90 (*) 110 (*) C/W Max. (*) Package mounted on board. Table 5. Absolute Maximum Ratings Symbol Parameter Minidip S016 V5 V11 V4 V5,V6 I4 I5,I6 V6-V5 V12-V11 V6 V12 V7 Value Unit Input voltage 58 V Output DC voltage Output peak voltage at t = 0.1ms f=200KHz -1 -5 V V Maximum output current int. limit. 14 V Bootstrap voltage 70 V V13 Analogs input voltage (VCC= 24V) 12 V V2 V3 Analogs input voltage (VCC= 24V) 13 V V8 V14 (VCC= 20V) 6 -0.3 V V 1 0.8 W W -40 to 150 C Ptot Power dissipation a Tamb 60C Tj,Tstg Junction and storage temperature DIP-8 SO16 3/13 L4978 Table 6. Electrical Characteristcs (Tj = 25C, Cosc = 2.7nF, Rosc = 20k, VCC = 24V, unless otherwise specified). " " Specification Referred to Tj from 0 to 125C Symbol Parameter Test Condition Min. Typ. Max. Unit 55 V DYNAMIC CHARACTERISTIC VI Operating input voltage range Vo = 3.3 to 50V; Io = 2A Vo Output voltage Io = 0.5A Io = 0.2 to 2A Vcc = 8 to 55V Vd Dropout voltage Vcc = 10V; Io = 2A Maximum limiting current Vcc = 8 to 55V Efficiency Vo = 3.3V; Io= 2A 8 3.33 3.36 3.39 V 3.292 3.36 3.427 V 3.22 3.36 3.5 V 0.58 0.733 V Il fs SVRR 3 1.173 V 3.5 A 87 Switching frequency 2.5 90 100 % 110 60 KHz dB Supply voltage ripple rejection Vi = Vcc+2VRMS; Vo= Vref; Io = 2.5A; f ripple= 100Hz Switching Frequency Stability vs. Vcc Vcc = 8 to 55V 3 Temp. stability of switching frequency Tj = 0 to 125C 4 6 % % SOFT START Soft start charge current 30 40 50 A Soft start discharge current 6 10 14 A INHIBIT VLL Low level voltage IsLL Isource Low level 0.9 V 5 15 A 4 6 mA DC CHARACTERISTICS Iqop Iq Iqst-by Total operating quiescent current Quiescent current Duty Cycle = 0; VFB= 3.8V 2.5 3.5 mA Total stand-by quiescent current Vinh < 0.9V 100 200 A Vcc = 55V; Vinh<0.9V 150 300 A 3.36 3.39 V 5 10 mV ERROR AMPLIFIER VFB Voltage Feedback Input RL Line regulation 3.33 Vcc = 8 to 55V Ref. voltage stability vs temperature 0.4 VoH High level output voltage VFB = 2.5V VoL Low level output voltage VFB = 3.8V Source output current Vcomp= 6V; VFB= 2.5V 180 220 Io sink Sink output current Vcomp = 6V; VFB= 3.8V 200 300 Ib Source bias current Io source SVRR E/A gm 4/13 mV/C 10.3 V 0.65 2 V A A 3 A Supply voltage ripple rejection Vcomp = VFB; Vcc = 8 to 55V 60 80 dB DC open loop gain RL = 50 57 dB Transconductance Icomp = -0.1 to 0.1mA Vcomp = 6V 2.5 mS L4978 Table 6. Electrical Characteristcs (Tj = 25C, Cosc = 2.7nF, Rosc = 20k, VCC = 24V, unless otherwise specified). " " Specification Referred to Tj from 0 to 125C Symbol Parameter Test Condition Min. Typ. Max. Unit 0.78 0.85 0.92 V Vcc = 8V 2 2.15 2.3 V Vcc = 55V 9 9.6 10.2 V 95 97 300 kHz OSCILLATOR SECTION Ramp Valley Ramp peak Maximum duty cycle Maximum Frequency Duty Cycle = 0% Rosc = 13k, Cosc = 820pF % Figure 4. Test and evaluation board circuit. Vi=8V to 55V 5 8 R1 20K L4978 3 C1 220F 63V C7 220nF C2 2.7nF 1 7 2 C5 100nF VO=3.3V/2A 4 R2 9.1K L1 126H (77120) 6 C6 100nF D1 STPS3L60U R3 C8 330F C4 22nF R4 D98IN834B C1=220F/63V EKE C2=2.7nF C5=100nF C6=100nF C7=220nF/63V C8=330F/35V CG Sanyo L1=126H KoolMu 77120 - 55 Turns - 0.5mm R1=20K R2=9.1K D1=STPS3L60U L4978 VO(V) R3(K) 3.3 0 R4(K) 5.1 2.7 4.7 12 12 4.7 15 16 4.7 18 20 4.7 24 30 4.7 Figure 5. PCB and component layout of the figure 4. 5/13 L4978 Figure 6. Quiescent drain current vs. input voltage. Iq (mA) D97IN724 200KHz R1=22K C2=1.2nF 5 Figure 9. Line Regulation . VO (V) D97IN733 3.377 Tj=125C 3.376 100KHz R1=20K C2=2.7nF 4 3.375 Tj=25C 3.374 3 0Hz 3.373 3.372 2 3.371 Tamb=25C 0% DC 3.370 1 0 5 10 15 20 25 30 35 40 45 50 Figure 7. Quiescent current vs. junction temperature D97IN731 Iq (mA) 200KHz R1=22K C2=1.2nF 5 4 0 Vcc(V) 5 10 15 20 25 30 35 40 45 50 VCC(V) Figure 10. Load regulation . VO (V) 3.378 D98IN835 VCC=35V 3.376 3.374 3.372 100KHz R1=20K C2=2.7nF Tj=25C 3.370 3 Tj=125C 3.368 0Hz 3.366 VCC=35V 0% DC 2 3.364 3.362 1 3.360 -50 -30 -10 10 30 50 70 90 110 Tj(C) Figure 8. Stand by drain current vs. input voltage. Ibias (A) D97IN732 Vss=GND 150 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 IO(A) Figure 11. Switching frquency vs. R1 and C2 . fsw (KHz) D97IN784 500 Tamb=25C Tj=25C 140 0.8 130 200 120 100 2nF 1.2 nF 2.2 nF 110 Tj=125C 100 90 50 3.3n F 4.7n F 20 5.6n 80 F 10 70 60 6/13 0 5 10 15 20 25 30 35 40 45 50 VCC(V) 5 0 20 40 60 80 R1(K) L4978 Figure 12. Switching Frequency vs. input voltage.. fsw (KHz) D97IN735 Figure 15. Efficiency vs output voltage. . [%] 98 fsw=100kHz 96 107.5 94 105.0 fsw=200kHz 92 102.5 Tj=25C 90 100.0 88 97.5 86 95.0 84 92.5 82 80 90.0 0 5 10 15 20 25 30 35 40 45 50 VCC(V) Figure 13. Switching frequency vs. junction temperature. fsw (KHz) D97IN785 Vcc=35V Io=2A 0 5 10 15 Vo [V] 20 25 30 Figure 16. Efficiency vs. output current. . [%] 95 Vcc=8V Vcc=12V 90 105 85 Vcc=24V 80 100 75 Vcc=48V 70 95 fsw=100kHz Vo=5.1V 65 60 90 -50 0 50 100 Figure 14. Dropout voltage between pin 5 and 4. V (V) 0.7 0 Tj(C) D98IN836 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 Io [A] 2 2.2 Figure 17. Efficiency vs. output current. . [%] 95 Vcc=8V 90 Tj=125C 0.6 85 Vcc=12V C 0.5 5 =2 Tj 80 0.4 75 0.3 Vcc=24V Tj=-25C 70 0.2 65 0.1 Vcc=48V Vo=3.36V fsw=100kHz 60 0.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 IO(A) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 Io [A] 2 2.2 7/13 L4978 Figure 18. Efficiency vs. output current. . Figure 21. Power dissipation vs. Vcc. . Pdiss [mW] D97IN740 (%) 1000 VCC=8V 90 Vo=5.1V fsw=100kHz VCC=12V 800 Io=2A VCC=24V 85 600 80 Io=1A VCC=48V Io=1.5A 75 400 70 fsw=200KHz VO=5.1V Io=0.5A 200 65 0 60 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A) Figure 19. Efficiency vs. output current. . (%) 40 50 60 Pdiss [mW] Vcc=35V fsw=100kHz 1200 VCC=12V 80 30 Vcc [V] 1400 VCC=8V 85 20 Figure 22. Device Power dissipation vs. Vo . D97IN741 90 10 Io=2A 1000 Io=1.5A VCC=24V 800 75 600 70 VCC=48V Io=1A 400 65 fsw=200KHz VO=3.36V Io=0.5A 200 60 0 55 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A) 0 10 20 Vo [V] 30 Figure 23. Pulse by pulse limiting current vs. junction temperature.. Figure 20. Efficiency vs. Vcc. . n [%] Ilim (A) 90 Vo=5.1V fsw=100kHz D97IN747 fsw=100KHz VCC=35V 2.9 85 2.8 Vo=5.1V fsw=200kHz Vo=3.36V fsw=100kHz 2.7 80 2.6 Vo=3.36V fsw=200kHz 2.5 75 Io=2A 2.4 70 0 8/13 10 20 30 Vcc [V] 40 50 60 2.3 -50 -25 0 25 50 75 100 125 Tj(C) L4978 Figure 27. Soft start capacitor selection Vs inductor and Vccmax. Figure 24. Load transient. . L (H) D97IN746 56nF fsw=200KHz 300 47nF 200 33nF 22nF 100 0 15 20 25 30 35 40 45 50 VCCmax(V) Figure 25. Line transient. . Figure 28. Open loop frequency and phase of error amplifier . VCC (V) GAIN (dB) D97IN786 30 D97IN787 Phase 50 GAIN 20 0 0 -50 45 10 VO (mV) 1 IO = 1A fsw = 100KHz 100 2 90 -100 0 Phase 135 -150 -100 1ms/DIV -200 10 102 103 104 105 106 107 108 f(Hz) Figure 26. Soft start capacitor selection Vs inductor and Vccmax. D97IN745 L (H) 680nF 470nF fsw=100KHz 400 330nF 300 200 100 220nF 100nF 0 15 20 25 30 35 40 45 50 VCCmax(V) 9/13 L4978 3 Package Informations Figure 29. DIP-8 Mechanical Data & Package Dimensions mm inch DIM. MIN. A TYP. MIN. 3.32 TYP. MAX. 0.51 B 1.15 1.65 0.045 0.065 b 0.356 0.55 0.014 0.022 b1 0.204 0.304 0.008 0.012 E 0.020 10.92 7.95 9.75 0.430 0.313 0.384 e 2.54 0.100 e3 7.62 0.300 e4 7.62 0.300 F 6.6 0.260 I 5.08 0.200 L Z 3.18 OUTLINE AND MECHANICAL DATA 0.131 a1 D 10/13 MAX. 3.81 1.52 0.125 0.150 0.060 DIP-8 L4978 Figure 30. SO16 Wide Mechanical Data & Package Dimensions mm inch DIM. MIN. TYP. MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.10 0.30 0.004 0.012 B 0.33 0.51 0.013 0.200 C 0.23 0.32 0.009 0.013 D (1) 10.10 10.50 0.398 0.413 E 7.40 7.60 0.291 0.299 e 1.27 0.050 H 10.0 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 L 0.40 1.27 0.016 0.050 k ddd OUTLINE AND MECHANICAL DATA 0 (min.), 8 (max.) 0.10 0.004 (1) "D" dimension does not include mold flash, protusions or gate burrs. Mold flash, protusions or gate burrs shall not exceed 0.15mm per side. SO16 (Wide) 0016021 C 11/13 L4978 Table 7. Revision History Date Revision October 2001 8 First Issue May 2005 9 Modified D1 on the Fig. 4. 12/13 Description of Changes L4978 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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