PIN CONFIGURATIONS -IN A 2 +IN A 3 TOP VIEW V- 4 (Not to Scale) OUT A 5 NC +IN A 3 OP262 TOP VIEW V- 4 (Not to Scale) 8 V+ 7 OUT B 6 -IN B 5 +IN B 00288-003 OUT A 1 Portable instrumentation Sampling ADC amplifier Wireless LANs Direct access arrangement Office automation These products operate from single supplies as low as 2.7 V to dual supplies of 6 V. The fast settling times and wide output swings recommend them for buffers to sampling A/D converters. The output drive of 30 mA (sink and source) is needed for many audio and display applications; more output current can be supplied for limited durations. The OPx62 family is specified over the extended industrial temperature range (-40C to +125C). The single OP162 amplifiers are available in 8-lead SOIC package. The dual OP262 amplifiers are available in 8-lead SOIC and TSSOP packages. The quad OP462 amplifiers are available in 14-lead, narrow-body SOIC and TSSOP packages. V+ 6 Figure 1. 8-Lead Narrow-Body SOIC (S Suffix) -IN A 2 The OP162 (single), OP262 (dual), and OP462 (quad) rail-torail 15 MHz amplifiers feature the extra speed new designs require, with the benefits of precision and low power operation. With their incredibly low offset voltage of 45 V (typical) and low noise, they are perfectly suited for precision filter applications and instrumentation. The low supply current of 500 A (typical) is critical for portable or densely packed designs. In addition, the rail-to-rail output swing provides greater dynamic range and control than standard video amplifiers. 7 NC = NO CONNECT APPLICATIONS GENERAL DESCRIPTION NULL 8 OP162 00288-001 NULL 1 Figure 2. 8-Lead Narrow-Body SOIC (S Suffix) OUT A 1 8 V+ -IN A 2 OP262 7 OUT B +IN A 3 TOP VIEW (Not to Scale) 6 -IN B V- 4 5 +IN B 00288-004 Wide bandwidth: 15 MHz Low offset voltage: 325 V max Low noise: 9.5 nV/Hz @ 1 kHz Single-supply operation: 2.7 V to 12 V Rail-to-rail output swing Low TCVOS: 1 V/C typ High slew rate: 13 V/s No phase inversion Unity-gain stable Figure 3. 8-Lead TSSOP (RU Suffix) OUT A 1 14 -IN A 2 13 -IN D 12 +IN D +IN A 3 V+ 4 +IN B 5 OP462 OUT D TOP VIEW 11 V- (Not to Scale) 10 +IN C -IN B 6 9 -IN C OUT B 7 8 OUT C 00288-005 FEATURES Figure 4. 14-Lead Narrow-Body SOIC (S Suffix) OUT A 1 -IN A 2 14 OUT D 13 -IN D +IN A 3 OP462 12 +IN D V+ 4 TOP VIEW (Not to Scale) 11 V- +IN B 5 10 +IN C -IN B 6 9 -IN C OUT B 7 8 OUT C 00288-006 Data Sheet 15 MHz Rail-to-Rail Operational Amplifiers OP162/OP262/OP462 Figure 5. 14-Lead TSSOP (RU Suffix) Rev. G Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2012 Analog Devices, Inc. All rights reserved. OP162/OP262/OP462 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Input Overvoltage Protection ................................................... 13 Applications ....................................................................................... 1 Output Phase Reversal ............................................................... 13 General Description ......................................................................... 1 Power Dissipation....................................................................... 13 Pin Configurations ........................................................................... 1 Unused Amplifiers ..................................................................... 14 Revision History ............................................................................... 2 Power-On Settling Time ............................................................ 14 Specifications..................................................................................... 3 Capacitive Load Drive ............................................................... 14 Absolute Maximum Ratings ............................................................ 6 Total Harmonic Distortion and Crosstalk .............................. 15 ESD Caution .................................................................................. 6 PCB Layout Considerations ...................................................... 15 Typical Performance Characteristics ............................................. 7 Applications Circuits...................................................................... 16 Applications ..................................................................................... 12 Single-Supply Stereo Headphone Driver................................. 16 Functional Description .............................................................. 12 Instrumentation Amplifier........................................................ 16 Offset Adjustment ...................................................................... 12 Direct Access Arrangement ...................................................... 17 Rail-to-Rail Output .................................................................... 12 Outline Dimensions ....................................................................... 18 Output Short-Circuit Protection .............................................. 12 Ordering Guide .......................................................................... 20 REVISION HISTORY 5/12--Rev. F to Rev. G Deleted MSOP Throughout ............................................................ 1 Deleted Figure 2; Renumbered Sequentially................................. 1 Deleted Spice-Macro Model Section ............................................ 18 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 20 1/05--Rev. E to Rev. F Changes to Absolute Maximum Ratings Table 4 and Table 5 .... 6 Change to Figure 36 ....................................................................... 13 Changes to Ordering Guide .......................................................... 20 12/04--Rev. D to Rev. E Updated Format .................................................................. Universal Changes to General Description .................................................... 1 Changes to Specifications ................................................................ 3 Changes to Package Type................................................................. 6 Change to Figure 16 ......................................................................... 8 Change to Figure 22 ......................................................................... 9 Change to Figure 36 ....................................................................... 13 Change to Figure 37 ....................................................................... 14 Changes to Ordering Guide .......................................................... 20 10/02--Rev. C to Rev. D Deleted 8-Lead Plastic DIP (N-8) .................................... Universal Deleted 14-Lead Plastic DIP (N-14) ................................ Universal Edits to ORDERING GUIDE........................................................ 19 Edits to Figure 30 ............................................................................ 19 Edits to Figure 31 ............................................................................ 19 Updated Outline Dimensions ....................................................... 19 Rev. G | Page 2 of 20 Data Sheet OP162/OP262/OP462 SPECIFICATIONS @ VS = 5.0 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 1. Electrical Characteristics Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Symbol Conditions VOS OP162G, OP262G, OP462G -40C TA +125C H grade, -40C TA +125C D grade -40C TA +125C Min Typ Max Unit 45 325 800 1 3 5 600 650 25 40 4 1 250 V V mV mV mV nA nA nA nA V dB V/mV V/mV V/mV V V/C pA/C 4.99 4.94 14 65 80 30 V V mV mV mA mA 0.8 IB 360 -40C TA +125C Input Offset Current IOS 2.5 -40C TA +125C Input Voltage Range Common-Mode Rejection Large Signal Voltage Gain Long-Term Offset Voltage 1 Offset Voltage Drift 2 Bias Current Drift OUTPUT CHARACTERISTICS Output Voltage Swing High VCM CMRR AVO VOS VOS/T IB/T VOH Output Voltage Swing Low VOL Short-Circuit Current Maximum Output Current POWER SUPPLY Power Supply Rejection Ratio ISC IOUT Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density 1 2 PSRR ISY 0 V VCM 4.0 V, -40C TA +125C RL = 2 k, 0.5 VOUT 4.5 V RL = 10 k, 0.5 VOUT 4.5 V RL = 10 k, -40C TA +125C G grade IL = 250 A, -40C TA +125C IL = 5 mA IL = 250 A, -40C TA +125C IL = 5 mA Short to ground VS = 2.7 V to 7 V -40C TA +125C OP162, VOUT = 2.5 V -40C TA +125C OP262, OP462, VOUT = 2.5 V -40C TA +125C 0 70 65 40 110 30 88 600 4.95 4.85 50 150 120 90 600 500 750 1 700 850 dB dB A mA A A SR tS GBP m 1 V < VOUT < 4 V, RL = 10 k To 0.1%, AV = -1, VO = 2 V step 10 540 15 61 V/s ns MHz Degrees en p-p en in 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz 0.5 9.5 0.4 V p-p nV/Hz pA/Hz Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125C, with an LTPD of 1.3. Offset voltage drift is the average of the -40C to +25C delta and the +25C to +125C delta. Rev. G | Page 3 of 20 OP162/OP262/OP462 Data Sheet @ VS = 3.0 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 2. Electrical Characteristics Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Large Signal Voltage Gain Symbol Conditions VOS OP162G, OP262G, OP462G G, H grades, -40C TA +125C D grade -40C TA +125C IB IOS VCM CMRR AVO Long-Term Offset Voltage 1 OUTPUT CHARACTERISTICS Output Voltage Swing High VOH Output Voltage Swing Low VOL POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density 1 VOS PSRR ISY Min Typ Max Unit 50 325 1 3 5 600 25 2 600 V mV mV mV nA nA V dB V/mV V/mV V 50 150 V V mV mV 700 1 650 850 dB A mA A A 0.8 360 2.5 0 V VCM 2.0 V, -40C TA +125C RL = 2 k, 0.5 V VOUT 2.5 V RL = 10 k, 0.5 V VOUT 2.5 V G grade IL = 250 A IL= 5 mA IL = 250 A IL= 5 mA VS = 2.7 V to 7 V, -40C TA +125C OP162, VOUT = 1.5 V -40C TA +125C OP262, OP462, VOUT = 1.5 V -40C TA +125C 0 70 20 2.95 2.85 60 110 20 30 2.99 2.93 14 66 110 600 500 SR tS GBP m RL = 10 k To 0.1%, AV = -1, VO = 2 V step 10 575 15 59 V/s ns MHz Degrees en p-p en in 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz 0.5 9.5 0.4 V p-p nV/Hz pA/Hz Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125C, with an LTPD of 1.3. Rev. G | Page 4 of 20 Data Sheet OP162/OP262/OP462 @ VS = 5.0 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 3. Electrical Characteristics Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Symbol Conditions VOS OP162G, OP262G, OP462G -40C TA +125C H grade, -40C TA +125C D grade -40C TA +125C Min Typ Max Unit 25 325 800 1 3 5 V V mV mV mV 260 500 650 nA nA 2.5 25 40 +4 nA nA V dB V/mV V/mV V/mV 600 1 250 V V/C pA/C 4.99 4.94 -4.99 -4.94 80 30 V V V V mA mA 0.8 IB -40C TA +125C Input Offset Current IOS -40C TA +125C Input Voltage Range Common-Mode Rejection Large Signal Voltage Gain Long-Term Offset Voltage 1 Offset Voltage Drift 2 Bias Current Drift OUTPUT CHARACTERISTICS Output Voltage Swing High VCM CMRR AVO VOS VOS/T IB/T VOH Output Voltage Swing Low VOL Short-Circuit Current Maximum Output Current ISC IOUT POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier Supply Voltage Range PSRR ISY -4.9 V VCM +4.0 V, -40C TA +125C RL = 2 k, -4.5 V VOUT +4.5 V RL = 10 k, -4.5 V VOUT +4.5 V -40C TA +125C G grade IL = 250 A, -40C TA +125C IL= 5 mA IL = 250 A, -40C TA +125C IL= 5 mA Short to ground VS = 1.35 V to 6 V, -40C TA +125C OP162, VOUT = 0 V -40C TA +125C OP262, OP462, VOUT = 0 V -40C TA +125C VS -5 70 75 25 4.95 4.85 60 110 35 120 110 650 550 3.0 (1.5) -4.95 -4.85 800 1.15 775 1 dB A mA A mA 12 (6) V DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product Phase Margin SR tS GBP m -4 V < VOUT < 4 V, RL = 10 k To 0.1%, AV = -1, VO = 2 V step 13 475 15 64 V/s ns MHz Degrees NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density en p-p en in 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz 0.5 9.5 0.4 V p-p nV/Hz pA/Hz 1 2 Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at +125C, with an LTPD of 1.3. Offset voltage drift is the average of the -40C to +25C delta and the +25C to +125C delta. Rev. G | Page 5 of 20 OP162/OP262/OP462 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Supply Voltage Input Voltage1 Differential Input Voltage2 Internal Power Dissipation SOIC (S) TSSOP (RU) Output Short-Circuit Duration Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature Range (Soldering, 10 sec) Min 6 V 6 V 0.6 V Observe Derating Curves Observe Derating Curves Observe Derating Curves -65C to +150C -40C to +125C -65C to +150C 300C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 5. Package Type 8-Lead SOIC (S) 8-Lead TSSOP (RU) 14-Lead SOIC (S) 14-Lead TSSOP (RU) 1 1 For supply voltages greater than 6 V, the input voltage is limited to less than or equal to the supply voltage. 2 For differential input voltages greater than 0.6 V, the input current should be limited to less than 5 mA to prevent degradation or destruction of the input devices. JA1 157 208 105 148 JC 56 Unit C/W C/W C/W C/W JA is specified for the worst-case conditions, that is, JA is specified for a device soldered in circuit board for SOIC, and TSSOP packages. ESD CAUTION Rev. G | Page 6 of 20 Data Sheet OP162/OP262/OP462 TYPICAL PERFORMANCE CHARACTERISTICS 250 125 150 100 0 -200 00288-007 50 -140 -80 -20 40 100 INPUT OFFSET VOLTAGE (V) 100 75 50 25 0 -75 160 Figure 6. OP462 Input Offset Voltage Distribution -50 -25 0 25 50 75 TEMPERATURE (C) 100 150 0 VS = 5V VS = 5V TA = 25C COUNT = 360 OP AMPS -100 INPUT BIAS CURRENT (nA) 80 60 40 20 -200 -300 0.3 0.5 0.7 0.9 1.1 1.3 INPUT OFFSET DRIFT, TCVOS (V,C) -500 -50 1.5 Figure 7. OP462 Input Offset Voltage Drift (TCVOS) 00288-011 00288-008 -400 0 0.2 -25 0 25 50 75 TEMPERATURE (C) 100 125 150 Figure 10. OP462 Input Bias Current vs. Temperature 420 15 VS = 5V INPUT OFFSET CURRENT (nA) VS = 5V 340 260 180 10 5 100 0 0.5 1.0 1.5 2.0 2.5 3.0 COMMON-MODE VOLTAGE (V) 3.5 0 -75 4.0 Figure 8. OP462 Input Bias Current vs. Common-Mode Voltage 00288-012 00288-009 INPUT CURRENT (nA) 125 Figure 9. OP462 Input Offset Voltage vs. Temperature 100 QUANTITY (Amplifiers) 00288-010 INPUT OFFSET VOLTAGE (V) 200 QUANTITY (Amplifiers) VS = 5V VS = 5V TA = 25C COUNT = 720 OP AMPS -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 Figure 11. OP462 Input Offset Current vs. Temperature Rev. G | Page 7 of 20 150 OP162/OP262/OP462 Data Sheet 100 5.12 IOUT = 250A 5.00 4.94 IOUT = 5mA 4.82 -75 00288-013 4.88 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 60 VS = 10V VS = 3V 40 20 0 0 150 1 2 3 4 5 LOAD CURRENT (mA) 6 7 Figure 15. Output Low Voltage to Supply Rail vs. Load Current Figure 12. OP462 Output High Voltage vs. Temperature 1.0 0.100 0.9 VS = 5V 0.8 SUPPLY CURRENT (mA) 0.080 IOUT = 5mA 0.060 0.040 VS = 10V 0.7 VS = 5V 0.6 VS = 3V 0.5 0.4 0.3 IOUT = 250A 0.000 -75 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 00288-017 0.2 0.020 0.1 00288-014 OUTPUT LOW VOLTAGE (mV) 80 00288-016 5.06 OUTPUT LOW VOLTAGE (mV) OUTPUT HIGH VOLTAGE (V) VS = 5V 0 -75 150 -50 -25 0 25 75 TEMPERATURE (C) 100 125 150 Figure 16. Supply Current/Amplifier vs. Temperature Figure 13. OP462 Output Low Voltage vs. Temperature 100 0.7 RL = 10k TA = 25C SUPPLY CURRENT (mA) VS = 5V 60 40 RL = 2k 20 0.6 0.5 RL = 600k 0 -75 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 00288-018 0.4 00288-015 OPEN-LOOP GAIN (V/mV) 80 0 150 2 4 6 8 SUPPLY VOLTAGE (V) 10 12 Figure 17. OP462 Supply Current/Amplifier vs. Supply Voltage Figure 14. OP462 Open-Loop Gain vs. Temperature Rev. G | Page 8 of 20 Data Sheet OP162/OP262/OP462 50 4 40 VS = 5V TA = 25C GAIN 3 0.1% 30 45 STEP SIZE (V) 90 PHASE PHASE SHIFT (dB) GAIN (dB) 20 0.01% VS = 5V TA = 25C 2 1 10 135 0 180 -10 225 -2 -20 270 -3 0 -1 1M 10M FREQUENCY (Hz) -4 100M 0 Figure 18. Open-Loop Gain and Phase vs. Frequency (No Load) 400 600 SETTLING TIME (nS) 800 1000 60 VS = 5V TA = 25C RL = 830 CL = 5pF VS = 5V TA = 25C TA = 50mV RL = 10k 50 OVERSHOOT (%) 40 20 0 -20 40 +OS 30 -OS 20 100k 1M FREQUENCY (Hz) 10M 0 10 100M Figure 19. Closed-Loop Gain vs. Frequency 00288-023 -30 10k 00288-020 10 100 CAPACITANCE (pF) 1000 Figure 22. Small-Signal Overshoot vs. Capacitance 5 70 VS = 5V TA = 25C 60 NOISE DENSITY (nV/Hz) 4 3 2 1 0 10k 100k 1M FREQUENCY (Hz) 40 30 20 10 00288-021 VS = 5V AVCL = 1 RL = 10k CL = 15pF TA = 25C DISTORTION<1% 50 00288-024 CLOSED-LOOP GAIN (dB) 200 Figure 21. Step Size vs. Settling Time 60 MAXIMUM OUTPUT SWING (V p-p) 0.01% 00288-022 -30 100k 00288-019 0.1% 0 10M 1 Figure 20. Maximum Output Swing vs. Frequency 10 100 FREQUENCY (Hz) Figure 23. Voltage Noise Density vs. Frequency Rev. G | Page 9 of 20 1k OP162/OP262/OP462 Data Sheet 7 90 VS = 5V TA = 25C VS = 5V TA = 25C 80 70 4 3 60 +PSRR 2 40 1 30 0 1 10 100 FREQUENCY (Hz) 20 1k 1k -PSRR 50 00288-028 PSRR (dB) 5 00288-025 NOISE DENSITY (pA/Hz) 6 10k Figure 24. Current Noise Density vs. Frequency 100k FREQUENCY (Hz) 1M 10M Figure 27. PSRR vs. Frequency 300 2s 100 90 200 150 AVCL = 10 100 10 AVCL = 1 0% VS = 5V AV = 100k en = 0.5V p-p 00288-026 50 0 100k 1M FREQUENCY (Hz) 00288-029 OUTPUT IMPEDANCE () 20mV VS = 5V TA = 25C 250 10M Figure 28. 0.1 Hz to 10 Hz Noise Figure 25. Output Impedance vs. Frequency 90 2V VS = 5V TA = 25C 80 100 VIN = 12V p-p VS = 5V AV = 1 90 60 50 10 40 30 20 1k 2V 10k 100k FREQUENCY (Hz) 1M 20s 00288-030 0% 00288-027 CMRR (dB) 70 10M Figure 29. No Phase Reversal (VIN = 12 V p-p, VS = 5 V, AV = 1) Figure 26. CMRR vs. Frequency Rev. G | Page 10 of 20 Data Sheet OP162/OP262/OP462 100 90 10 0% 20mV 200ns 00288-031 10 0% 500mV Figure 30. Small Signal Transient Response 100s Figure 31. Large Signal Transient Response Rev. G | Page 11 of 20 00288-032 VS = 5V AV = 1 T A = 25C 100 CL = 100pF 90 VS = 5V AV = 1 TA = 25C CL = 100pF OP162/OP262/OP462 Data Sheet APPLICATIONS FUNCTIONAL DESCRIPTION OFFSET ADJUSTMENT The OPx62 family is fabricated using Analog Devices' high speed complementary bipolar process, also called XFCB. This process trench isolates each transistor to lower parasitic capacitances for high speed performance. This high speed process has been implemented without sacrificing the excellent transistor matching and overall dc performance characteristic of Analog Devices' complementary bipolar process. This makes the OPx62 family an excellent choice as an extremely fast and accurate low voltage op amp. Because the OP162/OP262/OP462 have an exceptionally low typical offset voltage, adjustment to correct offset voltage may not be needed. However, the OP162 has pinouts to attach a nulling resistor. Figure 33 shows how the OP162 offset voltage can be adjusted by connecting a potentiometer between Pin 1 and Pin 8, and connecting the wiper to VCC. It is important to avoid accidentally connecting the wiper to VEE, as this can damage the device. The recommended value for the potentiometer is 20 k. Figure 32 shows a simplified equivalent schematic for the OP162. A PNP differential pair is used at the input of the device. The cross connecting of the emitters lowers the transconductance of the input stage improving the slew rate of the device. Lowering the transconductance through cross connecting the emitters has another advantage in that it provides a lower noise factor than if emitter degeneration resistors were used. The input stage can function with the base voltages taken all the way to the negative power supply, or up to within 1 V of the positive power supply. +5V VCC 20k 1 8 3 7 OP162 6 VOS 4 -5V 00288-034 2 Figure 33. Offset Adjustment Schematic RAIL-TO-RAIL OUTPUT +IN VOUT -IN The OP162/OP262/OP462 have a wide output voltage range that extends to within 60 mV of each supply rail with a load current of 5 mA. Decreasing the load current extends the output voltage range even closer to the supply rails. The common-mode input range extends from ground to within 1 V of the positive supply. It is recommended that there be some minimal amount of gain when a rail-to-rail output swing is desired. The minimum gain required is based on the supply voltage and can be found as 00288-033 AV,min = VEE Figure 32. Simplified Schematic Two complementary transistors in a common-emitter configuration are used for the output stage. This allows the output of the device to swing to within 50 mV of either supply rail at load currents less than 1 mA. As load current increases, the maximum voltage swing of the output decreases. This is due to the collector-to-emitter saturation voltages of the output transistors increasing. The gain of the output stage, and consequently the open-loop gain of the amplifier, is dependent on the load resistance connected at the output. Because the dominant pole frequency is inversely proportional to the open-loop gain, the unity-gain bandwidth of the device is not affected by the load resistance. This is typically the case in rail-to-rail output devices. VS VS - 1 where VS is the positive supply voltage. With a single-supply voltage of 5 V, the minimum gain to achieve rail-to-rail output should be 1.25. OUTPUT SHORT-CIRCUIT PROTECTION To achieve a wide bandwidth and high slew rate, the output of the OP162/OP262/OP462 are not short-circuit protected. Shorting the output directly to ground or to a supply rail may destroy the device. The typical maximum safe output current is 30 mA. Steps should be taken to ensure the output of the device will not be forced to source or sink more than 30 mA. In applications where some output current protection is needed, but not at the expense of reduced output voltage headroom, a low value resistor in series with the output can be used. This is shown in Figure 34. The resistor is connected within the feedback loop of the amplifier so that if VOUT is shorted to ground Rev. G | Page 12 of 20 Data Sheet OP162/OP262/OP462 and VIN swings up to 5 V, the output current will not exceed 30 mA. For single 5 V supply applications, resistors less than 169 are not recommended. VOUT The power dissipated by the device can be calculated as Figure 34. Output Short-Circuit Protection PDISS = ILOAD x (VS - VOUT) The input voltage should be limited to 6 V, or damage to the device can occur. Electrostatic protection diodes placed in the input stage of the device help protect the amplifier from static discharge. Diodes are connected between each input as well as from each input to both supply pins as shown in the simplified equivalent circuit in Figure 32. If an input voltage exceeds either supply voltage by more than 0.6 V, or if the differential input voltage is greater than 0.6 V, these diodes energize causing overvoltage damage. The input current should be limited to less than 5 mA to prevent degradation or destruction of the device by placing an external resistor in series with the input at risk of being overdriven. The size of the resistor can be calculated by dividing the maximum input voltage by 5 mA. For example, if the differential input voltage could reach 5 V, the external resistor should be 5 V/5 mA = 1 k. In practice, this resistor should be placed in series with both inputs to balance any offset voltages created by the input bias current. OUTPUT PHASE REVERSAL The OP162/OP262/OP462 are immune to phase reversal as long as the input voltage is limited to 6 V. Figure 29 shows the output of a device with the input voltage driven beyond the supply voltages. Although the device's output does not change phase, large currents due to input overvoltage could result, damaging the device. In applications where the possibility of an input voltage exceeding the supply voltage exists, overvoltage protection should be used, as described in the previous section. where: ILOAD is the OPx62 output load current. VS is the OPx62 supply voltage. VOUT is the OPx62 output voltage. Figure 35 and Figure 36 provide a convenient way to determine if the device is being overheated. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature around the package. By using the previous equation, it is a simple matter to see if PDISS exceeds the device's power derating curve. To ensure proper operation, it is important to observe the recommended derating curves shown in Figure 35 and Figure 36. 0.9 POWER DISSIPATION The maximum power that can be safely dissipated by the OP162/OP262/OP462 is limited by the associated rise in junction temperature. The maximum safe junction temperature is 150C; device performance suffers when this limit is exceeded. If this maximum is only momentarily exceeded, proper circuit operation will be restored as soon as the die temperature is reduced. Leaving the device in an "overheated" condition for an extended period can result in permanent damage to the device. Rev. G | Page 13 of 20 0.8 0.7 8-LEAD SOIC 0.6 0.5 8-LEAD MSOP 0.4 8-LEAD TSSOP 0.3 0.2 00288-036 INPUT OVERVOLTAGE PROTECTION MAXIMUM POWER DISSIPATION (Watts) 169 00288-035 OPx62 TJ = PDISS x JA + TA where: TJ is the OPx62 junction temperature. PDISS is the OPx62 power dissipation. JA is the OPx62 package thermal resistance, junction-toambient temperature. TA is the ambient temperature of the circuit. 5V VIN To calculate the internal junction temperature of the OPx62, use the formula 0.1 0 20 40 60 80 100 AMBIENT TEMPERATURE (C) 120 Figure 35. Maximum Power Dissipation vs. Temperature for 8-Lead Package Types OP162/OP262/OP462 Data Sheet 1 1.1 0 TO +5V SQUARE 1.0 14-LEAD SOIC 0.9 OP462 0.8 VOUT 10K 00288-039 0.7 0.6 0.5 14-LEAD TSSOP Figure 38. Test Circuit for Power-On Settling Time 0.4 CAPACITIVE LOAD DRIVE 0.3 0.2 The OP162/OP262/OP462 are high speed, extremely accurate devices that tolerate some capacitive loading at their outputs. As load capacitance increases, unity-gain bandwidth of an OPx62 device decreases. This also causes an increase in overshoot and settling time for the output. Figure 40 shows an example of this with the device configured for unity gain and driving a 10 k resistor and 300 pF capacitor placed in parallel. 0.1 0 20 45 70 95 AMBIENT TEMPERATURE (C) 120 Figure 36. Maximum Power Dissipation vs. Temperature for 14-Lead Package Types UNUSED AMPLIFIERS It is recommended that any unused amplifiers in a dual or a quad package be configured as a unity-gain follower with a 1 k feedback resistor connected from the inverting input to the output, and the noninverting input tied to the ground plane. POWER-ON SETTLING TIME The time it takes for the output of an op amp to settle after a supply voltage is delivered can be an important consideration in some power-up-sensitive applications. An example of this would be in an A/D converter where the time until valid data can be produced after power-up is important. By connecting a series R-C network, commonly called a "snubber" network, from the output of the device to ground, this ringing can be eliminated and overshoot can be significantly reduced. Figure 39 shows how to set up the snubber network, and Figure 41 shows the improvement in output response with the network added. The OPx62 family has a rapid settling time after power-up. Figure 37 shows the OP462 output settling times for a singlesupply voltage of VS = +5 V. The test circuit in Figure 38 was used to find the power-on settling times for the device. 5V OPx62 VIN VOUT RX CX Figure 39. Snubber Network Compensation for Capacitive Loads VS = 5V AV = 1 CL = 300pF RL = 10k 100 2V 500ns CL 00288-040 00288-037 90 100 90 10 VS = 5V AV = 1 RL = 10k 10 0% 50mV 50mV 00288-038 0% 1s Figure 40. A Photo of a Ringing Square Wave Figure 37. Oscilloscope Photo of VS and VOUT Rev. G | Page 14 of 20 00288-041 MAXIMUM POWER DISSIPATION (Watts) 1.2 Data Sheet OP162/OP262/OP462 Figure 44 shows the worst case crosstalk between two amplifiers in the OP462. A 1 V rms signal is applied to one amplifier while measuring the output of an adjacent amplifier. Both amplifiers are configured for unity gain and supplied with 2.5 V. VS = 5V AV = 1 CL = 300pF RL = 10k 100 90 WITH SNUBBER: RX = 140 CX = 10nF 0.010 VS = 2.5V AV = 1 VIN = 1.0V rms RL = 10k BANDWIDTH: <10Hz TO 22kHz THD+N (%) 10 00288-042 0% 1s 50mV 0.001 The network operates in parallel with the load capacitor, CL, and provides compensation for the added phase lag. The actual values of the network resistor and capacitor are empirically determined to minimize overshoot and maximize unity-gain bandwidth. Table 6 shows a few sample snubber networks for large load capacitors. 0.0001 20 CLOAD < 300 pF 500 pF 1 nF 10 nF -60 CX 10 nF 10 nF 10 nF 47 nF XTALK (dBV) -70 Higher load capacitance will reduce the unity-gain bandwidth of the device. Figure 42 shows unity-gain bandwidth vs. capacitive load. The snubber network does not provide any increase in bandwidth, but it substantially reduces ringing and overshoot, as shown between Figure 40 and Figure 41. 10k 20k AV = 1 VIN = 1.0V rms (0dBV) RL = 10k VS = 2.5V -80 -90 -100 -110 00288-045 -120 -130 -140 20 10 100 1k FREQUENCY (Hz) 10k 20k Figure 44. Crosstalk vs. Frequency 9 PCB LAYOUT CONSIDERATIONS 8 BANDWIDTH (MHz) 1k FREQUENCY (Hz) -40 -50 Because the OP162/OP262/OP462 can provide gains at high frequency, careful attention to board layout and component selection is recommended. As with any high speed application, a good ground plane is essential to achieve the optimum performance. This can significantly reduce the undesirable effects of ground loops and I x R losses by providing a low impedance reference point. Best results are obtained with a multilayer board design with one layer assigned to ground plane. 7 6 5 4 3 00288-043 2 1 0 10pF 100 Figure 43. THD + N vs. Frequency Table 6. Snubber Networks for Large Capacitive Loads RX 140 100 80 10 00288-044 Figure 41. A Photo of a Nice Square Wave at the Output 100pF 1nF 10nF CLOAD Figure 42. Unity-Gain Bandwidth vs. CLOAD TOTAL HARMONIC DISTORTION AND CROSSTALK The OPx62 device family offers low total harmonic distortion making it an excellent choice for audio applications. Figure 43 shows a graph of THD plus noise figures at 0.001% for the OP462. Use chip capacitors for supply bypassing, with one end of the capacitor connected to the ground plane and the other end connected within 1/8 inch of each power pin. An additional large tantalum electrolytic capacitor (4.7 F to 10 F) should be connected in parallel. This capacitor provides current for fast, large-signal changes at the device's output; therefore, it does not need to be placed as close to the supply pins. Rev. G | Page 15 of 20 OP162/OP262/OP462 Data Sheet APPLICATIONS CIRCUITS SINGLE-SUPPLY STEREO HEADPHONE DRIVER INSTRUMENTATION AMPLIFIER Figure 45 shows a stereo headphone output amplifier that can operate from a single 5 V supply. The reference voltage is derived by dividing the supply voltage down with two 100 k resistors. A 10 F capacitor prevents power supply noise from contaminating the audio signal and establishes an ac ground for the volume control potentiometers. Because of their high speed, low offset voltages, and low noise characteristics, the OP162/OP262/OP462 can be used in a wide variety of high speed applications, including precision instrumentation amplifiers. Figure 46 shows an example of such an application. R1 = 10k -VIN OP462-A 1k OP462-D L VOLUME CONTROL OP462-B +VIN 270F HEADPHONE LEFT 47k 10k 5V 100k 100k 10F 5V 10k 169 R VOLUME CONTROL HEADPHONE RIGHT 47k 10F R2 = 50k R1 = 10k 10F Figure 45. Headphone Output Amplifier 00288-046 RIGHT IN 270F OP262-B OUTPUT 200 10 TURN (OPTIONAL) The differential gain of the circuit is determined by RG, where ADIFF = 1 + 169 OP462-C Figure 46. High Speed Instrumentation Amplifier 5V OP262-A 10k 1.9k 10k LEFT IN 10F 1k 2k 2k R2 = 50k 10F RG 2k 00288-047 The audio signal is ac-coupled to each noninverting input through a 10 F capacitor. The gain of the amplifier is controlled by the feedback resistors and is (R2/R1) + 1. For this example, the gain is 6. By removing R1, the amplifier would have unity gain. To short-circuit protect the output of the device, a 169 resistor is placed at the output in the feedback network. This prevents any damage to the device if the headphone output becomes shorted. A 270 F capacitor is used at the output to couple the amplifier to the headphone. This value is much larger than that used for the input because of the low impedance of headphones, which can range from 32 to 600 or more. 2 RG with the RG resistor value in k. Removing RG sets the circuit gain to unity. The fourth op amp, OP462-D, is optional and is used to improve CMRR by reducing any input capacitance to the amplifier. By shielding the input signal leads and driving the shield with the common-mode voltage, input capacitance is eliminated at common-mode voltages. This voltage is derived from the midpoint of the outputs of OP462-A and OP462-B by using two 10 k resistors followed by OP462-D as a unity-gain buffer. It is important to use 1% or better tolerance components for the 2 k resistors, as the common-mode rejection is dependent on their ratios being exact. A potentiometer should also be connected in series with the OP462-C noninverting input resistor to ground to optimize common-mode rejection. The circuit in Figure 46 was implemented to test its settling time. The instrumentation amp was powered with -5 V, so the input step voltage went from -5 V to +4 V to keep the OP462 within its input range. Therefore, the 0.05% settling range is when the output is within 4.5 mV. Figure 47 shows the positive slope settling time to be 1.8 s, and Figure 48 shows a settling time of 3.9 s for the negative slope. Rev. G | Page 16 of 20 Data Sheet OP162/OP262/OP462 DIRECT ACCESS ARRANGEMENT 2V 100 90 10 1s 00288-048 0% Figure 47. Positive Slope Settling Time 5mV 5mV 2V 100 90 Figure 49 shows a schematic for a 5 V single-supply transmit/ receive telephone line interface for 600 transmission systems. It allows full-duplex transmission of signals on a transformercoupled 600 line. Amplifier A1 provides gain that can be adjusted to meet the modem output drive requirements. Both A1 and A2 are configured to apply the largest possible differential signal to the transformer. The largest signal available on a single 5 V supply is approximately 4.0 V p-p into a 600 transmission system. Amplifier A3 is configured as a difference amplifier to extract the receive information from the transmission line for amplification by A4. A3 also prevents the transmit signal from interfering with the receive signal. The gain of A4 can be adjusted in the same manner as A1 to meet the modem's input signal requirements. Standard resistor values permit the use of SIP (single in-line package) format resistor arrays. Couple this with the OP462 14-lead SOIC or TSSOP package and this circuit offers a compact solution. P1 TX GAIN ADJUST 10 TO TELEPHONE LINE 1s 1s Figure 48. Negative Slope Settling Time 00288-049 0% 2k R3 360 1:1 1 2 A1 C1 R1 0.1F 10k 6.2V 5V DC T1 MIDCOM 671-8005 R6 10k 6 7 A2 R7 10k 5 R8 10k 10F R9 10k R10 10k 2 R11 10k A1, A2 = 1/2 AD8532 A3, A4 = 1/2 AD8532 TRANSMIT TXA 3 R5 10k 6.2V ZO 600 R2 9.09k 3 R12 10k A3 1 R13 10k R14 14.3k 2k 6 5 P2 RX GAIN ADJUST A4 7 RECEIVE RXA C2 0.1F Figure 49. Single-Supply Direct Access Arrangement for Modems Rev. G | Page 17 of 20 00288-050 5mV OP162/OP262/OP462 Data Sheet OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 5 1 6.20 (0.2441) 5.80 (0.2284) 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 0.51 (0.0201) 0.31 (0.0122) COPLANARITY 0.10 SEATING PLANE 0.50 (0.0196) 0.25 (0.0099) 1.75 (0.0688) 1.35 (0.0532) 45 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 50. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body S-Suffix (R-8) Dimensions shown in millimeters and (inches) 3.10 3.00 2.90 8 5 4.50 4.40 4.30 1 6.40 BSC 4 PIN 1 0.65 BSC 0.15 0.05 1.20 MAX COPLANARITY 0.10 0.30 0.19 SEATING 0.20 PLANE 0.09 8 0 0.75 0.60 0.45 COMPLIANT TO JEDEC STANDARDS MO-153-AA Figure 51. 8-Lead Thin Shrink Small Outline Package [TSSOP) (RU-8) Dimensions shown in millimeters Rev. G | Page 18 of 20 012407-A 8 4.00 (0.1574) 3.80 (0.1497) Data Sheet OP162/OP262/OP462 5.10 5.00 4.90 14 8 4.50 4.40 4.30 6.40 BSC 1 7 PIN 1 0.65 BSC 1.20 MAX 0.15 0.05 COPLANARITY 0.10 0.20 0.09 0.30 0.19 0.75 0.60 0.45 8 0 SEATING PLANE 061908-A 1.05 1.00 0.80 COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 Figure 52. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters 8.75 (0.3445) 8.55 (0.3366) 8 14 1 7 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 6.20 (0.2441) 5.80 (0.2283) 0.50 (0.0197) 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 45 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 53. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body S-Suffix (R-14) Dimensions shown in millimeters and (inches) Rev. G | Page 19 of 20 060606-A 4.00 (0.1575) 3.80 (0.1496) OP162/OP262/OP462 Data Sheet ORDERING GUIDE Model 1 OP162GSZ OP162GSZ-REEL OP162GSZ-REEL7 OP262DRUZ-REEL OP262GS OP262GS-REEL OP262GS-REEL7 OP262GSZ OP262GSZ-REEL OP262GSZ-REEL7 OP262HRU-REEL OP262HRUZ OP262HRUZ-REEL OP462GS OP462GS-REEL OP462GS-REEL7 OP462GSZ OP462GSZ-REEL OP462GSZ-REEL7 OP462HRU-REEL OP462HRUZ-REEL 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead TSSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_ 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead TSSOP 8-Lead TSSOP 8-Lead TSSOP 14-Lead SOIC_ 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead TSSOP 14-Lead TSSOP Z = RoHS Compliant Part. (c)2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00288-0-5/12(G) Rev. G | Page 20 of 20 Package Option S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) RU-8 S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) S-Suffix (R-8) RU-8 RU-8 RU-8 S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) S-Suffix (R-14) RU-14 RU-14