ADVANCE INFORMATION
North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662
10-A, 12-V Input Non-Isolated
Wide-Output Adjust Power Module
Standard Application
Features
•Up to 10-A Output Current
•12-V Input Voltage
•Wide-Output Voltage Adjust
(1.2 V to 5.5 V)
•Efficiencies up to 95 %
•225 W/in³ Power Density
•On/Off Inhibit
•Output Voltage Sense
•Margin Up/Down Controls
•Under-Voltage Lockout
•Auto-Track™ Sequencing
•Output Over-Current Protection
(Non-Latching, Auto-Reset)
•Operating Temp: –40 to +85 °C
•IPC Lead Free 2
•Safety Agency Approvals (Pending)
UL 1950, CSA 22.2 950, &
EN60950
•Point-of-Load Alliance (POLA)
Compatible
Auto-Track™
Sequencing
Pin Configuration
Pin Function
1 GND
2V
in
3 Inhibit *
4V
o Adjust
5V
o Sense
6V
out
7 GND
8 Track
9 Margin Down *
10 Margin Up *
* Denotes negative logic:
Open = Normal operation
Ground = Function active
NOMINAL SIZE = 1 in x 0.62 in
(25,4 mm x 15,75 mm)
ATH10K12 Series —12-V Input
Margin Up
Margin Down
V
IN
L
O
A
D
C
IN
560 µF
(Required)
+
Co
1
330 µF
(Optional)
+
Inhibit
GND GND
V
OUT
V
o
Sense
Track
R
SET
1 %, 0.1 W
(Required)
PTH12060W
(Top View)
1
2
10 9 8 7
6
543
Co
2
10 µF
Ceramic
(Optionable)
Description
The ATH10K12 series is a non-
isolated power module, and part of a new
class of complete DC/DC converters
from Texas Instruments. These modules
are small in size, and a feature-rich alter-
native for applications requiring up to
10 A of load current.
Its small footprint, (1 in × 0.62 in) and
industry leading features makes this mod-
ule suitable for space conscious digital
systems that incorporate multiple pro-
cessors.
The ATH10K12 module operates
from a 12-V input bus voltage to provide
step-down power conversion to any out-
put voltage over the range, 1.2 V to 5.5 V.
The output voltage is set using a single
resistor.
This product includes Auto-Track™
Sequencing. Auto-Track greatly simplifies
the task of supply voltage sequencing in
a power system, by enabling modules to
track each other, or any other external
voltage, during power up and power down.
Other features include an on/off inhibit
and margin up/down controls. An output
voltage sense ensures tight load regulation.
A non-latching over-current trip protects
against load faults.
Target applications are complex digital
systems that incorporate the industry’s
latest high-speed DSPs, ASICs, FPGAs,
micro-processors, and bus drivers.
Rset = Required to set the output voltage
to a value higher than 1.2 V. (See
specification table for values)
Cin = Required 560 µF capacitor
Cout = Optional 330 µF capacitor
ATH10K12-9S
REVISION 00 (4DEC2003)
ADVANCE INFORMATION
North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662
Pin Descriptions
Vin: The positive input voltage power node to the mod-
ule, which is referenced to common GND.
Vout: The regulated positive power output with respect
to the GND node.
GND: This is the common ground connection for the
Vin and Vout power connections. It is also the 0 VDC
reference for the control inputs.
Inhibit: The Inhibit pin is an open-collector/drain negative
logic input that is referenced to GND. Applying a low-
level ground signal to this input disables the module’s
output and turns off the output voltage. When the Inhibit
control is active, the input current drawn by the regula-
tor is significantly reduced. If the Inhibit pin is left
open-circuit, the module will produce an output when-
ever a valid input source is applied.
Vo Adjust: A 1 % 0.1 W resistor must be directly connected
between this pin and pin 7 (GND) to set output voltage
to a value higher than 1.2 V. The temperature stability
of the resistor should be 100 ppm/°C or better. The set
point range is from 1.2 V to 5.5 V. The resistor value
required for a given output voltage may be calculated from
the following formula. If left open circuit the output
voltage will default to its lowest value. For further infor-
mation on output voltage adjustment consult the related
application note.
Rset = 10 kΩ · 0.8 V – 1.82 kΩ
Vout – 1.2 V
The specification table gives the preferred resistor values
for a number of standard output voltages.
Vo Sense: The sense input allows the regulation circuit to
compensate for voltage drop between the module and
the load. For optimal voltage accuracy Vo Sense should be
connected to Vout. It can also be left disconnected.
Track: This is an analog control input that enables the
output voltage to follow an external voltage. This pin
becomes active typically 20 ms after the input voltage
has been applied, and allows direct control of the output
voltage from 0 V up to the nominal set-point voltage.
Within this range the output will follow the voltage at
the Track pin on a volt-for-volt basis. When the control
voltage is raised above this range, the module regulates
at its set-point voltage. The feature allows the output
voltage to rise simultaneously with other modules pow-
ered from the same input bus. If unused, the input may
be left unconnected. Note: Due to the under-voltage lockout,
this feature does not allow the output from the module to follow
its own input voltage during power up. For more information,
consult the related application note.
Margin Down: When this input is asserted to GND, the
output voltage is decreased by 5% from the nominal. The
input requires an open-collector (open-drain) interface.
It is not TTL compatible. A lower percent change can
be accomodated with a series resistor. For further infor-
mation, consult the related application note.
Margin Up: When this input is asserted to GND, the
output voltage is increased by 5%. The input requires an
open-collector (open-drain) interface. It is not TTL
compatible. The percent change can be reduced with a
series resistor. For further information, consult the
related application note.
Ordering Information
10-A, 12-V Input Non-Isolated
Wide-Output Adjust Power Module
ATH10K12 Series —12-V Input
REVISION 00 (4DEC2003)
Input Voltage Output Voltage Output Current Model Number
10.8V to 13.2V 1.2V1 to 5.5V 10A ATH10K12-9(S)(J)
Options:
“-J” - Through-hole Termination, Tray Packaging
“-SJ” - SMT Termination, Tray Packaging
“-S” - SMT Termination, T&R Packaging
Notes:
1Preset output voltage is 1.2V; externally adjustable to 5.5V through the Vo,Adjust pin
ADVANCE INFORMATION
North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662
Environmental & Absolute Maximum Ratings (Voltages are with respect to GND)
Characteristics Symbols Conditions Min Typ Max Units
Track Input Voltage Vtrack –0.2 — Vin V
Operating Temperature Range TaOver Vin Range –40 (i) — 85 °C
Solder Reflow Temperature Treflow Surface temperature of module body or pins 215 (ii) °C
Storage Temperature Ts— –40 — 125 °C
Mechanical Shock Per Mil-STD-883D, Method 2002.3 — TBD — G’s
1 msec, ½ Sine, mounted
Mechanical Vibration Mil-STD-883D, Method 2007.2 — TBD — G’s
20-2000 Hz
Weight — — 5 — grams
Flammability — Meets UL 94V-O
Notes: (i) For operation below 0 °C the external capacitors must bave stable characteristics. Use either a low ESR tantalum, Os-Con, or ceramic capacitor.
(ii) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the stated maximum. For
further guidance refer to the application note, “Reflow Soldering Requirements for Plug-in Power Surface Mount Products.”
Specifications (Unless otherwise stated, Ta =25 °C, Vin =12 V, Vout =3.3 V, Cin=560 µF, Co1 =0 µF, and Io =Iomax)
ATH10K12
Characteristics Symbols Conditions Min Typ Max Units
Output Current Io1.2 V ≤ Vo ≤ 5.5 V, 85 °C, 200 LFM airflow 0 — 10 (1) A
25 °C, natural convection 0 — 10 (1)
Input Voltage Range Vin Over Io range 10.8 — 13.2 V
Set-Point Voltage Tolerance Vo tol — — ±2 (2) %Vo
Temperature Variation ∆Regtemp –40 °C <Ta < +85 °C — ±0.5 — %Vo
Line Regulation ∆Regline Over Vin range — ±10 — mV
Load Regulation ∆Regload Over Io range — ±12 — mV
Total Output Variation ∆Regtot Includes set-point, line, load, ——±3%V
o
–40 °C ≤ Ta ≤ +85 °C
Efficiency ηIo =8 A RSET = 280 ΩVo = 5.0 V — 94 —
RSET = 2.0 kΩVo = 3.3 V — 92 —
RSET = 4.32 kΩVo = 2.5 V — 90 —
RSET = 8.06 kΩVo = 2.0 V — 88 — %
RSET = 11.5 kΩVo = 1.8 V — 87 —
RSET = 24.3 kΩVo = 1.5 V — 85 —
RSET = open cct Vo = 1.2 V — 83 —
Vo Ripple (pk-pk) Vr20 MHz bandwidth, Vo ≤2.5 V — 25 (3) — mVpp
Co2 =10µF ceramic Vo >2.5 V — 1 (3) —% V
o
Over-Current Threshold Io trip Reset, followed by auto-recovery — 20 — A
Transient Response 1 A/µs load step, 50 to 100 % Iomax,
Co1 =330 µF
ttr Recovery Time — 70 — µSec
∆Vtr Vo over/undershoot — 100 — mV
Margin Up/Down Adjust Vo adj — ± 5 — %
Margin Input Current (pins 9 /10) IIL margin Pin to GND — – 8 (4) —µA
Track Input Current (pin 8) IIL track Pin to GND — — –0.13 (5) mA
Track Slew Rate Capability dVtrack/dt Vtrack – Vo ≤ 50 mV and Vtrack < Vo(nom) 5 — — V/ms
Under-Voltage Lockout UVLO Vin increasing — 9.5 10.4 V
Vin decreasing 8.8 9 —
Inhibit Control (pin3) Referenced to GND
Input High Voltage VIH Vin –0.5 — Open (5) V
Input Low Voltage VIL –0.2 — 0.5
Input Low Current IIL inhibit Pin to GND — –0.24 — mA
Input Standby Current Iin inh Inhibit (pin 3) to GND, Track (pin 8) open — 10 — mA
Switching Frequency ƒsOver Vin and Io ranges 300 350 400 kHz
External Input Capacitance Cin 560 (6) ——µF
External Output Capacitance Cout 0 330 (7) TBD µF
Reliability MTBF Per Bellcore TR-332 TBD — — 106 Hrs
50 % stress, Ta =40 °C, ground benign
Notes:
(1) See SOA curves or consult factory for appropriate derating.
(2) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1 %
with 100 ppm/°C or better temperature stability.
(3) The pk-pk output ripple voltage is measured with an external 10 µF ceramic capacitor. See the standard application schematic.
(4) A small low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.
(5) This control pin has an internal pull-up to the input voltage Vin (7.5 V for pin 8). If it is left open-circuit the module will operate when input power is
applied. A small low-leakage (<100 nA) MOSFET is recommended for control. For further information, consult the related application note.
(6) A 560 µF input capacitor are required for proper operation. The electrolytic capacitor must be rated for a minimum of 800 mA rms of ripple current.
For further information, consult the related application note regarding capacitor selection.
(7) An external output capacitor is not required for basic operation. Adding 330 µF of distributed capacitance at the load will improve the transient response.
10-A, 12-V Input Non-Isolated
Wide-Output Adjust Power Module
ATH10K12 Series —12-V Input
ADVANCE INFORMATION
The products listed hereunder are prototype or pre-production devices which have not been fully qualified to Astec’s
specifications. Product specifications are subject to change without notice. Astec makes no warranty, either expressed,
implied, or statutory, including implied warranty of merchantability or fitness for a specific purpose, of these products.
North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662
Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the Converter.
Note B: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to
modules soldered directly to a 4 in.
×
4 in. double-sided PCB with 1 oz. copper.
Typical Characteristics
Characteristic Data; Vin =12 V (See Note A)
Efficiency vs Load Current
Power Dissipation vs Load Current
Output Ripple vs Load Current (See Note 3 of Table)
Safe Operating Area; Vin =12 V (See Note B)
Output Voltage =3.3 V
10-A, 12-V Input Non-Isolated
Wide-Output Adjust Power Module
ATH10K12 Series —12-V Input
20
30
40
50
60
70
80
90
0246810
Iout (A)
Ambient Temperature (°C)
400LFM
200LFM
100LFM
Nat conv
Airflow
50
60
70
80
90
100
0246810
Iout - Amps
Efficiency - %
5.0 V
3.3 V
2.5 V
1.8 V
1.5 V
1.2 V
VOUT
0
20
40
60
80
100
0246810
Iout - Amps
Ripple - mV
5.0 V
3.3 V
2.5 V
1.8 V
1.5 V
1.2 V
VOUT
0
1
2
3
4
5
0246810
Iout - Amps
Pd - Watts
5.0 V
3.3 V
2.5 V
1.2 V
VOU T
Application Notes
North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662
Adjusting the Output Voltage of the ATH10K12
Wide-Output Adjust Power Module
The Vo Adjust control (pin 4) is used to set the output
voltage to a value higher than 1.2 V. The adjustment
method requires the addition of a single external resistor,
Rset, that must be connected directly between the Vo Adjust
and GND pins 1. Table 1-1 gives the preferred value for
the external resistor for a number of standard voltages,
along with the actual output voltage that this resistance
value provides.
For other output voltages the value of the required resistor
can either be calculated using the following formula, or
simply selected from the range of values given in Table 1-2.
Figure 1-1 shows the placement of the required resistor.
Rset = 10 kΩ · 0.8 V – 1.82 kΩ
Vout – 1.2 V
Figure 1-1; Vo Adjust Resistor Placement
Notes:
1. Use a 0.1 W resistor. The tolerance should be 1 %, with
temperature a stability of 100 ppm/°C (or better). Place
the resistor as close to the regulator as possible. Connect
the resistor directly between pins 4 and 7 using dedicated
PCB traces.
2. Never connect capacitors from Vo Adjust to either GND or
Vout. Any capacitance added to the Vo Adjust pin will affect
the stability of the regulator.
1.200 Open
1.225 318 kΩ
1.250 158 kΩ
1.275 105 kΩ
1.300 78.2 kΩ
1.325 62.2 kΩ
1.350 51.5 kΩ
1.375 43.9 kΩ
1.400 38.2 kΩ
1.425 33.7 kΩ
1.450 30.2 kΩ
1.475 27.3 kΩ
1.50 24.8 kΩ
1.55 21 kΩ
1.60 18.2 kΩ
1.65 16 kΩ
1.70 14.2 kΩ
1.75 12.7 kΩ
1.80 11.5 kΩ
1.85 10.5 kΩ
1.90 9.61 kΩ
1.95 8.85 kΩ
2.00 8.18 kΩ
2.05 7.59 kΩ
2.10 7.07 kΩ
2.15 6.6 kΩ
2.20 6.18 kΩ
2.25 5.8 kΩ
2.30 5.45 kΩ
2.35 5.14 kΩ
2.40 4.85 kΩ
2.45 4.85 kΩ
2.50 4.33 kΩ
2.55 4.11 kΩ
2.60 3.89 kΩ
2.65 3.7 kΩ
2.70 3.51 kΩ
Vout (Standard) Rset (Pref’d Value) Vout (Actual)
5 V 280 Ω5.009 V
3.3 V 2 kΩ3.294V
2.5 V 4.32 kΩ2.503 V
2 V 8.06 kΩ2.010V
1.8 V 11.5 kΩ1.801 V
1.5 V 24.3 kΩ1.506 V
1.2 V Open 1.200 V
Table 1-1; Preferred Values of Rset for Standard Output Voltages
ATH10K12 Series
Table 1-2; Output Voltage Set-Point Resistor Values
Va Req’d Rset Va Req’d Rset
2.75 3.34 kΩ
2.80 3.18 kΩ
2.85 3.03 kΩ
2.90 2.89 kΩ
2.95 2.75 kΩ
3.00 2.62 kΩ
3.05 2.5 kΩ
3.10 2.39 kΩ
3.15 2.28 kΩ
3.20 2.18 kΩ
3.25 2.08 kΩ
3.30 1.99 kΩ
3.35 1.9 kΩ
3.40 1.82 kΩ
3.45 1.74 kΩ
3.50 1.66 kΩ
3.55 1.58 kΩ
3.6 1.51 kΩ
3.7 1.38 kΩ
3.8 1.26 kΩ
3.9 1.14 kΩ
4.0 1.04 kΩ
4.1 939 Ω
4.2 847 Ω
4.3 761 Ω
4.4 680 Ω
4.5 604 Ω
4.6 533 Ω
4.7 466 Ω
4.8 402 Ω
4.9 342 Ω
5.0 285 Ω
5.1 231 Ω
5.2 180 Ω
5.3 131 Ω
5.4 85 Ω
5.5 41 Ω
V
IN
C
IN
560 µF
(Required)
+
C
OUT
330 µF
(Optional)
+
GND
V
OUT
V
o
Sense
R
SET
0.1 W
1 %
PTH12060
1
10
4
5
62
3
98
7
ATH10K12-9S
Application Notes
North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662
Table 2-1: Input/Output Capacitors
(1) N/R –Not recommended. The voltage rating does not meet the minimum operating limits.
Tantalum Capacitors
Tantalum type capacitors can be used for the output but
only the AVX TPS, Sprague 593D/594/595 or Kemet
T495/T510 series. These capacitors are recommended
over many other tantalum types due to their higher rated
surge, power dissipation, and ripple current capability.
As a caution the TAJ series by AVX is not recommended.
This series has considerably higher ESR, reduced power
dissipation, and lower ripple current capability. The TAJ
series is also less reliable than the AVX TPS series when
determining power dissipation capability.
Ceramic Capacitors
Ceramic capacitors will compliment electrolytic types.
Adding 10 µF or more ceramic capacitance will reduce
ripple on the input and output bus. Output ripple and
transient measurement accuracy is improved by measur-
ing directly across a 10 µF ceramic capacitor.
Capacitor Table
Table 2-1 identifies the characteristics of capacitors from a
number of vendors with acceptable ESR and ripple current
(rms) ratings. The number of capacitors required at both
the input and output buses is identified for each part type.
This is not an extensive capacitor list. Capacitors from other
vendors are available with comparable specifications. Those
listed are for guidance. The RMS ripple current rating and
ESR are critical parameters necessary to insure both optimum
regulator performance and long capacitor life.
ATH10K12: Capacitor Recommendations
Input Capacitor
The recommended input capacitance is determined by
560 µF minimum capacitance and 1050 mArms minimum
ripple current rating. A 10-µF ceramic capacitor can be
used to reduce input ripple. This should be located be-
tween the input electrolytic and the module. A suggested
ceramic part number is the Murata GRM31CR61C106K
or similar ‘X7R’ capacitor.
Ripple current and <100 mΩ equivalent series resistance
(ESR) values are the major considerations, along with
temperature, when designing with different types of capaci-
tors. Tantalum capacitors have a recommended minimum
voltage rating of 2 × (max. dc voltage + ac ripple). Tanta-
lum capacitors are not recommended on the input bus as
there are none with a sufficient voltage rating.
Output Capacitors: Optional
The recommended ESR of the output capacitor is less than
or equal to 150 mΩ. Electrolytic capacitors have marginal
ripple performance at frequencies above 400 kHz but
excellent low frequency transient response. Above the
ripple frequency, ceramic capacitors are necessary to
improve the transient response and reduce any high fre-
quency noise components apparent during higher current
excursions. Tantalum or Os-con types are recommended
for applications where ambient temperatures fall below
0°C.
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ATH10K12 Series
Application Notes
ATH Series of Wide-Output Adjust
Power Modules (12-V Input)
North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662
Features of the ATH Family of Non-Isolated
Wide Output Adjust Power Modules
Point-of-Load Alliance
The ATH family of non-isolated, wide-output adjust
power modules from Texas Instruments are optimized
for applications that require a flexible, high performance
module that is small in size. These products are part of
the “Point-of-Load Alliance” (POLA), which ensures
compatible footprint, interoperability and true second
sourcing for customer design flexibility. The POLA is a
collaboration between Texas Instruments, Artesyn Tech-
nologies, and Astec Power to offer customers advanced
non-isolated modules that provide the same functionality
and form factor. Product series covered by the alliance
includes the ATH06 (6 A), ATH10 (10 A), ATH12/15
(12/15 A), ATH18/22 (18/22 A), and the ATH26/30 (26/
30 A).
From the basic, “Just Plug it In” functionality of the 6-A
modules, to the 30-A rated feature-rich ATH30 Series,
these products were designed to be very flexible, yet simple
to use. The features vary with each product. Table 3-1
provides a quick reference to the available features by
product and input bus voltage.
Table 3-1; Operating Features by Series and Input Bus Voltage
For simple point-of-use applications, the ATH06 (6A)
provides operating features such as an on/off inhibit,
output voltage trim, pre-bias startup (3.3/5-V input only), and
over-current protection. The ATH10 (10 A), and ATH12/
15 (12/15 A) include an output voltage sense, and margin
up/down controls. Then the higher output current,
ATH18/22 (18/22A) and ATH26/30 (26/30A) products incor-
porate over-temperature shutdown protection. All of the
products referenced in Table 3-1 include Auto-Track™.
Power-Up Characteristics
When configured per their standard application all the
ATH products will produce a regulated output voltage fol-
lowing the application of a valid input source voltage. All
the modules include soft-start circuitry. This slows the initial
rate in which the output voltage can rise, thereby limiting
the amount of in-rush current that can be drawn from the
input source. The soft-start circuitry also introduces a short
time delay (typically 5 ms-10 ms) into the power-up
characteristic. This delay is from the point that a valid
input source is recognized, to the initial rise of the output
voltage. Figure 3-1 shows the power-up characteristic of
the 10-A output product (ATH10K12), operating from a
12-V input bus and configured for a 3.3-V output. The
waveforms were measured with a 5-A constant current
load. The initial rise in input current when the input
voltage first starts to rise is the charge current drawn by
the input capacitors.
Figure 3-1
Vin (5 V/Div)
Vo (2 V/Div)
Iin (2 A/Div)
HORIZ SCALE: 5 ms/Div
Over-Current Protection
For protection against load faults, all modules incorporate
output over-current protection. Applying a load that
exceeds the regulator’s over-current threshold will cause
the regulated output to shut down. Following shutdown, a
module will periodically attempt to recover by initiating
a soft-start power-up. This is described as a “hiccup” mode
of operation, whereby the module continues in a cycle of
successive shutdown and power up until the load fault is
removed. During this period, the average current flowing
into the fault is significantly reduced. Once the fault is
removed, the module automatically recovers and returns
to normal operation.
S e ries Input Bu s I OUT
3.3 V 6 A •••••
5 V 6 A •••••
12 V 6 A ••• •
3.3 V / 5 V 10 A •••••••
12 V 8 A ••• •••
3.3 V / 5 V 15 A •••••••
12 V 12 A ••• •••
3.3 V / 5 V 22 A ••••••••
12 V 18 A ••• ••••
3.3 V / 5 V 30 A ••••••••
12 V 26 A ••••••••
PTHxx030
On/Off Inhibit
PTHxx010
PTHxx020
PTHxx050
PTHxx060
Over-Current
Output Sense
Adjust (Trim)
Thermal Shutdown
Pre-Bias Start up
Margin Up/Down
Auto-Track™
This is a feature unique to the ATH family, and was
specifically designed to simplify the task of sequencing the
supply voltage in a power system. These and other features
are described in the following sections.
10 A
ATH06
ATH10
ATH12/15
ATH18/22
ATH26/30
Application Notes
ATH Series of Wide-Output Adjust
Power Modules (12-V Input)
North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662
Output On/Off Inhibit
For applications requiring output voltage on/off control,
each series of the ATH family incorporates an output
Inhibit control pin. The inhibit feature can be used wher-
ever there is a requirement for the output voltage from
the regulator to be turned off.
The power modules function normally when the Inhibit
pin is left open-circuit, providing a regulated output
whenever a valid source voltage is connected to Vin with
respect to GND.
Figure 3-2 shows the typical application of the inhibit
function. Note the discrete transistor (Q1). The Inhibit
input has its own internal pull-up to Vin potential (12 V).
The input is not compatible with TTL logic devices. An
open-collector (or open-drain) discrete transistor is rec-
ommended for control.
Turning Q1 on applies a low voltage to the Inhibit control
pin and disables the output of the module. If Q1 is then
turned off, the module will execute a soft-start power-up
sequence. A regulated output voltage is produced within
20 msec. Figure 3-3 shows the typical rise in both the
output voltage and input current, following the turn-off
of Q1. The turn off of Q1 corresponds to the rise in the
waveform, Q1 Vds. The waveforms were measured with
a 5-A constant current load.
Figure 3-2
Figure 3-3
Q1Vds (5 V/Div)
Vo (2 V/Div)
Iin (2 A/Div)
HORIZ SCALE: 10 ms/Div
PTH12060W
V
IN
1
10
4
5
62
3
L
O
A
D
C
IN
560 µF
+
C
OUT
330 µF
+
1 =Inhibit
GND GND
V
OUT
9
V
o
Sense
8
Q
1
BSS138
R
SET
2.0k
Ω
1 %
0.1 W
7
Remote Sense
The ATH10 (10A), ATH12/15 (12/15A), ATH18/22 (18/
22A), and ATH26/30 (26/30A) products incorporate an
output voltage sense pin, Vo Sense. The Vo Sense pin should
be connected to Vout at the load circuit (see data sheet stan-
dard application). A remote sense improves the load
regulation performance of the module by allowing it to
compensate for any ‘IR’ voltage drop between itself and the
load. An IR drop is caused by the high output current
flowing through the small amount of pin and trace resis-
tance. Use of the remote sense is optional. If not used,
the Vo Sense pin can be left open-circuit. An internal
low-value resistor (15-Ω or less) is connected between
the Vo Sense and Vout. This ensures the output voltage re-
mains in regulation.
With the sense pin connected, the difference between
the voltage measured directly between the Vout and GND
pins, and that measured from Vo Sense to GND, is the
amount of IR drop being compensated by the regulator.
This should be limited to a maximum of 0.3 V.
Note: The remote sense feature is not designed to compensate
for the forward drop of non-linear or frequency dependent
components that may be placed in series with the converter
output. Examples include OR-ing diodes, filter inductors,
ferrite beads, and fuses. When these components are enclosed
by the remote sense connection they are effectively placed
inside the regulation control loop, which can adversely affect
the stability of the regulator.
Over-Temperature Protection (OTP)
The ATH18/22 (18/22A) and ATH26/30 (26/30A) series of
products have over-temperature protection. These prod-
ucts have an on-board temperature sensor that protects
the module’s internal circuitry against excessively high
temperatures. A rise in the internal temperature may be
the result of a drop in airflow, or a high ambient tem-
perature. If the internal temperature exceeds the OTP
threshold, the module’s Inhibit control is automatically
pulled low. This turns the output off. The output voltage
will drop as the external output capacitors are discharged
by the load circuit. The recovery is automatic, and be-
gins with a soft-start power up. It occurs when the the
sensed temperature decreases by about 10 °C below the
trip point.
Note: The over-temperature protection is a last resort mecha-
nism to prevent thermal stress to the regulator. Operation at
or close to the thermal shutdown temperature is not recom-
mended and will reduce the long-term reliability of the module.
Always operate the regulator within the specified Safe Operating
Area (SOA) limits for the worst-case conditions of ambient
temperature and airflow.
ATH10K12
Application Notes
ATH Series of Wide-Output Adjust
Power Modules (12-V Input)
North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662
Auto-Track™Function
The Auto-Track™ function is unique to the ATH family,
and is available with the all “Point-of-Load Alliance”
(POLA) products. Auto-Track™ was designed to simplify
the amount of circuitry required to make the output
voltage from each module power up and power down in
sequence. The sequencing of two or more supply voltages
during power up is a common requirement for complex
mixed-signal applications, that use dual-voltage VLSI ICs
such as DSPs, micro-processors, and ASICs.
How Auto-Track™ Works
Auto-Track™ works by forcing the module’s output voltage
to follow a voltage presented at the Track control pin. This
control range is limited to between 0 V and the module’s
set-point voltage. Once the track-pin voltage is raised
above the set-point voltage, the module’s output remains
at its set-point 1. As an example, if the Track pin of a 2.5-V
regulator is at 1 V, the regulated output will be 1 V. But
if the voltage at the Track pin rises to 3 V, the regulated
output will not go higher than 2.5 V.
When under track control, the regulated output from
the module follows the voltage at its Track pin on a volt-
for-volt basis. By connecting the Track pin of a number
of these modules together, the output voltages will fol-
low a common signal during power-up and power-down.
The control signal can be an externally generated master
ramp waveform, or the output voltage from another power
supply circuit 3. The Track control also incorporates an
internal RC charge circuit. This operates off the module’s
input voltage to produce a suitable rising waveform at
power up.
Typical Application
The basic implementation of Auto-Track™ allows for
simultaneous voltage sequencing of a number of Auto-
Track™ compliant modules. Connecting the Track control
pins of two or more modules forces the Track control of
all modules to follow the same collective RC ramp wave-
form, and allows them to be controlled through a single
transistor or switch; Q1 in Figure 3-4.
To initiate a power-up sequence, it is recommended that
the Track control be first pulled to ground potential.
This should be done at or before input power is applied
to the modules, and then held for at least 10 ms thereaf-
ter. This brief period gives the modules time to complete
their internal soft-start initialization. Applying a logic-
level high signal to the circuit’s On/Off Control turns
Q1 on and applies a ground signal to the Track pins. After
completing their internal soft-start intialization, the out-
put of all modules will remain at zero volts while Q1 is on.
10 ms after a valid input voltage has been applied to the
modules, Q1 may be turned off. This allows the track con-
trol voltage to automatically rise toward to the modules'
input voltage. During this period the output voltage of
each module will rise in unison with other modules, to its
respective set-point voltage.
Figure 3-5 shows the output voltage waveforms from the
circuit of Figure 3-4 after the On/Off Control is set from a
high to a low-level voltage. The waveforms, Vo1 and Vo2
represent the output voltages from the two power mod-
ules, U1 (3.3 V) and U2 (2.0 V) respectively. Vo1 and Vo2
are shown rising together to produce the desired simul-
taneous power-up characteristic.
The same circuit also provides a power-down sequence.
Power down is the reverse of power up, and is accom-
plished by lowering the track control voltage back to zero
volts. The important constraint is that a valid input voltage
must be maintained until the power down is complete. It
also requires that Q1 be turned off relatively slowly. This
is so that the Track control voltage does not fall faster than
Auto-Track's slew rate capability, which is 5 V/ms. The
components R1 and C1 in Figure 3-4 limit the rate at
which Q1 can pull down the Track control voltage. The
values of 100 k-ohm and 0.047 µF correlate to a decay
rate of about 0.6 V/ms.
The power-down sequence is initiated with a low-to-high
transition at the On/Off Control input to the circuit.
Figure 3-6 shows the power-down waveforms. As the
Track control voltage falls below the nominal set-point
voltage of each power module, then its output voltage
decays with all the other modules under Auto-Track™
control.
Notes on Use of Auto-Track™
1. The Track pin voltage must be allowed to rise above
the module’s set-point voltage before the module can
regulate at its adjusted set-point voltage.
2. The Auto-Track™ function will track almost any
voltage ramp during power up, and is compatible
with ramp speeds of up to 5 V/ms.
3. The absolute maximum voltage that may be applied
to the Track pin is Vin. The open-circuit voltage is
0.56 × V
in, or 7.5 VDC maximum.
4. The module will not follow a voltage at its Track control
input until it has completed its soft-start initialization.
This takes about 10 ms from the time that the module
has sensed that a valid voltage has been applied its input.
During this period, it is recommended that the Track
pin be held at ground potential.
5. Once its soft-start initialization is complete, the module
is capable of both sinking and sourcing current when
following the voltage at the Track pin.
6. The Auto-Track™ function can be disabled by
connecting the Track pin to the input voltage (Vin)
through a 1-kΩ resistor. When Auto-Track™ is
disabled, the output voltage will rise faster
following the application of input power.
**Auto-Track is a trademark of Texas Instruments, Inc.
Application Notes
ATH Series of Wide-Output Adjust
Power Modules (12-V Input)
North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662
Figure 3-5; Simultaneous Power Up with Auto-Track Control
PTH12010W
1
10
4
5
62
3
98
Track
V
IN
V
O
GNDInhibit
PTH12020W
1
10
4
5
62
3
98
Track
V
IN
V
O
GNDInhibit 7
C
OUT
+
C
OUT
+
C
IN
+
C
IN
+
Vo
2
=2V
Vo
1
=3.3V
U1
U2
+12V
0V
On/Off Control
1 = Power Down
0 = Power Up
Q1
BSS138
C1
0.047µF
R1
100k
R
2
2.0k
Ω
R
3
8k06
7
Figure 3-4; Sequenced Power Up & Power Down Using Auto-Track
Figure 3-6; Simultaneous Power Down with Auto-Track Control
Vo1 (1 V/Div)
Vo2 (1 V/Div)
On/Off Control
(5 V/Div)
HORIZ SCALE: 10 ms/Div
Vo1 (1V/Div)
Vo2 (1 V/Div)
On/Off Control
(5 V/Div)
HORIZ SCALE: 5 ms/Div
ATH18K12
ATH12K12
Application Notes
ATH Series of Wide-Output Adjust
Power Modules (12-V Input)
North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662
Margin Up/Down Controls
The ATH10 (10A), ATH12/15 (12/15A), ATH18/22 (18/
22A), and ATH26/30 (26/30A) products incorporate Margin
Up and Margin Down control inputs. These controls allow
the output voltage to be momentarily adjusted 1, either up
or down, by a nominal 5 %. This provides a convenient
method for dynamically testing the operation of the load
circuit over its supply margin or range. It can also be used to
verify the function of supply voltage supervisors. The
±5 % change is applied to the adjusted output voltage, as set
by the external resistor, Rset at the Vo Adjust pin.
The 5 % adjustment is made by pulling the appropriate
margin control input directly to the GND terminal 2.
A low-leakage open-drain device, such as an n-channel
MOSFET or p-channel JFET is recommended for this
purpose 3. Adjustments of less than 5 % can also be accom-
modated by adding series resistors to the control inputs
(See Figure 3-4). The value of the resistor can be selected
from Table 3-2, or calculated using the following formula.
Up/Down Adjust Resistance Calculation
To reduce the margin adjustment to something less than
5 %, series resistors are required (See RD and RU in
Figure 3-7). For the same amount of adjustment, the
resistor value calculated for RU and RD will be the same.
The formulas is as follows.
RU or RD= 499 – 99.8 kΩ
∆%
Where ∆% = The desired amount of margin adjust in
percent.
Notes:
1. The Margin Up* and Margin Dn* controls were not
intended to be activated simultaneously. If they are
their affects on the output voltage may not completely
cancel, resulting in the possibility of a slightly higher
error in the output voltage set point.
2. The ground reference should be a direct connection to
the module GND at pin 7 (pin 1 for the ATH06).
This will produce a more accurate adjustment at the
load circuit terminals. The transistors Q1 and Q2 should
be located close to the regulator.
3. The Margin Up and Margin Dn control inputs are not
compatible with devices that source voltage. This includes
TTL logic. These are analog inputs and should only be
controlled with a true open-drain device (preferably
a discrete MOSFET transistor). The device selected
should have low off-state leakage current. Each input
sources 8 µA when grounded, and has an open-circuit
voltage of 0.8 V.
Figure 3-7; Margin Up/Down Application Schematic
Table 3-2; Margin Up/Down Resistor Values
% Adjust RU / RD
5 0.0 kΩ
4 24.9 kΩ
3 66.5 kΩ
2 150.0 kΩ
1 397.0 kΩ
C
out
+
C
in
V
IN
GND
MargDn
L
O
A
D
Q
2
+V
OUT
Q
1
+
MargUp
0V
+V
o
R
D
R
U
PTH05010W
(Top View)
1
2
10 9 8
7
6
543
GND
R
SET
0.1 W, 1 %
ATH15T05
Through Hole Termination
Surface Mount Termination
