Crystal oscillator Product Number (please contact us) EG-2121CA: Q3805CAx0xxxx00 : X1M000101xxxx00 EG-2102CA: Q3806CA00xxxx00 : X1M000091xxxx00 LOW-JITTER SAW OSCILLATOR (SPSO) OUTPUT : LV-PECL, LVDS, HCSL EG - 2121 / 2102CA Frequency range Supply voltage : : : Output : Function : External dimensions : 53.125 MHz to 700 MHz 2.5 V EG-2121CA 3.3 V EG-2102CA LV-PECL or LVDS or HCSL Output enable (OE) 7.0 x 5.0 x 1.2 mm Actual size Very low jitter and low phase noise by SAW unit. EG-2121CA EG-2102CA Specifications (characteristics) Differential LV-PECL Output Item Output frequency range Supply voltage Storage temperature Operating temperature Frequency tolerance Current consumption Disable current Symmetry Symbol f0 VCC T_stg T_use f_tol ICC I_dis SYM VOH Output voltage VOL Output load condition (ECL) Input voltage Rise time / Fall time Start-up time Phase Jitter L_ECL VIH VIL tr / tf t_str tPJ Frequency aging f_aging EG-2121CA EG-2102CA LV-PECL 53.125 MHz to 500 MHz 100 MHz to 700 MHz 2.5 V 0.125 V 3.3 V 0.3 V -40 C to +100 C P:0 C to +70 C ,R:-5 C to +85 C ,S:-20 C to +70 C G: 50 10-6 ,H: 100 10-6 80 mA Max. 100 mA Max. 20 mA Max. 32 mA Max P:40 % to 60 % (f0 > 350 MHz) P:45 % to 55 % P:45 % to 55 % (f0 350 MHz) D:48 % to 52 % D:48 % to 52 % (f0 350 MHz) (f0 175 MHz) 2.35 V Typ. 1.55 V Typ. VCC-1.025 V to VCC-0.88 V 0.8 V Typ. 1.6 V Typ. VCC-1.81 V to VCC-1.62 V 50 70 % VCC Min. 30 % VCC Max. 400 ps Max. 10 ms Max. 0.8 ps Max. 0.5 ps Max. 0.3 ps Max. 10 10-6 / year Max. Conditions / Remarks Please contact us about available frequencies. Storage as single product. OE=VCC, L_ECL=50 OE=GND at outputs crossing point DC characteristics Terminated to VCC -2.0 V OE terminal Between 20% and 80% of (VOH-VOL) Time at minimum supply voltage to be 0 s f0 100 MHz Offset frequency: 12 kHz to 100 MHz f0 200 MHz 20 MHz 200 MHz f0 +25 C, First year, VCC=2.5 V,3.3 V LVDS Output VOD dVOD VOS dVOS L_LVDS VIH VIL EG-2102CA LVDS 53.125 MHz to 700 MHz 2.5 V 0.125 V 3.3 V 0.3 V -40 C to +100 C P:0 C to +70 C ,R:-5 C to +85 C ,S:-20 C to +70 C G: 50 10-6 ,H: 100 10-6 30 mA Max 45 mA Max. 20 mA Max 30 mA Max. L:40 % to 60 % L:40 % to 60 % (f0 > 350 MHz) (f0 > 350 MHz) L:45 % to 55 % L:45 % to 55 % (f0 350 MHz) (f0 350 MHz) V:48 % to 52 % V:48 % to 52 % (f0 175 MHz) (f0 175 MHz) 350 mV Typ. 247 mV to 454 mV 50 mV Max. 1.25 V Typ. 1.125 V to 1.375 V 150 mV Max. 100 70 % VCC Min. 30 % VCC Max. Rise time / Fall time tr / tf 400 ps Max. Start-up time t_str Phase Jitter tPJ 10 ms Max. 0.8 ps Max. 0.5 ps Max. 0.3 ps Max. 10 10-6 / year Max. Item Output frequency range Supply voltage Storage temperature Operating temperature Frequency tolerance Current consumption Disable current Symmetry Output voltage Output load condition (LVDS) Input voltage Frequency aging Symbol f0 VCC T_stg T_use f_tol ICC I_dis SYM f_aging EG-2121CA Conditions / Remarks Please contact us about available frequencies. Storage as single product. OE=VCC, L_LVDS= 100 OE=GND at outputs crossing point VOD1, VOD2 dVOD = VOD1-VOD2 DC characteristics VOS1, VOS2 dVOS = VOS1-VOS2 Connected between OUT to OUT OE terminal Between 20 % and 80 %of Differential Output Peak to Peak voltage Time at minimum supply voltage to be 0 s f0 100 MHz Offset frequency: 12 kHz to 100 MHz f0 200 MHz 20 MHz 200 MHz f0 +25 C, First year, VCC=2.5 V,3.3 V Crystal oscillator HCSL Output Item Symbol Output frequency range Supply voltage Storage temperature Operating temperature Frequency tolerance Current consumption Disable current Symmetry f0 VCC T_stg T_use f_tol ICC I_dis SYM VOH VOL L_HCSL VIH VIL tr / tf t_str Output Voltage Output load condition (HCSL) Input voltage Rise time / Fall time Start-up time Phase Jitter tPJ Frequency aging *2 f_aging EG-2121CA EG-2102CA HCSL 100 MHz to 350 MHz 2.5 V 0.125 V 3.3 V 0.3 V -40 C to +125 C P:0 C to +70 C ,R:-5 C to +85 C ,S:-20 C to +70 C G: 50 10-6 ,H: 100 10-6 80 mA Max. 85 mA Max. 20 mA Max. 35 mA Max 45 % to 55 % 0.75 V Typ. -0.3 V Typ. 50 70 % VCC Min. 30 % VCC Max. 500 ps Max. 10 ms Max. 0.8 ps Max. 0.5 ps Max. 0.3 ps Max. 10 10-6 / year Max. Conditions / Remarks Please contact us about available frequencies. Storage as single product. OE=VCC,L_HCSL=50 OE=GND at outputs crossing point DC characteristics Terminated to GND OE terminal Between 0.175 V and 0.525 V of output Time at minimum supply voltage to be 0 s f0 100 MHz Offset frequency: 12 kHz to 100 MHz f0 200 MHz 20 MHz 200 MHz f0 +25 C, First year, VCC=2.5 V,3.3 V EG-2121 CA 250.000000MHz P G P A Product Name (Standard form) Model Package type Frequency Output/Symmetry Frequency tolerance Operating temperature Frequency aging (A*1: Frequency tolerance include aging, N*2: Frequency tolerance exclude aging) *1 This includes initial frequency tolerance, temperature variation, supply voltage variation, reflow drift, and aging(+25 C,10 years). *2 This includes initial frequency tolerance, temperature variation, supply voltage variation, and reflow drift(except aging). (: GRA, GSA are not available) (: As for LV-PECL and LVDS output, for 53.125 MHz f0 < 100 MHz only HP is available) Output Symbol Table 2 P LV-PECL D LV-PECL L LVDS V H LVDS HCSL Symmetry EG-2121CA EG-2102CA 40 % to 60 %(f0 > 350 MHz) 45 % to 55 % 45 % to 55 %(f0 350 MHz) 48 % to 52 %(f0 175 MHz) 48 % to 52 %(f0 350 MHz) 40 % to 60 %(f0 > 350 MHz) 45 % to 55 %(f0 350 MHz) 48 % to 52 %(f0 175 MHz) 45 % to 55 % Frequency tolerance G H 50 x 10-6 100 x 10-6 Operating temperature P 0 to +70C R -5 to +85C S -20 to +70C Jitter Item Symbol Specifications Remarks tDJ 0.2 ps Typ. Deterministic Jitter tRJ 3 ps Typ. Random Jitter tRMS 3 ps Typ. (RMS of total distribution) Jitter * tp-p 25 ps Typ. Peak to Peak tacc 4 ps Typ. Accumulated Jitter() n=2 to 50000 cycles * Tested using a DTS-2075 Digital timing system made by WAVECREST with jitter analysis software VISI6. : Differential LV-PECL, LVDS output * Based on SIA-3100C signal integrity analyzer made from WAVECREST. : HCSL output External dimensions #1 #2 #6 1.1 #5 #3 #3 7.00.2 2.54 #2 #1 (Unit:mm) 1.6 1.5 3.9 E EG-2121 250.000H GPA 282A 1.4 #4 #4 Footprint (Recommended) 2.6 #5 5.00.2 #6 (Unit:mm) 1.20.2 5.08 5.08 OE pin = HIGH : Specified frequency output. OE pin = LOW : Output is high impedance Pin map Pin Connection 1 OE 2 N.C. 3 GND 4 OUT 5 OUT 6 VCC #3 is connected to the cover. 2.54 5.08 To maintain stable operation, provide a 0.01uF to 0.1uF by-pass capacitor at a location as near as possible to the power source terminal of the crystal product (between Vcc - GND). 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