Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. Motorola's ColdFire MCF5407 Integrated Microprocessor (R) The MCF5407 integrated microprocessor processor bus bandwidth requirements builds on the success of the award are greatly reduced, while still achieving winning(1) MCF5307 device by combining outstanding levels of system performance. its peripheral set with the high performance The MCF5407 device's significant Version 4 (V4) ColdFire core, achieving a performance increase represents more 233 Dhrystone 2.1 MIPS performance than three times the performance and level at 162MHz. The fine-tuned twice the system efficiency of any capabilities of the single pipeline in the previous ColdFire standard product, V4 Harvard microarchitecture deliver an providing a compelling migration path for amazingly efficient 1.44 MIPS/MHz existing ColdFire designs. In addition, without the additional cost of a second the MCF5407 product offers an exciting pipeline. With this outstanding roadmap for users of the MC68EC040 performance level, code compatibility, and MC68EC060, offering more than and well received integration, the twice the performance of the 68EC060 MCF5407 processor maximises value and a broad array of integration that is for a broad range of embedded not available on either device, all at a applications while decreasing overall fraction of the price. time to market. Integrated Peripherals High System Performance To accelerate system design and reduce RISC architectures have traditionally system cost, the MCF5407 processor favoured performance at the expense of offers a rich array of memory and code density. To improve code density, peripheral integration in an award- many architectures offer a front-end winning(1) combination. Features add-on to support compressed instruction common to many embedded applications, formats, but performance suffers. The such as DMAs, Timers, an SDRAM V4 ColdFire core hits the "sweet spot" interface, UART and USART and on-chip in this tradeoff. With the excellent code memories are integrated cost-effectively density of the ColdFire architecture, using aggressive process technologies. For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. Fast Time to Market The MCF5407 product extends the successful 68K family by providing a compatible environment for 68K and ColdFire microprocessor customers allowing leverage of world-class third-party development tools, software and programmer familiarity. In fact, customers moving from 68K to ColdFire microprocessors can use code translation and emulation tools free of charge, and subject to a licensing agreement, to facilitate modifying and reusing 68K assembly. The package, pinout and integration mix of the MCF5407 processor create an extremely * Integrated Processor - DRAM Controller: (glueless interface to SDRAM, FPM and EDO) - 1 UART, 1 synchronous UART - Four fully programmable DMA Channels - Eight Chip Selects - 16-bit General Purpose I/O - Two 16-bit Timers - I2 C module - System Integration (PLL, SW Watchdog) * Doze Mode & Variable frequency operation. Product Specifications simple pin-to-pin compatible upgrade * 233 Dhrystone 2.1 MIPS at 162 MHz. with three times the performance for * 0-70C operating temperature. current MCF5307 device designs. * Implemented in 0.22m, QLM. By delivering on the development * Requires 1.8V and 3.3V power supply. Contact Information: roadmap for the 100% synthesizable * 208-pin plastic QFP package. Motorola offers user's manuals, product ColdFire family, Motorola provides * Pin compatible with MCF5307 briefs and application notes for all of its ColdFire microprocessors. In addition, local support is also provided for these products. This information can be found at http://www.motorola.com/ColdFire room to grow and powerful new capabilities to designers eager to create new classes of electronic products, while leveraging their previous investments. Customer Response Center at: 800-521-6274 or http://www.motorola.com/semiconductors 16 K Instruction Cache V4 I Addr Gen I Fetch 1 I Fetch 2 For all other inquiries about Motorola products, please contact the Motorola (note voltage and timing changes). Features * V4 ColdFire processor core with Harvard memory architecture and branch cache acceleration logic - Limited superscalar design 2K SRAM Instr Buf 2K SRAM UART/ USART - Enhanced instruction set Dec&Sel Op Addr Gen Op Fetch 1 Op Fetch 2 System Bus Controller DRAM Cntr & Chip Selects Interrupt Ctr 2 Timers Execute General Purpose I/O 4 DMAs MAC H/W Divide I2C JTAG Debug Module PLL - Fully code compatible with Version 2 & 3 ColdFire processor core IEDecode 8K Data Cache * 16K Instruction-cache, 8K data-cache. * 4KByte SRAM. * Multiply Accumulate (MAC) with integer and fractional capabilities. * Industry leading debug module offering both background and real 2001 Motorola, Inc. All rights reserved. Motorola, M and ColdFire are registered trademarks of Motorola, Inc. All other names, products and services are trademarks or registered trademarks of their respective holders. This document contains information on a new product under development. Specifications and information herein are subject to change without notice. For More Information On This Product, time capability. Go to: www.freescale.com (1) The * Hardware integer divide unit. MCF5307 won the Editor's Choice Award for "1998 Microprocessor of the Year" from Microprocessor report.