 
    
SCLS108D − DECEMBER 1982 − REVISED SEPTEMBER 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DTargeted Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
DWide Operating Voltage Range of 2 V to 6 V
DOutputs Can Drive Up To 10 LSTTL Loads
DLow Power Consumption, 80-µA Max ICC
DTypical tpd = 10 ns
D±4-mA Output Drive at 5 V
DLow Input Current of 1 µA Max
DIncorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
description/ordering information
The ’HC139 devices are designed for
high-performance memory-decoding or
data-routing applications requiring very short
propagation delay times. In high-performance
memory systems, these decoders can minimize
the effects of system decoding. When employed
with high-speed memories utilizing a fast enable
circuit, the delay time of these decoders and the
enable time of the memory usually are less than
the typical access time of the memory. This means
that the effective system delay introduced by the
decoders is negligible.
ORDERING INFORMATION
TAPACKAGEPACKAGEORDERABLE
PART NUMBER TOP-SIDE
MARKING
PDIP − N Tube of 25 SN74HC139N SN74HC139N
Tube of 40 SN74HC139D
SOIC − D Reel of 2500 SN74HC139DR HC139
SOIC − D
Reel of 250 SN74HC139DT
HC139
−40°C to 85°CSOP − NS Reel of 2000 SN74HC139NSR HC139
−40 C to 85 C
SSOP − DB Reel of 2000 SN74HC139DBR HC139
Tube of 90 SN74HC139PW
TSSOP − PW Reel of 2000 SN74HC139PWR HC139
TSSOP − PW
Reel of 250 SN74HC139PWT
HC139
CDIP − J Tube of 25 SNJ54HC139J SNJ54HC139J
−55°C to 125°CCFP − W Tube of 150 SNJ54HC139W SNJ54HC139W
−55 C to 125 C
LCCC − FK Tube of 55 SNJ54HC139FK SNJ54HC139FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o
f
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
3212019
910111213
4
5
6
7
8
18
17
16
15
14
2A
2B
NC
2Y0
2Y1
1B
1Y0
NC
1Y1
1Y2
1A
1G
NC
2Y3
2Y2 V
2G
1Y3
GND
NC
SN54HC139 . . . FK PACKAGE
(TOP VIEW)
CC
NC − No internal connection
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1G
1A
1B
1Y0
1Y1
1Y2
1Y3
GND
VCC
2G
2A
2B
2Y0
2Y1
2Y2
2Y3
SN54HC139 ...J OR W PACKAGE
SN74HC139 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
Copyright 2003, Texas Instruments Incorporated
  !"# $ %&'# "$  (&)*%"# +"#',
+&%#$ %! # $('%%"#$ (' #-' #'!$  '."$ $#&!'#$
$#"+"+ /""#0, +&%# (%'$$1 +'$ # '%'$$"*0 %*&+'
#'$#1  "** (""!'#'$,
 (+&%#$ %!(*"# # 23 "** (""!'#'$ "' #'$#'+
&*'$$ #-'/$' #'+,  "** #-' (+&%#$ (+&%#
(%'$$1 +'$ # '%'$$"*0 %*&+' #'$#1  "** (""!'#'$,
 
    
SCLS108D − DECEMBER 1982 − REVISED SEPTEMBER 2003
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description/ordering information (continued)
The ’HC139 devices comprise two individual 2-line to 4-line decoders in a single package. The active-low enable
(G) input can be used as a data line in demultiplexing applications. These decoders/demultiplexers feature fully
buffered inputs, each of which represents only one normalized load to its driving circuit.
FUNCTION TABLE
INPUTS
OUTPUTS
G
SELECT
OUTPUTS
GB A Y0 Y1 Y2 Y3
H X X H H H H
L L LLHHH
L L HHLHH
L H LHHLH
L H H H H H L
logic diagram (positive logic)
1G
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
1A
1B
2G
2A
2B
Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages.
1
2
3
15
14
13
4
5
6
7
12
11
10
9
 
    
SCLS108D − DECEMBER 1982 − REVISED SEPTEMBER 2003
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): D package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package 82°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 64°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 108°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HC139 SN74HC139
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 2 5 6 2 5 6 V
VCC = 2 V 1.5 1.5
V
IH
High-level input voltage VCC = 4.5 V 3.15 3.15 V
VIH
High-level input voltage
VCC = 6 V 4.2 4.2
V
VCC = 2 V 0.5 0.5
V
IL
Low-level input voltage VCC = 4.5 V 1.35 1.35 V
VIL
Low-level input voltage
VCC = 6 V 1.8 1.8
V
VIInput voltage 0 VCC 0 VCC V
VOOutput voltage 0 VCC 0 VCC V
VCC = 2 V 1000 1000
t/vInput transition rise/fall time VCC = 4.5 V 500 500 ns
t/v
Input transition rise/fall time
VCC = 6 V 400 400
ns
TAOperating free-air temperature −55 125 −40 85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
 
    
SCLS108D − DECEMBER 1982 − REVISED SEPTEMBER 2003
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VCC
TA = 25°C SN54HC139 SN74HC139
UNIT
PARAMETER
V
CC MIN TYP MAX MIN MAX MIN MAX
UNIT
2 V 1.9 1.998 1.9 1.9
I
OH
= −20 µA4.5 V 4.4 4.499 4.4 4.4
V
OH
V
I
= V
IH
or V
IL
IOH = −20 µA
6 V 5.9 5.999 5.9 5.9 V
VOH
VI = VIH or VIL
IOH = −4 mA 4.5 V 3.98 4.3 3.7 3.84
V
IOH = −5.2 mA 6 V 5.48 5.8 5.2 5.34
2 V 0.002 0.1 0.1 0.1
I
OL
= 20 µA4.5 V 0.001 0.1 0.1 0.1
V
OL
V
I
= V
IH
or V
IL
IOL = 20 µA
6 V 0.001 0.1 0.1 0.1 V
VOL
VI = VIH or VIL
IOL = 4 mA 4.5 V 0.17 0.26 0.4 0.33
V
IOL = 5.2 mA 6 V 0.15 0.26 0.4 0.33
IIVI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA
ICC VI = VCC or 0, IO = 0 6 V 8 160 80 µA
Ci2 V to 6 V 3 10 10 10 pF
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
VCC
TA = 25°C SN54HC139 SN74HC139
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
V
CC MIN TYP MAX MIN MAX MIN MAX
UNIT
2 V 47 175 255 220
A or B Y4.5 V 14 35 51 44
tpd
A or B
Y
6 V 12 30 44 38
ns
tpd 2 V 39 175 255 220 ns
G Y 4.5 V 11 35 51 44
G
Y
6 V 10 30 44 38
2 V 38 75 110 95
t
t
Y4.5 V 8 15 22 19 ns
tt
Y
6 V 6 13 19 16
ns
operating characteristics, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance per decoder No load 25 pF
 
    
SCLS108D − DECEMBER 1982 − REVISED SEPTEMBER 2003
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
50%50% 10%10% 90% 90% VCC
0 V
trtf
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
50%
50%50% 10%10% 90% 90%
V
CC
VOH
VOL
0 V
trtf
Input
In-Phase
Output
50%
tPLH tPHL
50% 50%
10% 10% 90%90% VOH
VOL
tr
tf
tPHL tPLH
Out-of-Phase
Output
Test
Point
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR 1 MHz, ZO = 50 , tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
D. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
84092012A ACTIVE LCCC FK 20 1 None Call TI Level-NC-NC-NC
8409201EA ACTIVE CDIP J 16 1 None Call TI Level-NC-NC-NC
8409201FA ACTIVE CFP W 16 1 None Call TI Level-NC-NC-NC
JM38510/65803BEA ACTIVE CDIP J 16 1 None Call TI Level-NC-NC-NC
JM38510/65803BFA ACTIVE CFP W 16 1 None Call TI Level-NC-NC-NC
SN54HC139J ACTIVE CDIP J 16 1 None Call TI Level-NC-NC-NC
SN74HC139D ACTIVE SOIC D 16 40 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74HC139DBR ACTIVE SSOP DB 16 2000 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74HC139DR ACTIVE SOIC D 16 2500 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74HC139DT ACTIVE SOIC D 16 250 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74HC139N ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU Level-NC-NC-NC
SN74HC139N3 OBSOLETE PDIP N 16 None Call TI Call TI
SN74HC139NSR ACTIVE SO NS 16 2000 Pb-Free
(RoHS) CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74HC139PW ACTIVE TSSOP PW 16 90 Pb-Free
(RoHS) CU NIPDAU Level-1-250C-UNLIM
SN74HC139PWLE OBSOLETE TSSOP PW 16 None Call TI Call TI
SN74HC139PWR ACTIVE TSSOP PW 16 2000 Pb-Free
(RoHS) CU NIPDAU Level-1-250C-UNLIM
SN74HC139PWT ACTIVE TSSOP PW 16 250 Pb-Free
(RoHS) CU NIPDAU Level-1-250C-UNLIM
SNJ54HC139FK ACTIVE LCCC FK 20 1 None Call TI Level-NC-NC-NC
SNJ54HC139J ACTIVE CDIP J 16 1 None Call TI Level-NC-NC-NC
SNJ54HC139W ACTIVE CFP W 16 1 None Call TI Level-NC-NC-NC
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 28-Feb-2005
Addendum-Page 1
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 28-Feb-2005
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
4040140/D 10/96
28 TERMINAL SHOWN
B
0.358
(9,09)
MAX
(11,63)
0.560
(14,22)
0.560
0.458
0.858
(21,8)
1.063
(27,0)
(14,22)
A
NO. OF
MINMAX
0.358
0.660
0.761
0.458
0.342
(8,69)
MIN
(11,23)
(16,26)
0.640
0.739
0.442
(9,09)
(11,63)
(16,76)
0.962
1.165
(23,83)
0.938
(28,99)
1.141
(24,43)
(29,59)
(19,32)(18,78)
**
20
28
52
44
68
84
0.020 (0,51)
TERMINALS
0.080 (2,03)
0.064 (1,63)
(7,80)
0.307
(10,31)
0.406
(12,58)
0.495
(12,58)
0.495
(21,6)
0.850
(26,6)
1.047
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.035 (0,89)
0.010 (0,25)
12
1314151618 17
11
10
8
9
7
5
432
0.020 (0,51)
0.010 (0,25)
6
12826 27
19
21
B SQ
A SQ 22
23
24
25
20
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65 M
0,10
0,10
0,25
0,50
0,75
0,15 NOM
Gage Plane
28
9,80
9,60
24
7,90
7,70
2016
6,60
6,40
4040064/F 01/97
0,30
6,60
6,20
80,19
4,30
4,50
7
0,15
14
A
1
1,20 MAX
14
5,10
4,90
8
3,10
2,90
A MAX
A MIN
DIM PINS **
0,05
4,90
5,10
Seating Plane
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
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and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
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