19/07 '00 11:42 FAX 44 1276 803 298 LI(- 66l TECH. SUPPORT 002 pra Am26LS32/Am26LS33 Quad Differential Line Receivers cl Advanced Micro Devices [WD DISTINCTIVE CHARACTERISTICS @ Input voltage range of 15 V (differential or common mode) on Am26LS33; 7 V (differential or common mode) on Am26LS32 200 mV sensitivity over the input voltage range @ The Am26LS32 meets all the requirements of RS-422 and RS-423 @ Operation from single +5 V supply @ Fall safe input-output relationship. Output on Am261.S32; always high when Inputs are open 500 mV sensitivity on Am26LS33 @ Three-state drive, with choice of complemen- @ 6K minimum input Impedance with 30 mV Inpu tary output enables, for receiving directly onto hysteresis : a data bus GENERAL DESCRIPTION The Am26L$32 is a quad line receiver designed to meet the requirements of RS-422 and RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission. The Am26LS32 features an input sensitivity of 200 mV over the input voltage range of +7 V. The Am26LS33 features an input sensitivity of 500 mV over the input voltage range of +15 V. The Am261L.S32 and Am26LS33 provide an enable and disable function common to allfourreceivers. Both parts feature 3-state outputs with 8 MA sink capability and in- corporate a fait safe input-output relationship which keeps the outputs high when the inputs are open. The Am26LS32 and Am26LS33 are constructed using Advanced Low-Power Schotiky processing. BLOCK DIAGRAM ENABLE ENABLE INo+ IND~ INc+ INc- INe. INB- INas INA- raBRA GND Vcc Output D Output C Output B Output A 05393C-1 RELATED AMD PRODUCTS Part No. Description 26LS29 Quad Three-State Single Ended RS-423 Line Driver 26LS30 Dual Ditferential RS-422 Party Line/Quad Single Ended RS-423 Line Driver 26LS31 Quad High Speed Differential Line Driver Publication 05393 Rev. Cc Amendment 0 fssue Date: September 109319/07 00 11:42 FAX 44 1276 803 298 TECH. SUPPORT il amp CONNECTION DIAGRAMS Top View DIP . NS Input {A 16/1) vee nputs AQ 2 F peo Output A TFS 1H Enable OF) 437 Output B Output Fe 21) Enable cr Output D pus of 7 1 7 } ous eno Cis 05393C-2 PLCC < < ad 3 eo zee 3.2 1 20 19 eo . Output A []] 4 18] ]Input B+ ENABLE [] 5 17] Output B _ nef} 6 16] ]NC Output C [J 7 15] JENABLE Input C+ [} 8 141] Output D 9 10 11 12 13 d 2 Zad 2 a2 Note: Pin 1 is marked for orientation. 053930-3 2 Am26LS32/Am26LS33AMD zt ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number {Valid Combination) is formed by a combination of: AM26LS32/ AM26LS33 Cc B - . ] 7 | OPTIONAL PROCESSING Blank = Standard Processing B = Burn-in TEMPERATURE RANGE CG = Commercial (0C to +70C) M Military (-55C to +125C) $$$ $=. PACKAGE TYPE P = 16-Pin Plastic DIP (PD 016) . D = 16-Pin Caramic DIP (CD 016) - S = 16-Pin Small Outline (SO 016) SPEED OPTION Not Applicabie DEVICE NUMBER/DESCAIPTION Am26LS32/Am26LS33 Quad Differential Line Receivers Valld Combinations Valid Combinations AM26LS32__| PC, PCB, DC, DCB, Valid Combinations list configurations planned to be AM26LS33 C, DMB, JC supported in volume for this device. Consutt the local AMD sales otfice to confirm availability of specific valid combinations and to check on newly released combinations. Am26LS32/Am26LS33 LaOddAS *HOHL 86 08 SLcl FR XVA oP-TT OO. 0/61T19/07 00 11:43 FAX 44 1276 803 298 TECH. SUPPORT ct AMD ABSOLUTE MAXIMUM RATINGS OPERATING RANGES Supply Voltage ........0 62 -e erent eee: 7.0V Commercial (C) Devices Common Mode Range ......----sseerreee +25V Temperatura ..-....---+ s+ eres 0C to +70C Differential input Voltage ....---- 6 eee eee +25 V Supply Vollage .....--+-.-- +4.75 V to +6.25 V Enable Vottage .......:seeee errr errttee 7.0V Military (M) Devices Output Sink Current... -- 6. +e ee eee eee 50 mA Temperature .......-0.05 65 -55C to +125C Storage Temperature Range ....- -65C to +165C Supply Voltage ....--------.+ +4.5 Vito +5.5 V @ Stresses above those listed under Absolute Maximum Rat- Operating ranges define those limits between which the func- ings may cause permanent device failure. Functionality at or tionality of the device is guaranteed. above these limits is not implied. Exposure to absolute maxi- mum ratings for extended periods may affect device reliability. DC CHARACTERISTICS over operating ranges unless otherwise specified Parameter Typ. Symbol | Parameter Description Test Conditions Min | (Note 1) | Max | Unit VIH Differential input Voltage =| Vout = Voi or: | Am26LS32, -7 Vs 0.2 | +0.06 | +02 VoH(Note5) LYM S+ZV V Am26LS33, -15 Vs ~O.5 | 40.12 | +05 Vom <+15 V Rin Input Resistance -15V< Voms+15V 6.0 9.8 kQ (Ona input AC ground} (Note 4) lin Input Current (Under Test) Vin = +15 V, Other input -15 Vs Vine +15 V | | 2.3 | mA ln Input Current (Under Test) Vin = -15 V, Other Input -15 V < Vins +15 V -2.8 | mA VoH Output HIGH Voltage Voc = Min, AVIN = +1.0 V COM'L 2.7 3.4 VERABIE = 0.8 V, lon =~440pA | MIL 25 | 34 V VoL Output LOW Voltage _ Voc = Min, AVIN = -1.0 V lo. = 4.0 mA 0.4 VENABLE = 0.8 V lo. = 8.0 mA 0.45 v Vit Enable LOW Voltage (Note 2) 0.8 Vv Vi Enable HIGH Voltage (Note 2) 2.0 V Vic Enable Clamp Voltage Vec = Min, in =-18 mA -15 | V lo Off-State (High Impedance) Veco = Max Vo=2.4V 20 Output Current Vo=0.4V -20 | 2A a Enable LOW Current Vin = 0.4 V, Voc = Max 0.2 |-036} mA IH Enable HIGH Current Vin = 2.7 V, Voc = Max 20 pA h Enable Input High Current Vin = 5.5 V, Vcc = Max 100 | pA Isc Output Short Circuit Current Vo = 0 V, Vcc = Max, AVIN = +1.0 V -15 50 -85 | mA (Note 3) Icc Power Supply Current Voc = Max, All Vin = GND, 52 70 mA Outputs Disabled VHYST Input Hysteresis Ta = 25C, Voc = 5.0 V, Vome OV 30 mV Notes: 1. All typical values are Voc = 5.0 V, Ta = 25C. @ 2. Input thresholds are tested during DC tests and may be done in combination with testing of other DC parameters. 3. Not more than one output should be shorted at a time. Duration of short circuit test should not exceed one second. 4. Fin is not directly tested but is correlated. (See Attachment |} 5. input voltage is not tested directly due to tester accuracy limitation but is threshold correlated. (See Attachment Il) 4 Am26LS32/Am26LS33 BaneAMD a SWITCHING CHARACTERISTICS Parameter Typ. Symboi | Parameter Description Test Conditions Min | (Note 1) | Max | Unit AC Parameters (Ta = +25C) tPLH Propagation Delay From Ci 15 pF, ALi = 5 kQ, Pr2 = 2 kez, 17 25 ns Input to Output Vcc = 5.0 . {PHL Propagation Delay From Cu 15 pF, Ru = 5 kQ, Ri2 = 2 ke, 17 25 ns Input to Output Vec = 5.0 tz Enable te Output Voc = 5.0, CL5 pF, Rui = 5 ko, 20 30 ns Pi2 2 2kQ tHZ Enable to Output Vec = 5.0, CL 5 pF, Rui = 5 ka, 15 22 ns Riz = 2kQ 2 Enable to Output Voc = 5.0, CL 15 pF, Pir = 5 kQ, 15 22 ns Ri2 = 2k tzH Enable to Output Vee = 5.0, C1 15 pF, Rui = 5 kQ, 15 22 ns Riz = 2kQ AC Parameters (-55C to +125C) tPLH Propagation Delay From Cr 15 pF, Rui = 5 kQ, 23 38 ns Input to Output Ri2 = 2kQ, tPHL Propagation Delay From Cx 15 pF, Rui = kQ, 22 38 ns Input to Output Riz = 2 kQ tPZH Propagation Delay From Cu 15 pF, Ris = 5 kQ, 17 33 ns Enable to Output Ri2 = 2kaQ tPZL Propagation Delay From Cu 15 pF, Rui = 5 kQ, 25 33 ns Enable to Output Ri2 = 2kQ tPHZ Propagation Delay From CuS pF, Rui = 5 kQ, 18 33 ns Enable to Output Ri2 = 2kQ tPLZ Propagation Delay From C.5 pF, Aus = 5 kQ, 24 45 ns . | Enable to Output Ri2 =2kQ Tristate Delays for Enable (Ta = +25C) tPZH Propagation Delay From Ci 15 pF, Rit = 5 kQ, 16 32 ns Enable te Output Riz = 2 kn {PZ Propagation Delay From Cu 15 pF, Rit = 5 kQ, 23 33 ns Enable to Output At2 = 2kQ tPHZ Propagation Delay From Ci 5 pF, Ri = 5 kQ, 14 24 ns Enable to Output Riz = 2kaQ tPLZ Propagation Delay From C_S5 pF, Ru = 5 kQ, 14 32 ns Enable to Output Ri2 = 2kQ Tristate Delays for Enable (-55C to +125C) tPZH Propagation Delay From Ci 15 pF, Ri = kQ, 23 48 ns Enable to Output Ri2 = 2k {PZL Propagation Delay Fram Cu 15 pF, Rui = 5 kQ, 35 50 ns Enable to Output Pu2 = 2kQ tPHZ Propagation Delay Fram CL 5 pF, Rit = 5 kQ, 20 36 | ns Enable to Output Ruz = 2k triz Propagation Delay From CLS pF, Pui = 5 kQ, 22 48 | ns Enable to Output Fiz = 2k __ Note: 1. All typical values are Vec = 5.0 V, Ta = 25C. 5 Am26L$32/Am26LS33 LYOddNS *HOUL 86 08 OLeT PE XVA CV:TT OO, 40/6T19/07 00 11:44 FAX 44 1276 803 298 cl AMD TECH. SUPPORT KEY TO SWITCHING WAVEFORMS WAVEFORM INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from H to L from H to L May Will Be Change Changing fram Lio H from L to H Dont Care, Changing, Any Change State Permitted Unknown Does Not Center Apply Line is High impedance On State KS000010 SWITCHING WAVEFORMS VoH Output # \- 13V VoL tPLH Rot tPHL Opposite Phase +25 V Input Transition \ OV . -2.5V 053930-4 Propagation Delay (Notes 1 and 3) Enable __ 3.0V input 13V ov eet output ~4.5V 0.5V lui ~ Normally 5 poo 13V tSV Low Fe Var _ {ZH zl i Output VOH Normally 6, Open 7 13 V 15V Hig ~0oV O5V 05393C-5 Enable and Disable Times (Notes 2 and 3) Notes: 1, Diagram shown tor ENABLE LOW. 2. S; and S2 of Load Circuit are closed except where shown. 3. Pulse Generator for All Pulses: Rate < 1.0 MHz; 2p = 50 2; tr< 15 ns; trs 6.0 ns. 6 Am26LS32/Am26LS33AMD ot SWITCHING TEST CIRCUIT FOR THREE-STATE OUTPUTS Test Point Voc From Output 2 We , | 9 Under Test All Diode Prolte nad dig XZ iNo16 or Capacitance 1N3064 Sz | 053930-6 Am26L$32/AM26LS33 7 800 LYOddnsS HOAL 862 08 OLeT bP XVA PR:TT 00. 20/6T19/07 "00 11:44 FAX 44 1276 803 298 TECH. at AMD SUPPORT ATTACHMENT I Am26LS32/32B/33/34 Input Resistance and Input Current Input resistance measurement for differential inputs on line receivers are generally not measured directly. In- stead they are correlated to an input current measure- ment and to the process resistor temperature coefficient. The assumptions made include 1) Process resistor temperature coefficient is known and 2) The open input bias voltage for the input is known or measured within the same test sequence. Under the above assumptions Rw can be correlated to the Input current measured. The expression _ Vem Vin) (Fo) Rin (lin) (R25) where Vicm is the open input bias voltage of the Line Re- ceiver. When applying this correlation to the 26LS32 die, the following criteria have been set. 1. Vicm and lin are the values screened at wafer sort. 2. Temperature coefficients are for 800 ohmvsquare which gives 0.96 at 0C and 0.93 at ~55C. When setting limits, characterized values for Vicm have been used instead of the test programmed limit value. Rin (dif) is Rin (dif) = 2 Rw. For the Am26L$32/32B/33/34 56 -15) 0.96 Ra: Min = (2.56 - 15) 0.96 = 16.8/lm (Max) Comm., lw (Max) and Rw Min = 16.3/lin (Max) Mil. Worst Case Measurement for Input Current Two considerations have been used to determine the test condition for input current of the data path for the Am26LS32 Line Receiver. 1. Input current is tested on the 26LS32 with the pin un- der test at one end of the range (+15 V for example) and the untested pin at the opposite extreme of the input range under test. If both pins were at the same test voltage the internal bias generator would have a lower output voltage for tests at -15 V Vin and a higher output voltage at +15 V Vin. This would pro- duce test currents less than maximum. 2. For the 26LS$32, breakdown of the differential inputs is the primary failure to the data sheet specification. Hence, both breakdown voltage and input current are tested during the input current tests. 8 Am26LS32/Am26LS33ATTACHMENT Il Test Documentation for Am26LS32/32B/34 Vm Input threshold (Vx) for the Am26LS32/32B/34 is de- scribed by the equation, Vin = (N+1) (14RV/R) K*T/Q ((14RK/(m (Re+Rh))) /{(4-Rtv (M(Re+Rh))). Where N-+1 is the attenuator ratio, R1/R is the attenuator ratio mismatch, M is the ratio of the input stage Currentto hysteresis stage current, and Rh and Re are input stage loads. For Am26LS328/34 devices which pass function tests, Vou and Vou tests, and input current tests, the above equation describes the input threshold for all in- puts within the operating range of the circuit. The Test system is unable to force input thresholds within the accuracy required for the Am26LS32/34 specifications. Figure 1 plots the expected values for VtH, the worst case values at 25C and 155C. Also shown are the test values for Vrx at the 1.5 V input (Vin). In addition, the test voltage at 7 V Vin is shown. AMD zl For the figure it is seen that the worst case value for the test limit shown would be +/-165 mv, where +/~ 102 mV is expected for process parameters and the equation for Vin. Further the 25 mV negative guardband used for 7 V testing is Jess than half the machine uncertainty of 60 mv. When QA testing for Am26LS32/32B/34 is done, thresh- olds are screened for Vem other than -1.5 V. These ad- ditional tests are considered functional tests only, and the precision threshold tests which insure compliance with data sheet limits are those tests performed where the inputs are tested near 1.5 V. The actual threshold tests are done as a sequence where a setup is performed which preconditions the DUT to a logic one state, then the threshold correlation for a logic zero is tested followed by a threshold correla- tion for logic one to complete the sequence. The firnit values for the setup (Vt SET), logic zero test (Vt"), and. logic one test (Vt +) are listed under Vtn for supply value of 5.0 V. Am26LS32/Am26LS33 LYO0ddNS *HOHL 86 08 SLcT FY XVA PH:TI OO. 20/6I119/07 GO 11:45 FAX 44 1276 803 298 TECH. SUPPORT cl AMD 26LS32 VT + Limit +200 +100 +7 VIN Process Worst Case VT VT -tj = 25C 100 ~130 mV Limit Vr4 = 185C 102 mV Actual Worst Case Worst Case 2 -165 mV 60 mV machine . uncertainty allowed 26LS32 Vt Limit 200 mV. / -1.5V ov . +7V -7 V Test 05393C-7 Figure 1. 26LS32 Input Threshold Vt vs. Input Voltage Vin 10 Am26LS32/Am26L$33amp iA PHYSICAL DIMENSIONS* CD 016 16-Pin Ceramic DIP (measured in inches) -+- 45 045 .100 .005 .065 BSC MIN .300 TOP VIEW BSC 008 140 018 cry +t .060 94 A125 Tor? a Vt .400 014 MAX 073190 * 026 coca CD 018 611/93 as SIDE VIEW END VIEW PD 016 16-Pin Plastic DIP (measured in inches) TOP VIEW 300 SEATING 325 PLANE 149 t 008 -200 015 i0 ots > 060 og @ 090 O14 7 330g) 285% re 110 022 436 9/13/03 ae SIDE VIEW END VIEW 11 Am26LS32/Am26LS33 LYOddS *HOUL 86 08 OAcl FR XVH SP'TT 00. LO/6119/07 00 11:46 FAX 44 1276 803 298 TECH. SUPPORT at AMD PHYSICAL DIMENSIONS* SO 016 16-Pin Smali Outline (measured in inches) Pogo ga f 1497 .2204 1 .1574 .2440 TUT _t 4 055 TOP VIEW 9859 3937 } (SERRA os _4 0075 w | _ nic 9040 t & | 1 Lt 117634 . .0098 one C80 Sore SIDE VIEW END VIEW *For reference only. BSC is an ANSI standard for Basie Space Centering. Trademarks Copyright 1993 Advanced Micro Devices, Inc. All rights reserved. AMD ie a registered trademark of Advanced Micro Devices, inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. 12 Am26LS32/Am26LS33 Ean