30127525
FIGURE 10. Inductor Current Waveform in CCM
Knowing the desired average LED current, IAVE and the nom-
inal inductor current ripple, ΔiL, the peak current for an appli-
cation running in continuous conduction mode (CCM) is
defined as follows:
Or the LED current would then be,
This is important to calculate because this peak current mul-
tiplied by the sense resistor R3 will determine when the
internal comparator is tripped. The internal comparator turns
the control MOSFET off once the peak sensed voltage reach-
es 750 mV.
Current Limit: The trip voltage on the PWM comparator is
750 mV. However, if there is a short circuit or an excessive
load on the output, higher than normal switch currents will
cause a voltage above 1.27V on the ISNS pin which will trip
the I-LIM comparator. The I-LIM comparator will reset the RS
latch, turning off Q2. It will also inhibit the Start Pulse Gener-
ator and the COFF comparator by holding the COFF pin low.
A delay circuit will prevent the start of another cycle for 180
µs.
VALLEY FILL CAPACITORS
Determining voltage rating and capacitance value of the val-
ley-fill capacitors:
The maximum voltage seen by the valley-fill capacitors is:
This is, of course, if the capacitors chosen have identical ca-
pacitance values and split the line voltage equally. Often a
20% difference in capacitance could be observed between
like capacitors. Therefore a voltage rating margin of 25% to
50% should be considered.
Determining the capacitance value of the valley-fill ca-
pacitors:
The valley fill capacitors should be sized to supply energy to
the buck converter (VBUCK) when the input line is less than its
peak divided by the number of stages used in the valley fill
(tX). The capacitance value should be calculated for the max-
imum LED current.
30127552
FIGURE 11. Two Stage Valley-Ffill VBUCK Voltage
From the above illustration and the equation for current in a
capacitor, i = C x dV/dt, the amount of capacitance needed at
VBUCK will be calculated as follows:
At 60Hz, and a valley-fill circuit of two stages, the hold up time
(tX) required at VBUCK is calculated as follows. The total angle
of an AC half cycle is 180° and the total time of a half AC line
cycle is 8.33 ms. When the angle of the AC waveform is at
30° and 150°, the voltage of the AC line is exactly ½ of its
peak. With a two stage valley-fill circuit, this is the point where
the LED string switches from power being derived from AC
line to power being derived from the hold up capacitors (C7
and C9). 60° out of 180° of the cycle or 1/3 of the cycle the
power is derived from the hold up capacitors (1/3 x 8.33 ms
= 2.78 ms). This is equal to the hold up time (dt) from the
above equation, and dv is the amount of voltage the circuit is
allowed to droop. From the next section (“Determining Maxi-
mum Number of Series Connected LEDs Allowed”) we know
the minimum VBUCK voltage will be about 45V for a 90VAC to
135VAC line. At 90VAC low line operating condition input, ½ of
the peak voltage is 64V. Therefore with some margin the volt-
age at VBUCK can not droop more than about 15V (dv). (i) is
equal to (POUT/VBUCK), where POUT is equal to (VLED x ILED).
Total capacitance (C7 in parallel with C9) can now be calcu-
lated. See “ Design Example" section for further calculations
of the valley-fill capacitors.
Determining Maximum Number of Series Connected
LEDs Allowed:
The LM3444 is an off-line buck topology LED driver. A buck
converter topology requires that the input voltage (VBUCK) of
the output circuit must be greater than the voltage of the LED
stack (VLED) for proper regulation. One must determine what
the minimum voltage observed by the buck converter will be
before the maximum number of LEDs allowed can be deter-
mined. Two variables will have to be determined in order to
accomplish this.
1. AC line operating voltage. This is usually 90VAC to
135VAC for North America. Although the LM3444 can
operate at much lower and higher input voltages a range
is needed to illustrate the design process.
2. How many stages are implemented in the valley-fill circuit
(1, 2 or 3).
In this example the most common valley-fill circuit will be used
(two stages).
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LM3444