1/18
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© 2009 ROHM Co., Ltd. All rights reserved.
High speed Single BU7251 G
Dual BU7252 F/FVM
(BU7252S F/FVM:105 )
Low power Single BU7231 G
Dual
(BU7231SG:105 )
BU7232 F/FVM
(BU7232S F/FVM:105 )
(BU7251SG:105 )
ROHM’s Selection Operational Amplifier/Comparator Series
Comparators:
Low Voltage CMOS
BU7251G,BU7251SG,BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
Description
CMOS comparator BU7251/BU7231family and BU7252/BU7232 family are input full swing and push pull output comparator.
These ICs integrate one op-amp or two independent op-amps and phase compensation capacitor on a single chip.
The features of these ICs are low operating supplyVoltage that is +1.8V to +5.5V(single supply) and low supply current,
extremely low input bias current.
Features
1) Low operating supply voltage (+1.8[V]+5.5[V])
2) +1.8 [V]+5.5[V](single supply)
±0.9[V]±2.75[V](split supply)
3) Input and Output full swing
4) Push-pull output type
5) High speed operation (BU7251 family, BU7252 family)
6) Low supply current (BU7231 family, BU7232 family)
7) Internal ESD protection
Human body model (HBM) ±4000[V](Typ.)
8) Wide temperature range
-40[]+85[] (BU7251G,BU7252 family, BU7231G, BU7232 family)
-40[]+105[] (BU7251SG,BU7252S family, BU7231SG,BU7232S family)
Pin Assignments
1
2
3
4
8
7
5
OUT1
IN1-
IN1+
VSS
VDD
OUT2
IN2-
IN2+
CH1
- +
CH2
+ -
6
1
2
3
5
4
IN-
VSS
IN+
VDD
OUT
 
SOP8SSOP5 MSOP8
BU7252F
BU7252SF
BU7232F
BU7232SF
BU7252FVM
BU7252SFVM
BU7232FVM
BU7232SFVM
BU7251G
BU7251SG
BU7231G
BU7231SG
No.09049EAT06
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
2/18
Absolute maximum ratings (Ta=25[])
Parameter Symbol
Rating
Unit
BU7251G,BU7252 F/FVM
BU7231G,BU7232 F/FVM
BU7251SG,BU7252S F/FVM
BU7231SG,BU7232S F/FVM
Supply Voltage VDD-VSS +7 V
Differential Input Voltage (*1) Vid VDD-VSS V
Input Common-mode voltage range Vicm (VSS-0.3) to VDD+0.3 V
Operating Temperature Topr -40 to+85 -40 to+105
Storage Temperature Tstg -55 to+125
Maximum junction Temperature Tjmax +125
Note Absolute maximum rating item indicates the condition which must not be exceeded.
Application of voltage in excess of absolute maximum rating or use out absoluted maximum rated temperature environment may cause deterioration of characteristics.
(*1) The voltage difference between inverting input and non-inverting input is the differential input voltage.Then input terminal voltage is set to more then VEE.
Electrical characteristics
BU7251 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[])
Parameter Symbol
Temperature
range
Guaranteed Limit
Unit Condition
BU7251G,BU7251SG
Min. Typ. Max.
Input Offset Voltage (*2)(*4) Vio 25 - 1 11
mV -
Input Offset Current (*2) Iio 25 - 1 -
pA -
Input Bias Current (*2) Ib 25 - 1 -
pA -
Input Common-mode voltage Range Vicm 25 0 - 3
V (VDD-VSS)=3[V]
Large Signal Voltage Gain AV 25 - 90 -
dB RL=10[k]
Supply current(*4) IDD 25 - 15 35
μA RL=
full range - - 50
Power supply rejection ratio PSRR 25 - 80 -
dB -
Common-mode rejection ratio CMRR 25 - 80 -
dB -
Output source current (*3) IOH 25 1 2 -
mA VDD-0.4
Output sink current (*3) IOL 25 3 6 -
mA VSS+0.4
High Level Output Voltage (*4) VOH 25 VDD-0.1 - -
V RL=10[k]
Low Level Output Voltage (*4) VOL 25 - - VSS+0.1 V RL=10[k]
Output rise time Tr 25 - 50 -
ns CL=15pF 100mV over drive
Output fall time Tf 25 - 20 -
ns CL=15pF 100mV over drive
Propagation delay L to H TPLH 25 - 0.55 - μs CL=15pF 100mV over drive
Propagation delay H to L TPHL 25 - 0.25 - μs CL=15pF 100mV over drive
(*2) Abusolute values
(*3) Reference to power dissipation under the high temperature environment and decide the output current.
Continuous short circuit is occurring the degenerate of output current characteristics.
(*4) Full range BU7251Ta= -40 [] to +85[] BU7251STa=-40[] to +105[]
BU7252 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[])
Parameter Symbol
Temperature
range
Guaranteed Limit
Unit Condition
BU7252 F/FVM
BU7252S F/FVM
Min. Typ. Max.
Input Offset Voltage (*2)(*4) Vio 25 - 1 11
mV -
Input Offset Current (*2) Iio 25 - 1 -
pA -
Input Bias Current (*2) Ib 25 - 1 -
pA -
Input Common-mode voltage Range Vicm 25 0 - 3
V (VDD-VSS)=3[V]
Large Signal Voltage Gain AV 25 - 90 -
dB RL=10[k]
Supply current(*4) IDD 25 - 35 65
μA RL=
full range - - 80
Power supply rejection ratio PSRR 25 - 80 -
dB -
Common-mode rejection ratio CMRR 25 - 80 -
dB -
Output source current (*3) IOH 25 1 2 -
mA VDD-0.4
Output sink current (*3) IOL 25 3 6 -
mA VSS+0.4
High Level Output Voltage (*4) VOH 25 VDD-0.1 - -
V RL=10[k]
Low Level Output Voltage (*4) VOL 25 - - VSS+0.1 V RL=10[k]
Output rise time Tr 25 - 50 -
ns CL=15pF 100mV over drive
Output fall time Tf 25 - 20 -
ns CL=15pF 100mV over drive
Propagation delay L to H TPLH 25 - 0.55 - μs CL=15pF 100mV over drive
Propagation delay H to L TPHL 25 - 0.25 - μs CL=15pF 100mV over drive
(*2) Abusolute values
(*3) Reference to power dissipation under the high temperature environment and decide the output current.
Continuous short circuit is occurring the degenerate of output current characteristics.
(*4) Full range BU7251,BU7252Ta= - 40 [] to +85[] BU7251S,BU7252STa=-40[] to +105[]
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
3/18
BU7231 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[])
Parameter Symbol
Temperature
range
Guaranteed Limit
Unit Condition
BU7231G,BU7231SG
Min. Typ. Max.
Input Offset Voltage (*5) Vio 25 - 1 11 mV -
Input Offset Current (*5) Iio 25 - 1 - pA -
Input Bias Current (*5) Ib 25 - 1 - pA -
Input Common-mode voltage Range Vicm 25 0 - 3 V (VDD-VSS)=3[V]
Large Signal Voltage Gain AV 25 - 90 - dB RL=10[k]
Supply current IDD 25 - 5 15
μA RL=
full range - - 30
Power supply rejection ratio PSRR 25 - 80 - dB -
Common-mode rejection ratio CMRR 25 - 80 - dB -
Output source current (*6) IOH 25 1 2 - mA VDD-0.4
Output sink current (*6) IOL 25 3 6 - mA VSS+0.4
High Level Output Voltage (*7) VOH 25 VDD-0.1 - - V RL=10[k]
Low Level Output Voltage (*7) VOL 25 - - VSS+0.1 V RL=10[k]
Output rise time Tr 25 - 50 - ns CL=15pF 100mV over drive
Output fall time Tf 25 - 20 - ns CL=15pF 100mV over drive
Propagation delay L to H TPLH 25 - 1.7 - μs CL=15pF 100mV over drive
Propagation delay H to L TPHL 25 - 0.5 - mV CL=15pF 100mV over drive
(*5) Abusolute values
(*6) Reference to power dissipation under the high temperature environment and decide the output current.
Continuous short circuit is occurring the degenerate of output current characteristics.
(*7) Full range BU7231Ta= -40 [] to +85[] BU7231S,BU7232STa=-40[] to +105[]
BU7232 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[])
Parameter Symbol
Temperature
range
Guaranteed Limit
Unit Condition
BU7232F/FVM
BU7232S F/FVM
Min. Typ. Max.
Input Offset Voltage (*5) Vio 25 - 1 11 mV -
Input Offset Current (*5) Iio 25 - 1 - pA -
Input Bias Current (*5) Ib 25 - 1 - pA -
Input Common-mode voltage Range Vicm 25 0 - 3 V (VDD-VSS)=3[V]
Large Signal Voltage Gain AV 25 - 90 - dB RL=10[k]
Supply current IDD 25 - 10 25
μA RL=
full range - - 50
Power supply rejection ratio PSRR 25 - 80 - dB -
Common-mode rejection ratio CMRR 25 - 80 - dB -
Output source current (*6) IOH 25 1 2 - mA VDD-0.4
Output sink current (*6) IOL 25 3 6 - mA VSS+0.4
High Level Output Voltage (*7) VOH 25 VDD-0.1 - - V RL=10[k]
Low Level Output Voltage (*7) VOL 25 - - VSS+0.1 V RL=10[k]
Output rise time Tr 25 - 50 - ns CL=15pF 100mV over drive
Output fall time Tf 25 - 20 - ns CL=15pF 100mV over drive
Propagation delay L to H TPLH 25 - 1.7 - μs CL=15pF 100mV over drive
Propagation delay H to L TPHL 25 - 0.5 - mV CL=15pF 100mV over drive
(*5) Abusolute values
(*6) Reference to power dissipation under the high temperature environment and decide the output current.
Continuous short circuit is occurring the degenerate of output current characteristics.
(*7) Full range,BU7232Ta= -4 0[] to +85[] BU7232STa=-40[] to +105[]
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
4/18
0
10
20
30
40
50
-60 - 30 0 30 60 90 120
AMBIENT TEM PER ATU RE []
SUPPLY CURRENT [μA]
Example of electrical characteristics
BU7251 family
(*) The above date is ability value of sample, it is not guaranteed. BU7251G-40[] to+85[] BU7251SG-40[] to+105[]
0
2
4
6
8
10
0.0 0.5 1.0 1.5 2.0 2.5 3.0
OUTPUT VOLTAGE [V]
OUTPUT SOURCE CURRENT [mA]
0
10
20
30
40
50
60
123456
SUPPLY VOLTAGE [V]
SUPPLY CURRENT [μA]
Supply Current – Supply Voltage
25
-40
85
105
BU7251 family
0
200
400
600
800
050100150
AMBIENT TEMPERATURE []
POWER DISSIPATION [mW ]
.
BU7251SG
BU7251 famil
y
Derating Curve
1.8V
5.5V
3.0V
Supply Current – Ambient Temperature
BU7251 famil
y
0
2
4
6
123456
SUPPLY VOLTAGE [V]
OUTPUT VOLTAGE HIGH [V]
-40
25
85
105
Output Voltage High – Supply Voltage
(RL=10[k])
BU7251 family
0
2
4
6
8
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
OUTPUT VOLTAGE HIGH [V]
1.8V
5.5V
3.0V
Output Voltage High – Ambient Temperature
(RL=10[k])
BU7251 famil
y
0
1
2
3
4
5
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
OUTPUT SOURCE CURRENT [mA]
1.8V
5.5V
3.0V
Output Source Current – Ambient Temperature
(VOUT=VDD-0.4[V])
BU7251 famil
y
0
10
20
30
40
50
-60 - 30 0 30 60 90 120
AMBIENT TEMPERATURE []
OUTPUT VOLTAGE LOW [mV]
Output Voltage Low – Ambient
Temperature(RL=10[k])
1.8V
5.5V
3.0V
BU7251 famil
y
-40
25
85
105
Output Source Current – Supply
Voltage(VDD=3[V])
BU7251 famil
y
0
5
10
15
20
25
30
0.0 0.5 1.0 1.5 2.0 2.5 3.0
OUTPUT VOLTAGE [V]
OUTPUT SINK CURRENT [mA]
-40
25
85
105
BU7251 famil
y
Output Sink Current – Output Voltage
(VDD=3[V])
0
5
10
15
20
-60-300 306090120
AMBIENT TEMPERATURE []
OUTPUT SINK CURRENT [mA]
5.5V
1.8V
3.0V
BU7251 family
Output Sink Current – Ambient Temperature
(VOUT=VSS+0.4[V])
0
10
20
30
40
50
123456
SUPPLY VOLTAGE [V]
OUTPUT VOLTAGE LOW [mV]
-40 25
85
105
BU7251 famil
y
Output Voltage Low – Supply Voltage
(RL=10[k])
0
200
400
600
800
0 50 100 150
AMBIENT TEMPERATURE []
POWER DISSIPATION [mW] .
BU7251G
BU7251 famil
y
Derating Curve
Fig. 1 Fig. 2 Fig. 3
Fig. 4 Fig. 5 Fig. 6
Fig. 7 Fig. 8 Fig. 9
Fig. 10 Fig. 11 Fig. 12
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
5/18
-10.0
-7.5
-5.0
-2.5
0.0
2.5
5.0
7.5
10.0
123456
SUPPLY VOLTAGE [V]
INPUT OFFSET VOLTAGE [mV]
60
80
100
120
140
160
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
LARGE SIGNAL VOLTAGE GAIN [dB]
BU7251 family
(*) The above date is ability value of sample, it is not guaranteed. BU7251G-40[] to+85[] BU7251SG-40[] to+105[]
-40
25
85 105
BU7251 family
Input Offset Voltage – Supply Voltage
(Vicm=VDD, Vout=0.1[V])
60
80
100
120
140
160
123456
SUPPLY VOLTAGE [V]
LARGE SIGNAL VOLTAGE GAIN [dB]
-40 25
85
105
BU7251 famil
y
Large Signal Voltage Gain – Supply Voltage
-10.0
-7.5
-5.0
-2.5
0.0
2.5
5.0
7.5
10.0
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
INPUT OFFSET VOLTAGE [mV]
5.5V 1.8V
3.0V
BU7251 famil
y
Input Offset Voltage – Ambient Temperature
(Vicm=VDD, Vout=0.1[V])
-15
-10
-5
0
5
10
15
-1 0 1 2 3 4
INPUT VOLTAGE [V]
INPUT OFFSET VOLTAGE [mV]
-40 25
85 105
Input offset voltage – Input Voltage
(VDD=3[V])
BU7251 famil
y
3.0V
5.5V
1.8V
Large Signal Voltage Gain
– Ambient Temperature
BU7251 family
0
20
40
60
80
100
120
123456
SUPPLY VOLTAGE [V]
COMMON MODE REJECTION RATIO [dB]
-40
25
85
105
Common Mode rejection Ratio
– Supply Voltage(VDD=3[V])
BU7251 family
0
20
40
60
80
100
120
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
POWER SUPPLY REJECTION RATIO [dB]
Power Supply Rejection –
Ambient Temperature
BU7251 famil
y
0
20
40
60
80
100
120
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
COMMON MODE REJECTION RATIO [dB]
5.5V
1.8V
3.0V
BU7251 family
Common Mode Rejection Ratio –
Ambient Temperature
(VDD=3[V])
0.0
0.5
1.0
1.5
2.0
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
PROPAGATION DELAY L-H [μs]
5.5V
1.8V
3.0V
Propagation Delay L-H –
Ambient Temperature
BU7251 family
0.0
0.2
0.4
0.6
0.8
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
PROPAGATION DELAY H-L [μs]
5.5V
1.8V
3.0V
BU7251 famil
y
Propagation Delay H-LAmbient Temperature
Fig. 13 Fig. 14 Fig. 15
Fig. 16 Fig. 17 Fig. 18
Fig. 19 Fig. 20 Fig. 21
Fig. 22
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
6/18
BU7252 family
(*) The above date is ability value of sample, it is not guaranteed. BU7252 F/FVM-40[] to+85[] BU7252S F/FVM-40[] to+105[]
0
200
400
600
800
1000
0 50 100 150
AMBIENT TEMPERATURE [] .
POWER DISSIPATION [mV]
BU7252F
BU7252 famil
y
Derating Curve
BU7252FVM
0
50
100
150
123456
SUPPLY VOLTAGE [V]
SUPPLY CURRENT [μA]
85
-40 25
105
BU7252 famil
y
Supply Current – Supply Voltage
0
50
100
150
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
SUPPLY CURRENT [μA]
3.0V
1.8V
5.5V
Supply Curreny – Ambient Temperature
BU7252 family
0
10
20
30
40
50
123456
SUPPLY VOLTAGE [V]
OUTPUT VOLTAGE LOW [mV]
85
105
-40
25
Output Voltage Low – Supply
Voltage(RL=10[k])
BU7252 famil
y
0
10
20
30
40
50
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
OUTPUT VOLTAGE LOW [mV]
1.8V
5.5V
3.0V
Output Voltage Low – Ambient
Temperature(RL=10[k])
BU7252 famil
y
0
5
10
15
20
25
30
0.0 0.5 1.0 1.5 2.0 2.5 3.0
OUTPUT VOLTAGE [V]
OUTPUT SINK CURRENT [mA]
-40
25
85 105
BU7252 famil
y
Output Sink Current – Output Voltage
(VDD=3[V])
0
5
10
15
20
-60-300 306090120
AMBIENT TEMPERATURE []
OUTPUT SINK CURRENT [mA]
5.5V
1.8V
3.0V
Output Sink Current – Ambient Temperature
(VOUT=VSS+0.4[V])
BU7252 famil
y
0
200
400
600
800
1000
0 50 100 150
AMBIENT TEMPERATURE [] .
POWER DISSIPATION [mV]
BU7252SF
BU7252 family
Derating Curve
BU7252SFVM
0
2
4
6
8
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
OUTPUT VOLTAGE HIGH [V]
1.8V
5.5V
3.0V
Output Voltage High – Ambient Temperature
(RL=10[k])
BU7252 family
0
1
2
3
4
5
-60-30 0 30 60 90120
AMBIENT TEMPERATURE []
OU T PUT SOUR CE CURRENT [mA]
1.8V
5.5V
3.0V
Output Source Current – Ambient Temperature
(VOUT=VDD-0.4[V])
BU7252 famil
y
0
2
4
6
8
10
0 0.5 1 1.5 2 2.5 3
OUTPUT VOLTAGE [V]
OUTPUT SOURCE CURRENT [mA]
-40 25
85
105
Output Source Current – Output
Voltage(VDD=3[V])
BU7252 family
0
2
4
6
8
123456
SUPPLY VOLTAGE [V]
OUTPUT VOLTAGE HIGH [V]
-40
25
85
105
Output Voltage High – Supply Voltage
(RL=10[k])
BU7252 family
85 105
Fig. 23 Fig. 24 Fig. 25
Fig. 26 Fig. 27 Fig. 28
Fig. 29 Fig. 30 Fig. 31
Fig. 32 Fig. 33 Fig. 34
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
7/18
0
20
40
60
80
100
120
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
POWER SUPPLY REJECTION RATIO [dB]
20
40
60
80
100
120
140
160
-60-300 306090120
AMBIENT TEMPERATURE []
LARG E SIGNAL VOLTAGE GAIN [dB]
-10.0
-7.5
-5.0
-2.5
0.0
2.5
5.0
7.5
10.0
123456
SUPPLY VOLTAGE[V]
INPUT OFFSET VOLTAGE [mV]
BU7252 family
(*) The above date is ability value of sample, it is not guaranteed. BU7252 F/FVM-40[] to+85[] BU7252S F/FVM-40[] to+105[]
5.5V
0.0
0.5
1.0
1.5
2.0
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
PROPAGATION DELAY L-H [μs]
5.5V
1.8V
3.0V
Propagation Delay L-H – Ambient
Temperature
BU7252 famil
y
-10.0
-7.5
-5.0
-2.5
0.0
2.5
5.0
7.5
10.0
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
INPUT OFFSET VOLTAGE [mV]
5.5V
1.8V 3.0V
BU7252 family
Input Offset Voltage – Ambient Temperature
(Vicm=VDD,VOUT=0.1[V])
-15
-10
-5
0
5
10
15
-1 0 1 2 3 4
INPUT VOLTAGE [V]
INPUT OFFSET VOLTAGE [mV]
-40
25
105
Input Offset Voltage – Input Voltage
(VDD=3[V])
BU7252 famil
y
0
20
40
60
80
100
120
123456
SUPPLY VOLTAGE [V]
COMMON MODE REJECTION RATIO [dB]
-40
25
105
Common Mode Rejection Ratio
– Supply Voltage (VDD=3[V])
BU7252 famil
y
0
20
40
60
80
100
120
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
COMMON MODE REJECTION RATIO [dB]
5.5V
1.8V
3.0V
BU7252 family
Common Mode Rejection – Ambient
Temperature (VDD=3[V])
Power Supply Rejection Ratio – Ambient
Temperature
BU7252 family
0.0
0.2
0.4
0.6
0.8
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
PROPAGATION DELAY H-L [μs]
5.5V
1.8V
3.0V
Propagation Delay H-LAmbient Temperature
BU7251 family
5.5V
1.8V
3.0V
Large Signal Voltage Gain
Ambient Temperature
BU7252 famil
y
20
40
60
80
100
120
140
160
123456
SUPPLY VOLTAGE [V]
LARGE SIGNAL VOLTAGE GAIN [dB]
25
85
105
BU7252 family
Large Signal Voltage Gain – Supply
Voltage
-40
-40 25
105
BU7252 famil
y
Input Offset Voltage – Supply Voltage
(Vicm=VDD,VOUT=0.1[V])
85
85
85
Fig. 35 Fig. 36 Fig. 37
Fig. 38 Fig. 39 Fig. 40
Fig. 41 Fig. 42 Fig. 43
Fig. 44
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
8/18
2
4
6
8
10
12
-60 - 30 0 30 60 90 120
AMBIENT TEM PER ATU RE []
SUPPLY CURRENT [μA]
0
200
400
600
800
0 50 100 150
AMBIENT TEMPERATURE []
POWER DISSIPATION [mW] .
BU7231 series
(*) The above date is ability value of sample, it is not guaranteed. BU7231G-40[] to+85[] BU7231SG-40[] to+105[]
0
2
4
6
8
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
OUTPUT VOLTAGE HIGH [V]
Output Voltage High – Ambient Temperature
(RL=10[k])
0
10
20
30
40
50
02468
SUPP LY VOLTAGE [V]
OUTPUT VOLTAGE LOW [mV
]
0
4
8
12
16
20
123456
SUPPLY VOLTAGE [V]
SUPPLY CURRENT [μA]
Supply Current – Supply Voltage
-40
25
85
105
BU7231 family
0
200
400
600
800
050100150
AMBIENT TEMPERATURE []
POWER DISSIPATION [mW]
.
BU7231SG
BU7231 famil
y
Derating Curve
1.8V
5.5V
3.0V
Supply Current – Ambient Temperature
BU7231 famil
y
0
10
20
30
40
50
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
OUTPUT VOLTAGE LOW [mV]
Output Voltage Low – Ambient Temperature
(RL=10[k])
1.8V
5.5V
3.0V
BU7231 famil
y
0
1
2
3
4
5
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
OUTPUT SOURCE CURRENT [mA]
1.8V
5.5V
3.0V
Output Source Current – Ambient Temperature
(VOUT=VDD-0.4[V])
BU7231 family
0
5
10
15
20
25
30
0.0 0.5 1.0 1.5 2.0 2.5 3.0
OUTPUT VOLTAGE [V]
OUTPUT SINK CURRENT [mA]
-40
25
85
105
BU7231 family
Output Sink Current – Output Voltage
(VDD=3[V])
0
5
10
15
20
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
OUTPUT SINK CURRENT [mA]
5.5V
1.8V
3.0V
BU7231 famil
y
Output Sink Current – Ambient Temperature
(VOUT=VSS+0.4[V])
BU7231 family
-40
25
85
105
Output Voltage Low – Supply Voltage
(RL=10[k])
0
2
4
6
123456
SUPPLY VOLTAGE [V]
OUTPUT VOLTAGE HIGH [V]
BU7231 famil
y
-40
25
85
105
Output Voltage – Supply Voltage
(RL=10[k])
BU7231G
BU7231 famil
y
Derating Curve
0
2
4
6
8
10
0 0.5 1 1.5 2 2.5 3
OUTPUT VOLTAGE [V]
OUTPUT SOURCE CURRENT [mA]
Output Source Current – Output Voltage
(VDD=3[V])
BU7231 famil
y
-40
25
85 105
BU7231 famil
y
5.5V
3.0V
1.8V
85 105
Fig. 45 Fig. 46 Fig. 47
Fig. 48 Fig. 49 Fig. 50
Fig. 51 Fig. 52 Fig. 53
Fig. 54 Fig. 55 Fig. 56
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
9/18
-10.0
-7.5
-5.0
-2.5
0.0
2.5
5.0
7.5
10.0
123456
SUPP LY VOLTAGE [V]
INPUT OFFS ET VOLTAGE [mV]
60
80
100
120
140
160
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
LARGE SIGNAL VOLTAGE GAIN [dB]
BU7231 series
(*) The above date is ability value of sample, it is not guaranteed. BU7231G-40[] to+85[] BU7231SG-40[] to+105[]
-40
25
85
105
BU7231 famil
y
Input Offset Voltage – Supply Voltage
(Vicm=VDD, Vout=0.1[V])
0
1
2
3
4
5
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
PROPAGATION DELAY L-H [μs]
5.5V
1.8V
3.0V
Propagation Delay L-H
– Ambient Temperature
BU7231 family
0.0
0.3
0.6
0.9
1.2
1.5
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
PROPAGATION DELAY H-L [μs]
5.5V
1.8V
3.0V
BU7231 famil
y
Propagation Delay H-L– Ambient Temperature
60
80
100
120
140
160
123456
SUPPLY VOLTAGE [V]
LARGE SIGNAL VOLTAGE GAIN [dB]
-40
25
85
105
BU7231 famil
y
Large Signal Voltage Gain – Supply Voltage
0
20
40
60
80
100
120
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
POWER SUPPLY REJECTION RATIO [dB]
BU7231 family
Power Supply Rejection Ratio
– Ambient Temperature
0
20
40
60
80
100
120
123456
SUPPLY VOLTAGE [V]
COMMON MODE REJECTION RATIO [dB]
-40
25
85 105
BU7231 family
Common Mode Rejection Ratio
– Supply Voltage (VDD=3[V])
-15
-10
-5
0
5
10
15
-101234
INPUT VOLTAGE [V]
INPUT OFFSET VOLTAGE [mV]
-40 25
85 105
BU7231 famil
y
Input Offset Voltage – Input Voltage
(VDD=3[V])
3.0V
5.5V
1.8V
BU7231 famil
y
Large Signal Voltage Gain
– Ambient Temperature
0
20
40
60
80
100
120
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
COMMON MODE REJECTION RATIO [dB]
5.5V
1.8V
3.0V
BU7231 famil
y
Common Mode Rejection Ratio
– Ambient Temperature (VDD=3[V])
-10.0
-7.5
-5.0
-2.5
0.0
2.5
5.0
7.5
10.0
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
INPUT OFFSET VOLTAGE [mV]
BU7231 famil
y
5.5V
1.8V
3.0V
Input Offset Voltage – Ambient Temperature
(Vicm=VDD, Vout=0.1[V])
Fig. 57 Fig. 58 Fig. 59
Fig. 60 Fig. 61 Fig. 62
Fig. 63 Fig. 64 Fig. 65
Fig. 66
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
10/18
0
200
400
600
800
1000
0 50 100 150
AMBIENT TEMPERATURE [] .
POWER DISSIPATION [mV]
BU7232 family
(*) The above date is ability value of sample, it is not guaranteed. BU7232 F/FVM-40[] to+85[] BU7232S F/FVM-40[] to+105[]
0
200
400
600
800
1000
0 50 100 150
AMBIENT TEMPERATURE [] .
POWER DISSIPATION [mV]
0
10
20
30
40
50
-60-30 0 306090120
AMBIENT TEMPERATURE []
SUPPLY CURRENT [μA]
3.0V
1.8V
5.5V
Supply Current – Ambient emperature
BU7232 famil
y
0
10
20
30
40
50
123 4567
SUPPLY VOLTAGE [V]
OUTPUT VOLTAGE LOW [mV]
85
105
-40 25
Output Voltage Low – Supply Voltage
(RL=10[k])
BU7232 family
0
2
4
6
8
1234567
SUPPLY VOLTAGE [V]
OUTPUT VOLTAGE HIGH [V]
-40
25
85
105
Output Voltage High – Supply Voltage
(RL=10[k])
BU7232 famil
y
0
10
20
30
40
-60-30 0 306090120
AMBIENT TEMPERATURE []
OUTPUT VOLTAGE LOW [mV
]
1.8V
5.5V
3.0V
Output Voltage Low – Ambient temperature
(RL=10[k])
BU7232 family
0
10
20
30
0.0 0.5 1.0 1.5 2.0 2.5 3.0
OUTPUT VOLTAGE [V]
OUTPUT SINK CURRENT [mA]
-40
25
85 105
BU7232 famil
y
Output Sink Current – Output Voltage
(VDD=3[V])
0
5
10
15
20
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
OUTPUT SINK CURRENT [mA]
5.5V
1.8V
3.0V
Output Sink Current – Ambient Temperature
(VOUT=VSS+0.4[V])
BU7232 family
0
1
2
3
4
5
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
OUTPUT SOURCE CURRENT [mA]
1.8V
5.5V
3.0V
Output Source Current – Ambient Temperature
(VOUT=VDD-0.4[V])
BU7232 famil
y
0
2
4
6
8
10
00.511.522.53
OUTPUT VOLTAGE [V]
OU TPU T SO URCE CURR ENT [mA]
-40
25
85
105
Output Source Current – Output Voltage
(VDD=3[V])
BU7232 family
0
2
4
6
8
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
OUTPUT VOLTAGE HIGH [V]
1.5V
5.5V
3.0V
Output Voltage – Ambient Temperature
(RL=10[k])
BU7232 famil
y
0
10
20
30
40
50
123456
SUPPLY VOLTAGE [V]
SUPPLY CURRENT [µA]
85
-40 25
105
BU7232 family
Supply Current – Supply Voltage
BU7232F
BU7232 family
Derating Curve
BU7232FVM
85
BU7232SF
BU7232 family
Derating Curve
BU7232SFVM
105
Fig. 67 Fig. 68 Fig. 69
Fig. 70 Fig. 71 Fig. 72
Fig. 73 Fig. 74 Fig. 75
Fig. 76 Fig. 77 Fig. 78
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
11/18
-10.0
-7.5
-5.0
-2.5
0.0
2.5
5.0
7.5
10.0
123456
AMBIENT TEMPERATURE []
INPUT OFFSET VOLTAGE [mV]
60
80
100
120
140
160
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
LARGE SIGNAL VOLTAGE GAIN [dB]
0
20
40
60
80
100
120
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
POWER SUPPLY REJECTION RATIO [dB]
0
1
2
3
4
5
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
PROPAGATION DELAY L-H [μs]
BU7232 family
(*) The above date is ability value of sample, it is not guaranteed. BU7232 F/FVM-40[] to+85[] BU7232S F/FVM-40[] to+105[]
-15
-10
-5
0
5
10
15
-101234
INPUT VOLTAGE [V]
INPUT OFFSET VOLTAGE [mV]
0.0
0.3
0.6
0.9
1.2
1.5
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
PROPAGATION DELAY H-L [us]
Large Signal Voltage Gain
Ambient Temperature
-40 25
105
BU7232 famil
y
Input Offset Voltage – Ambient Temperature
(Vicm=VDD, VOUT=0.1[V])
Input Offset Voltage – Input Voltage
(VDD=3[V])
BU7232 family
5.5V
3.0V
BU7232 famil
y
0
20
40
60
80
100
120
123456
SUPPLY VOLTAGE [V]
COMMON MODE REJECTION RATIO [dB]
-40
25
105
Common Mode Rejection Ratio
– Supply Voltage (VDD=3[V])
BU7232 family
Power Supply Rejection Ratio
– Ambient Temperature
BU7232 famil
y
0
20
40
60
80
100
120
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
COMMON MODE REJECTION RATIO [dB]
5.5V
1.8V 3.0V
BU7232 family
Common Mode Rejection Ratio –
Ambient Temperature (VDD=3[V])
60
80
100
120
140
160
123456
SUPPLY VOLTAGE [V]
LARGE SIGNAL VOLTAGE GAIN [dB]
25
-40
105
BU7232 famil
y
Large Signal Voltage Gain Supply Voltage
85
Propagation Delay H-LAmbient Temperature
5.5V
1.8V
3.0V
BU7232 famil
y
Propagation Delay L-H – Ambient
temperature
5.5V
1.8V
3.0V
BU7232 family
-10.0
-7.5
-5.0
-2.5
0.0
2.5
5.0
7.5
10.0
-60 -30 0 30 60 90 120
AMBIENT TEMPERATURE []
INPUT OFFSET VOLTAGE [mV]
5.5V
1.8V 3.0V
BU7232 famil
y
Input Offset Voltage – Ambient Temperature
(Vicm=VDD, VOUT=0.1[V])
1.8V
-40
25
105
85
85
Fig. 79 Fig. 80 Fig. 81
Fig. 82 Fig. 83 Fig. 84
Fig. 85 Fig. 86 Fig. 87
Fig. 88
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
12/18
Schematic diagram
Test circuit1 NULL method
VDD,VSS,EK,Vicm, Unit : [V]
Parameter VF S1 S2 S3
Calculation
VDD VSS EK Vicm
Input offset voltage VF1 ON ON OFF 3 0 -0.1 0.3 1
Large signal voltage gain VF2 ON ON ON 3 0
-0.3 0.3 2
VF3 -2.7
Common-mode rejection ratio
(Input common-mode voltage range)
VF4 ON ON OFF 3 0 -0.1
0 3
VF5 3
Power supply rejection ratio VF6 ON ON OFF
1.8 0 -0.1 0.3 4
VF7 5.5
-Calculation-
1. Input offset Voltage (Vio)
2. Large signal voltage gain (Av)
3. Common-mode rejection ratio (CMRR)
4. Power supply rejection ratio (PSRR)
VDD
Rf
50[k]
S1
Ri1[M]
RS50[]
S2 RL
S3
500[k]
500[k]0.01[μF]
R
K
E
K
R
K
+15[V ]
-15[V]
NULL
V
F
DUT
VSS
Ri1[M]
RS50[]
50[k]
Vic
0.47[μF]
0.1[uF]
0.1[uF]
Fig. 90 Test Circuit 1 (one channel only)
Vio = |VF1|
1+Rf/Rs [V]
Fig. 89 Simplified schematic
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
13/18
Test circuit2 switch condition
Unit : [V]
SW No. SW
1
SW
2
SW
3
SW
4
SW
5
SW
6
SW
7
SW
8
supply current OFF ON ON OFF OFF OFF OFF OFF
maximum output voltage RL=10 [k] OFF ON ON ON OFF OFF ON OFF
output current OFF OFF OFF OFF OFF ON OFF OFF
response time ON OFF ON OFF ON OFF OFF ON
V
IN
[V]
t
入力波
100mV over drive
1.6[V]
1.4[V]
Vref=1 .5 [V]
V
OUT
[V]
TPLH
t
出力波形
3[V]
0[V]
1.5[V]
V
IN
[V]
入力波形
100mV over drive
1.6[V]
1.4[V]
Vref=1.5[V]
3[V]
0[V]
V
OUT
[V]
TPHL
t
出力波形
1.5[V]
Input Wave Input Wave
Output Wave Output Wave
SW1 SW2
SW
5
SW
6
SW
7
SW
4
SW
3
C
L
SW
8
R
L
GND
VDD=3[V]
V
o
VIN- VIN+
Fig. 92 Slew rate input output wave
Fig. 91 Test circuit2 (one channel only)
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
14/18
Description of electrical characteristics
Described here are the terms of electric characteristics used in this technical note. Items and symbols used are also shown.
Note that item name and symbol and their meaning may differ from those on another manufacture’s document or general
document.
1. Absolute maximum ratings
Absolute maximum rating item indicates the condition which must not be exceeded. Application of voltage in excess of absolute
Maximum rating or use out of absolute maximum rated temperature environment may cause deterioration of characteristics.
1.1 Power supply voltage(VDD/VSS)
Indicates the maximum voltage that can be applied between the positive power supply terminal and negative power supply
terminal without deterioration or destruction of characteristics of internal circuit.
1.2 Differential input voltage (Vid)
Indicates the maximum voltage that can be applied between non-inverting terminal and inverting terminal without
deterioration and destruction of characteristics of IC.
1.3 Input common-mode voltage range (Vicm)
Indicates the maximum voltage that can be applied to non-inverting terminal and inverting terminal without deterioration or
destruction of characteristics. Input common-mode voltage range of the maximum ratings not assure normal operation of IC.
When normal operation of IC is desired, the input common-mode voltage of characteristics item must be followed.
1.4 Power dissipation (Pd)
Indicates the power that can be consumed by specified mounted board at the ambient temperature 25(normal temperature).
As for package product, Pd is determined by the temperature that can be permitted by IC chip in the package(maximum
junction temperature) and thermal resistance of the package
2. Electrical characteristics item
2.1 Input offset voltage (Vio)
Indicates the voltage difference between non-inverting terminal and inverting terminal.
It can be translated into the input voltage difference required for setting the output voltage at 0 [V]
2.2 Input offset current (Iio)
Indicates the difference of input bias current between non-inverting terminal and inverting terminal.
2.3 Input bias current (Ib)
Indicates the current that flows into or out of the input terminal. It is defined by the average of input bias current at
non-inverting terminal and input bias current at inverting terminal.
2.4 Input common-mode voltage range (Vicm)
Indicates the input voltage range where IC operates normally.
2.5 Large signal voltage gain (AV)
Indicates the amplifying rate (gain) of output voltage against the voltage difference between non-inverting terminal and
inverting terminal. It is normally the amplifying rate (gain) with reference to DC voltage.
Av = (Output voltage fluctuation) / (Input offset fluctuation)
2.6 Circuit current (ICC)
Indicates the IC current that flows under specified conditions and no-load steady status.
2.7 Output sink current (OL)
Indicates the maximum current that can be output under specified output condition (such as output voltage and load condition).
2.8 Output saturation voltage, Low level output voltage (VOL)
Indicates the voltage range that can be output under specified load conditions.
2.9 Output leakage current, High level output current(I leak)
Indicates the current that flows into IC under specified input and output conditions.
2.10 Response Time (Tre)
The interval between the application of an input and output condition.
2.11 Common-mode rejection ratio (CMRR)
Indicates the ratio of fluctuation of input offset voltage when in-phase input voltage is changed. It is normally the fluctuation of DC.
CMRR (Change of Input common-mode voltage)/(Input offset fluctuation)
2.12 Power supply rejection ratio (PSRR)
Indicates the ratio of fluctuation of input offset voltage when supply voltage is changed. It is normally the fluctuation of DC.
PSRR(Change of power supply voltage)/(Input offset fluctuation)
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
15/18
Derating curve
Power dissipation (total loss) indicates the power that can be consumed by IC at Ta=25(normal temperature).IC is heated
when it consumed power, and the temperature of IC ship becomes higher than ambient temperature. The temperature that
can be accepted by IC chip depends on circuit configuration, manufacturing process, and consumable power is limited. Power
dissipation is determined by the temperature allowed in IC chip (maximum junction temperature) and thermal resistance of
package (heat dissipation capability). The maximum junction temperature is typically equal to the maximum value in the
storage package (heat dissipation capability). The maximum junction temperature is typically equal to the maximum value in
the storage temperature range. Heat generated by consumed power of IC radiates from the mold resin or lead frame of the
package. The parameter which indicates this heat dissipation capability (hardness of heat release) is called thermal
resistance, represented by the symbol θj-a[/W]. The temperature of IC inside the package can be estimated by this thermal
resistance. Fig.93 (a) shows the model of thermal resistance of the package. Thermal resistance θja, ambient temperature Ta,
junction temperature Tj, and power dissipation Pd can be calculated by the equation below :
θja (Tj-Ta) / Pd [/W] ・・・・・ ()
Derating curve in Fig.93 (b) indicates power that can be consumed by IC with reference to ambient temperature. Power that
can be consumed by IC begins to attenuate at certain ambient temperature. This gradient is determined by thermal
resistance θja. Thermal resistance θja depends on chip size, power consumption, package, ambient temperature, package
condition, wind velocity, etc even when the same of package is used. Thermal reduction curve indicates a reference value
measured at a specified condition. Fig94(c)-(f) show a derating curve for an example of BU7251family, BU7252 family, BU7231
family, BU7232 family.
(*8) (*9) (*10) Unit
5.4 6.2 4.8 [mW/]
When using the unit above Ta=25[], subtract the value above per degree[]. Permissible dissipation is the value
when FR4 glass epoxy board 70[mm]×70[mm]×1.6[mm] (cooper foil area below 3[%]) is mounted.
Fig. 94.
0507510012515025
P1
P2
Pd(max)
LSIの消費電[W]
θja2
θja1
Tj(max)
θja2 < θja1
周囲温度Ta[]
BU7251/BU7231
Tj(max)
Power dissipati on Pd:[W]
A
mbient temperatur e:Ta
[
]
(a) Thermal resistance (b) Derating curve
Fig. 93. Thermal resistance and power dissipation
Derating curve
0
200
400
600
800
050100150
AMBIENT TEMPERATURE []
POWER DISSIPATION [mW]
.
85
0
200
400
600
800
1000
0 50 100 150
AMBIENT TEMPERATURE []
POWER DISSIPATION [mW ]
.
85
0
200
400
600
800
0 50 100 150
AMBIENT TEMPERATURE []
POWER DISSIPATION [mW]
.
BU7231SG(*8)
105
0
200
400
600
800
1000
0 50 100 150
AMBIENT TEMPERATURE []
POWER DISSIPATION [mW ]
.
105
(c) BU7251G BU7231G (d) BU7252F/FVM BU7232F/FVM
(e) BU7251SG BU7231SG (f) BU7252S F/FVM BU72432S F/FVM
BU7251SG(*8)
BU7251G(*8)
BU7231G(*8)
540[mw]
620[mw]
480[mw]
540[mw]
BU7252F(*9)
BU7232F(*9)
BU7252FVM(*10)
BU7232FVM(*10)
620[mw]
480[mw]
BU7252SF(*9)
BU7232SF(*9)
BU7252SFVM(*10)
BU7232SFVM(*10)
A
mbient temperatur e Ta
[
]
Chi p sur face temperatur e Tj []
Power dissi pation P [W]
θja = ( Tj Ta ) / Pd [/W]
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
16/18
Notes for use
1) Absolute maximum ratings
Absolute maximum ratings are the values which indicate the limits, within which the given voltage range can be safely
charged to the terminal.However, it does not guarantee the circuit operation.
2) Applied voltage to the input terminal
For normal circuit operation of voltage comparator, please input voltage for its input terminal within input common mode
voltage VDD+0.3[V].Then, regardless of power supply voltage,VSS-0.3[V] can be applied to inputterminals without
deterioration or destruction of its characteristics.
3) Operating power supply (split power supply/single power supply)
The voltage comparator operates if a given level of voltage is applied between VDD and VSS.
Therefore, the operational amplifier can be operated under single power supply or split power supply.
4) Power dissipation (pd)
If the IC is used under excessive power dissipation. An increase in the chip temperature will cause deterioration of the
radical characteristics of IC. For example, reduction of current capability.
Take consideration of the effective power dissipation and thermal design with a sufficient margin. Pd is reference to the
provided power dissipation curve.
5) Short circuits between pins and incorrect mounting
Short circuits between pins and incorrect mounting when mounting the IC on a printed circuits board, take notice of the
direction and positioning of the IC.
If IC is mounted erroneously, It may be damaged. Also, when a foreign object is inserted between output, between output
and VDD terminal or VSS terminal which causes short circuit, the IC may be damaged.
6) Using under strong electromagnetic field
Be careful when using the IC under strong electromagnetic field because it may malfunction.
7) Usage of IC
When stress is applied to the IC through warp of the printed circuit board,
The characteristics may fluctuate due to the piezo effect. Be careful of the warp of the printed circuit board.
8) Testing IC on the set board
When testing IC on the set board, in cases where the capacitor is connected to the low impedance,make sure to
discharge per fabrication because there is a possibility that IC may be damaged by stress.
When removing IC from the set board, it is essential to cut supply voltage.
As a countermeasure against the static electricity, observe proper grounding during fabrication process and take due
care when carrying and storage it.
9) The IC destruction caused by capacitive load
The transistors in circuits may be damaged when VDD terminal and VSS terminal is shorted with the charged output
terminal capacitor.
When IC is used as a operational amplifier or as an application circuit,where oscillation is not activated by an output
capacitor,the output capacitor must be kept below 0.1[μF] in order to prevent the damage mentioned above.
10) Decupling capacitor
Insert the deculing capacitance between VDD and VSS, for stable operation of operational amplifier.
11) Latch up
Be careful of input vltage that exceed the VDD and VSS. When CMOS device have sometimes occur latch up operation.
And protect the IC from abnormaly noise
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
17/18
Ordering part number
B U 7 2 5 2 F V M - T R
Part No. Part No.
7231 , 7231S
7251 , 7251S
7252 , 7252S
7232 , 7232S
Package
G: SSOP5
F: SOP8
FVM: MSOP8
Packaging and forming specification
E2: Embossed tape and reel
(SOP8)
TR: Embossed tape and reel
(SSOP5/MSOP8)
(Unit : mm)
SOP8
0.9±0.15
0.3MIN
4
°
+
6
°
4
°
0.17 +0.1
-
0.05
0.595
6
43
8
2
5
1
7
5.0±0.2
6.2±0.3
4.4±0.2
(MAX 5.35 include BURR)
1.27
0.11
0.42±0.1
1.5±0.1
S
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SSOP5
2.9±0.2
0.13
4°+6°
4°
1.6
2.8±0.2
1.1±0.05
0.05±0.05
+0.2
0.1
+0.05
0.03
0.42+0.05
0.04
0.95
54
123
1.25Max.
0.2Min.
0.1
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
TR
()
1pin
Technical Note
BU7251G,BU7251SG, BU7231G,BU7231SG,
BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM
18/18
(Unit : mm)
MSOP8
0.08 S
S
4.0±0.2
8
3
2.8±0.1
1
6
2.9±0.1
0.475
4
57
(MAX 3.25 include BURR)
2
1PIN MARK
0.9MAX
0.75±0.05
0.65
0.08±0.05
0.22 +0.05
–0.04
0.6±0.2
0.29±0.15
0.145 +0.05
–0.03
4°
+6°
4°
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
TR
()
1pin
R0039
A
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Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
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Great care was taken in ensuring the accuracy of the information specied in this document.
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