ROHM's Selection Operational Amplifier/Comparator Series Comparators: Low Voltage CMOS BU7251G,BU7251SG,BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM No.09049EAT06 Description CMOS comparator BU7251/BU7231family and BU7252/BU7232 family are input full swing and push pull output comparator. These ICs integrate one op-amp or two independent op-amps and phase compensation capacitor on a single chip. The features of these ICs are low operating supplyVoltage that is +1.8V to +5.5V(single supply) and low supply current, extremely low input bias current. High speed Single Dual Low power Single Dual BU7251 G (BU7251SG:105 ) BU7252 F/FVM (BU7252S F/FVM:105 ) BU7231 G (BU7231SG:105 ) BU7232 F/FVM (BU7232S F/FVM:105 ) Features 1) Low operating supply voltage (+1.8[V]+5.5[V]) 2) +1.8 [V]+5.5[V](single supply) 0.9[V]2.75[V](split supply) 3) Input and Output full swing 4) Push-pull output type 5) High speed operation (BU7251 family, BU7252 family) 6) Low supply current (BU7231 family, BU7232 family) 7) Internal ESD protection Human body model (HBM) 4000[V](Typ.) 8) Wide temperature range -40[]+85[] (BU7251G,BU7252 family, BU7231G, BU7232 family) -40[]+105[] (BU7251SG,BU7252S family, BU7231SG,BU7232S family) Pin Assignments IN- 1 VSS 2 5 IN1- 2 IN+ 3 IN1+ 3 4 OUT VSS 4 SSOP5 SOP8 BU7252F BU7252SF BU7232F BU7232SF BU7251G BU7251SG BU7231G BU7231SG www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved. 8 VDD OUT1 1 VDD 1/18 CH1 7 OUT2 - + CH2 + - 6 IN25 IN2+ MSOP8 BU7252FVM BU7252SFVM BU7232FVM BU7232SFVM 2009.05 - Rev.A BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note Absolute maximum ratings (Ta=25[]) Parameter Supply Voltage Differential Input Voltage (*1) Input Common-mode voltage range Operating Temperature Storage Temperature Maximum junction Temperature Symbol VDD-VSS Vid Vicm Topr Tstg Tjmax Rating BU7251G,BU7252 F/FVM BU7251SG,BU7252S F/FVM BU7231G,BU7232 F/FVM BU7231SG,BU7232S F/FVM +7 VDD-VSS (VSS-0.3) to VDD+0.3 -40 to+85 -40 to+105 -55 to+125 +125 Unit V V V Note Absolute maximum rating item indicates the condition which must not be exceeded. Application of voltage in excess of absolute maximum rating or use out absoluted maximum rated temperature environment may cause deterioration of characteristics. (*1) The voltage difference between inverting input and non-inverting input is the differential input voltage.Then input terminal voltage is set to more then VEE. Electrical characteristics BU7251 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[]) Guaranteed Limit Temperature BU7251G,BU7251SG Parameter Symbol Unit Condition range Min. Typ. Max. Vio 25 mV Input Offset Voltage (*2)(*4) 1 11 Iio 25 pA Input Offset Current (*2) 1 Ib 25 pA Input Bias Current (*2) 1 Vicm 25 V (VDD-VSS)=3[V] Input Common-mode voltage Range 0 3 AV 25 dB RL=10[k] Large Signal Voltage Gain 90 25 15 35 (*4) IDD A RL= Supply current full range 50 PSRR 25 dB Power supply rejection ratio 80 CMRR 25 dB Common-mode rejection ratio 80 IOH 25 mA VDD-0.4 Output source current (*3) 1 2 IOL 25 mA VSS+0.4 Output sink current (*3) 3 6 VOH 25 V RL=10[k] High Level Output Voltage (*4) VDD-0.1 VOL 25 Low Level Output Voltage (*4) VSS+0.1 V RL=10[k] Tr 25 ns CL=15pF 100mV over drive Output rise time 50 Tf 25 ns CL=15pF 100mV over drive Output fall time 20 TPLH 25 s CL=15pF 100mV over drive Propagation delay L to H 0.55 TPHL 25 s CL=15pF 100mV over drive Propagation delay H to L 0.25 (*2) (*3) (*4) Abusolute values Reference to power dissipation under the high temperature environment and decide the output current. Continuous short circuit is occurring the degenerate of output current characteristics. Full range BU7251Ta=-40[] to +85[] BU7251STa=-40[] to +105[] BU7252 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[]) Guaranteed Limit Temperature BU7252 F/FVM Parameter Symbol Unit Condition BU7252S F/FVM range Min. Typ. Max. Vio 25 mV Input Offset Voltage (*2)(*4) 1 11 Iio 25 pA Input Offset Current (*2) 1 Ib 25 pA Input Bias Current (*2) 1 Vicm 25 V (VDD-VSS)=3[V] Input Common-mode voltage Range 0 3 AV 25 dB RL=10[k] Large Signal Voltage Gain 90 25 35 65 IDD A RL= Supply current(*4) full range 80 PSRR 25 dB Power supply rejection ratio 80 CMRR 25 dB Common-mode rejection ratio 80 IOH 25 mA VDD-0.4 Output source current (*3) 1 2 IOL 25 mA VSS+0.4 Output sink current (*3) 3 6 VOH 25 V RL=10[k] High Level Output Voltage (*4) VDD-0.1 VOL 25 Low Level Output Voltage (*4) VSS+0.1 V RL=10[k] Tr 25 ns CL=15pF 100mV over drive Output rise time 50 Tf 25 ns CL=15pF 100mV over drive Output fall time 20 TPLH 25 s CL=15pF 100mV over drive Propagation delay L to H 0.55 TPHL 25 s CL=15pF 100mV over drive Propagation delay H to L 0.25 (*2) (*3) (*4) Abusolute values Reference to power dissipation under the high temperature environment and decide the output current. Continuous short circuit is occurring the degenerate of output current characteristics. Full range BU7251,BU7252Ta=-40[] to +85[] BU7251S,BU7252STa=-40[] to +105[] 2/18 BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note BU7231 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[]) Guaranteed Limit Temperature Parameter Symbol BU7231G,BU7231SG range Min. Typ. Max. Unit Condition Input Offset Voltage (*5) Vio 25 - 1 11 mV - (*5) Iio 25 - 1 - pA - Ib 25 - 1 - pA - Input Offset Current Input Bias Current (*5) Input Common-mode voltage Range Vicm 25 0 - 3 V (VDD-VSS)=3[V] Large Signal Voltage Gain AV 25 - 90 - dB RL=10[k] Supply current IDD 25 - 5 15 full range - - 30 A RL= 25 - 80 - Power supply rejection ratio PSRR Common-mode rejection ratio CMRR 25 - 80 - dB IOH 25 1 2 - mA VDD-0.4 IOL 25 3 6 - mA VSS+0.4 VOH 25 VDD-0.1 - - V RL=10[k] VOL 25 - - VSS+0.1 V RL=10[k] Output source current (*6) Output sink current (*6) High Level Output Voltage (*7) Low Level Output Voltage (*7) dB - Output rise time Tr 25 - 50 - ns CL=15pF 100mV over drive Output fall time Tf 25 - 20 - ns CL=15pF 100mV over drive Propagation delay L to H TPLH 25 - 1.7 - s CL=15pF 100mV over drive Propagation delay H to L TPHL 25 - 0.5 - mV CL=15pF 100mV over drive (*5) (*6) (*7) Abusolute values Reference to power dissipation under the high temperature environment and decide the output current. Continuous short circuit is occurring the degenerate of output current characteristics. Full range BU7231Ta=-40[] to +85[] BU7231S,BU7232STa=-40[] to +105[] BU7232 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[]) Guaranteed Limit Temperature BU7232F/FVM Parameter Symbol BU7232S F/FVM range Min. Typ. Max. Unit Condition Input Offset Voltage (*5) Vio 25 - 1 11 mV - Input Offset Current (*5) Iio 25 - 1 - pA - Input Bias Current (*5) Ib 25 - 1 - pA Vicm 25 0 - 3 V (VDD-VSS)=3[V] Large Signal Voltage Gain AV 25 - 90 - dB RL=10[k] Supply current IDD A RL= Input Common-mode voltage Range 25 - 10 25 full range - - 50 - Power supply rejection ratio PSRR 25 - 80 - dB - Common-mode rejection ratio CMRR 25 - 80 - dB - IOH 25 1 2 - mA Output source current Output sink current (*6) (*6) VDD-0.4 IOL 25 3 6 - mA High Level Output Voltage (*7) VOH 25 VDD-0.1 - - V RL=10[k] VSS+0.4 Low Level Output Voltage (*7) VOL 25 - - VSS+0.1 V RL=10[k] Output rise time Tr 25 - 50 - ns CL=15pF 100mV over drive Output fall time Tf 25 - 20 - ns CL=15pF 100mV over drive Propagation delay L to H TPLH 25 - 1.7 - s CL=15pF 100mV over drive Propagation delay H to L TPHL 25 - 0.5 - mV CL=15pF 100mV over drive (*5) (*6) (*7) Abusolute values Reference to power dissipation under the high temperature environment and decide the output current. Continuous short circuit is occurring the degenerate of output current characteristics. Full range,BU7232Ta=-40[] to +85[] BU7232STa=-40[] to +105[] 3/18 BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Example of electrical characteristics BU7251 family BU7251 family BU7251G 400 200 BU7251 family 60 50 600 SUPPLY CURRENT [A] 600 BU7251 family 800 POWER DISSIPATION [mW] . POWER DISSIPATION [mW] . 800 Technical Note BU7251SG 400 200 105 40 85 30 25 20 10 -40 0 0 50 100 AMBIENT TEMPERATURE [] 0 150 50 Fig. 1 Derating Curve 5.5V 20 3.0V 10 25 30 105 85 20 10 -40 25 2 3 4 5 SUPPLY VOLTAGE [V] 40 30 3.0V 1.8V 20 1.8V 10 3.0V 30 60 90 1.8V 2 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] 120 Fig. 6 Output Voltage High - Ambient Temperature (RL=10[k]) BU7251 family 10 8 -40 6 25 4 85 0 30 60 90 120 0.0 0.5 25 25 15 105 85 10 5 0.5 1.0 1.5 2.0 2.5 1.5 2.0 2.5 3.0 Fig. 9 Output Source Current - Supply Voltage(VDD=3[V]) -40 20 1.0 OUTPUT VOLTAGE [V] BU7251 family 30 3.0 OUTPUT VOLTAGE [V] AMBIENT TEMPERATURE [] Fig. 10 Output Source Current - Ambient Temperature 105 2 Fig. 8 0.0 120 0 -30 0 0 3.0V Output Voltage Low - Ambient Temperature(RL=10[k]) OUTPUT SINK CURRENT [mA] OUTPUT SOURCE CURRENT [mA] 5.5V -30 5.5V 4 AMBIENT TEMPERATURE [] 4 1 5.5V 0 -60 6 BU7251 family 2 6 6 BU7251 family 50 (RL=10[k]) 3 BU7251 family (RL=10[k]) Fig. 7 Output Voltage Low - Supply Voltage 5 3 4 5 SUPPLY VOLTAGE [V] Fig. 5 Output Voltage High - Supply Voltage 0 6 0 2 OUTPUT SOURCE CURRENT [mA] 40 0 -60 -40 1 OUTPUT VOLTAGE LOW [mV] OUTPUT VOLTAGE LOW [mV] 85 120 BU7251 family 50 3 4 5 SUPPLY VOLTAGE [V] 8 0 -30 0 30 60 90 AM BIENT TEM PERATURE [] Fig. 4 Supply Current - Ambient Temperature 1 105 4 2 2 Fig. 3 Supply Current - Supply Voltage OUTPUT VOLTAGE HIGH [V] 30 0 -60 1 BU7251 family 6 OUTPUT VOLTAGE HIGH [V] SUPPLY CURRENT [A] 40 1.8V 150 Fig. 2 Derating Curve BU7251 family 50 100 AMBIENT TEMPERATURE [] BU7251 family 20 OUTPUT SINK CURRENT [mA] 0 0 15 5.5V 10 3.0V 1.8V 5 0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [] Fig. 11 Output Sink Current - Output Voltage Fig. 12 Output Sink Current - Ambient Temperature (VDD=3[V]) (VOUT=VSS+0.4[V]) (VOUT=VDD-0.4[V]) (*) The above date is ability value of sample, it is not guaranteed. BU7251G-40[] to+85[] BU7251SG-40[] to+105[] 4/18 BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM BU7251 family 10.0 5.0 85 2.5 0.0 105 25 7.5 INPUT OFFSET VOLTAGE [mV] -40 -2.5 -5.0 -7.5 5.0 3.0V 2.5 0.0 5.5V 1.8V -2.5 -5.0 -7.5 -10.0 -10.0 1 2 3 4 5 6 -30 0 30 60 90 AMBIENT TEMPERATURE [] Fig. 13 (Vicm=VDD, Vout=0.1[V]) 85 100 -40 80 25 140 120 3.0V 5.5V 80 -60 3.0V 1.8V 40 20 0 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] -30 0 30 60 90 AMBIENT TEMPERATURE [] (VDD=3[V]) 100 120 80 105 60 -40 40 20 0 1 2 3 4 5 SUPPLY VOLTAGE [V] 80 60 40 20 BU7251 family 2.0 1.5 1.8V 1.0 5.5V 3.0V 0.5 0.0 -30 0 30 60 90 AMBIENT TEMPERATURE [] Fig. 20 Power Supply Rejection - Ambient Temperature 120 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] Fig. 21 Propagation Delay L-H - Ambient Temperature BU7251 family 0.6 0.4 1.8V 0.2 5.5V 3.0V 0.0 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] 120 Fig. 22 Propagation Delay H-L - Ambient Temperature (*) The above date is ability value of sample, it is not guaranteed. 6 Fig. 18 Common Mode rejection Ratio - Supply Voltage(VDD=3[V]) 100 0 -60 25 85 120 BU7251 family 120 Fig. 19 Common Mode Rejection Ratio - Ambient Temperature 0.8 4 BU7251 family 120 Fig. 17 Large Signal Voltage Gain - Ambient Temperature POWER SUPPLY REJECTION RATIO [dB] COMMON MODE REJECTION RATIO [dB] 80 PROPAGATION DELAY H-L [s] 1.8V 100 6 5.5V 60 1 2 3 INPUT VOLTAGE [V] (VDD=3[V]) BU7251 family 160 BU7251 family 100 0 Fig. 15 Fig. 16 Large Signal Voltage Gain - Supply Voltage 120 -1 PROPAGATION DELAY L-H [s] 3 4 5 SUPPLY VOLTAGE [V] 25 -10 120 60 2 -40 -5 Input offset voltage - Input Voltage 60 1 105 Fig. 14 LARGE SIGNAL VOLTAGE GAIN [dB] LARGE SIGNAL VOLTAGE GAIN [dB] 120 85 0 (Vicm=VDD, Vout=0.1[V]) 140 105 5 Input Offset Voltage - Ambient Temperature BU7251 family 160 10 -15 -60 SUPPLY VOLTAGE [V] Input Offset Voltage - Supply Voltage BU7251 family 15 COMMON MODE REJECTION RATIO [dB] INPUT OFFSET VOLTAGE [mV] 7.5 BU7251 family 10.0 INPUT OFFSET VOLTAGE [mV] BU7251 family Technical Note BU7251G-40[] to+85[] BU7251SG-40[] to+105[] 5/18 120 BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM BU7252 family 800 600 BU7252F BU7252FVM 400 200 85 100 50 AMBIENT TEMPERATURE [] . 600 BU7252SF BU7252SFVM 400 200 100 105 85 50 0 0 100 105 50 150 1 2 AMBIENT TEMPERATURE [] . Fig. 24 Derating Curve BU7252 family 3 4 5 SUPPLY VO LTAGE [V] 6 Fig. 25 Supply Current - Supply Voltage BU7252 family 8 25 -40 0 150 Fig. 23 Derating Curve 150 BU7252 family 150 800 0 0 BU7252 family 1000 POWER DISSIPATION [mV] POWER DISSIPATION [mV] 1000 SUPPLY CURRENT [A] BU7252 family Technical Note BU7252 family 8 100 5.5V 3.0V 1.8V 50 0 OUTPUT VOLTAGE HIGH [V] OUTPUT VOLTAGE HIGH [V] SUPPLY CURRENT [A] 5.5V 6 105 85 4 25 -40 2 0 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] 1 2 3 4 5 SUPPLY VOLTAGE [V] (RL=10[k]) 30 105 85 20 10 25 5.5V 3.0V 20 10 1.8V -40 2 3 4 5 SUPPLY VOLTAGE [V] Fig. 29 Output Voltage Low - Supply Voltage(RL=10[k]) 3 3.0V 2 1.8V 1 0 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] 0 30 60 90 4 120 -40 25 25 20 15 10 85 105 5 0.0 AMBIENT TEMPERATURE [] Fig. 32 Output Source Current - Ambient Temperature 85 105 2 0 0.5 1.0 1.5 2.0 2.5 3.0 OUTPUT VOLTAGE [V] Fig. 33 Output Sink Current - Output Voltage (VOUT=VDD-0.4[V]) (*) The above date is ability value of sample, it is not guaranteed. (VDD=3[V]) BU7252 F/FVM-40[] to+85[] 6/18 0.5 1 1.5 2 2.5 3 OUTPUT VOLTAGE [V] 0 -30 25 6 120 Fig. 31 Output Source Current - Output Voltage(VDD=3[V]) BU7252 family 30 OUTP UT SINK CURRENT [mA] 5.5V 4 -40 Fig. 30 Output Voltage Low - Ambient Temperature(RL=10[k]) BU7252 family 5 8 0 -60 6 BU7252 family 10 BU7252 family 20 OUTPUT SINK CURRENT [mA] 1 OUTPUT SOURCE CURRENT [mA] Output Voltage High - Ambient Temperature 0 0 120 (RL=10[k]) 40 30 -30 0 30 60 90 AMBIENT TEMPERATURE [] Fig. 28 OUTPUT SOURCE CURRENT [mA] 40 1.8V 2 -60 BU7252 family 50 OUTPUT VOLTAGE LOW [mV] OUTPUT VOLTAGE LOW [mV] 50 3.0V 6 Fig. 27 Output Voltage High - Supply Voltage BU7252 family 4 0 120 Fig. 26 Supply Curreny - Ambient Temperature 6 15 5.5V 10 3.0V 1.8V 5 0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [] Fig. 34 Output Sink Current - Ambient Temperature (VOUT=VSS+0.4[V]) BU7252S F/FVM-40[] to+105[] BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note BU7252 family BU7252 family 5.0 2.5 25 -40 0.0 -2.5 85 105 -5.0 -7.5 5.0 2.5 1.8V 5.5V -5.0 -7.5 -10.0 -10.0 2 3 4 5 SUPPLY VOLTAGE[V] Fig. 35 Input Offset Voltage - Supply Voltage -30 0 30 60 90 AMBIENT TEMPERATURE [] 25 100 85 80 60 -40 40 20 2 3 4 5 SUPPLY VOLTAGE [V] 140 120 1.8V 100 80 3.0V 60 5.5V 40 6 -60 -30 0 30 60 90 AMBIENT TEMP ERATURE [] Fig. 38 5.5V 60 1.8V 3.0V 20 0 -60 -1 -30 0 30 60 90 AMBIENT TEMPERATURE [] 120 100 80 60 40 20 0 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [] Fig. 41 Common Mode Rejection - Ambient Temperature (VDD=3[V]) 1 2 3 INPUT VOLTAGE [V] 100 80 85 Fig. 42 Power Supply Rejection Ratio - Ambient Temperature 105 60 25 40 -40 20 0 1 2 3 4 5 SUPPLY VOLTAGE [V] BU7252 family 2.0 1.5 1.8V 1.0 5.5V 0.5 3.0V 0.0 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] 1.8V 3.0V 0.2 5.5V 0.0 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] 120 Fig. 44 Propagation Delay H-L - Ambient Temperature (*) The above date is ability value of sample, it is not guaranteed. BU7252 F/FVM-40[] to+85[] 120 Fig. 43 Propagation Delay L-H - Ambient Temperature 0.6 0.4 6 Fig. 40 Common Mode Rejection Ratio - Supply Voltage (VDD=3[V]) BU7251 family 0.8 4 BU7252 family 120 120 BU7252 family 120 0 Fig. 37 Input Offset Voltage - Input Voltage PROPAGATION DELAY L-H [s] POWER SUPPLY REJECTION RATIO [dB] COMMON MODE REJECTION RATIO [dB] 100 40 85 Large Signal Voltage Gain - Ambient Temperature BU7252 family 80 105 -10 Fig. 39 Large Signal Voltage Gain - Supply Voltage 120 -5 (VDD=3[V]) 20 1 0 120 BU7252 family 160 LARG E SIGNAL VOLTAGE GAIN [dB ] LARGE SIGNAL VOLTAGE GAIN [dB] 140 120 25 (Vicm=VDD,VOUT=0.1[V]) BU7252 family 105 -40 5 Fig. 36 Input Offset Voltage - Ambient Temperature (Vicm=VDD,VOUT=0.1[V]) 160 10 -15 -60 6 COMMON MODE REJECTION RATIO [dB] 1 PROPAGATION DELAY H-L [s] 3.0V 0.0 -2.5 BU7252 family 15 7.5 INPUT OFFSET VOLTAGE [mV] INPUT OFFSET VOLTAGE [mV] 7.5 BU7252 family 10.0 INPUT OFFSET VOLTAGE [mV] 10.0 BU7252S F/FVM-40[] to+105[] 7/18 5.5V BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM BU7231 series BU7231 family 800 BU7231 family 800 POWER DISSIPATION [mW] . 600 BU7231G 400 200 BU7231 family 20 16 600 SUPPLY CURRENT [A] POWER DISSIPATION [mW] . Technical Note BU7231SG 400 200 105 12 85 8 25 4 -40 0 0 85 50 100 AMBIENT TEMPERATURE [] Fig. 45 Derating Curve 12 0 50 100 8 6 3.0V 1.8V -30 0 30 60 90 AM BIENT TEM PERATURE [] 2 105 85 25 -40 1 Fig. 48 Supply Current - Ambient Temperature 6 5.5V 4 3.0V 1.8V 2 0 0 120 2 3 4 5 SUPPLY VOLTAGE [V] -60 6 Fig. 49 Output Voltage - Supply Voltage -30 0 30 60 90 AMBIENT TEMPERATURE [] (RL=10[k]) 105 85 20 25 10 -40 40 30 5.5V 20 10 3.0V 0 -60 0 0 2 4 6 SUPP LY VOLTAGE [V] 8 (RL=10[k]) 5.5V 3.0V 1.8V 1 0 -60 0 30 60 4 85 90 AMBIENT TEMPERATURE [] 120 Fig. 54 Output Source Current - Ambient Temperature 105 2 0 -30 0 30 60 90 120 0 0.5 1 1.5 2 2.5 3 OUTPUT VOLTAGE [V] (RL=10[k]) (VDD=3[V]) BU7231 family 30 25 -40 25 20 15 85 105 10 5 0 -30 25 Fig. 53 Output Source Current - Output Voltage OUTPUT SINK CURRENT [mA] OUTPUT SOURCE CURRENT [mA] 4 2 -40 6 Fig. 52 Output Voltage Low - Ambient Temperature BU7231 family 3 8 AMBIENT TEMPERATURE [] Fig. 51 Output Voltage Low - Supply Voltage 5 1.8V 0.0 0.5 1.0 1.5 2.0 2.5 3.0 OUTPUT VOLTAGE [V] BU7231 family 20 OUTPUT SINK CURRENT [mA] 30 BU7231 family 10 OUTPUT SOURCE CURRENT [mA] 40 BU7231 family 50 OUTPUT VOLTAGE LOW [mV] O UTPUT VOLTAGE LOW [mV] 50 120 Fig. 50 Output Voltage High - Ambient Temperature (RL=10[k]) BU7231 family 6 BU7231 family 8 4 2 3 4 5 SUPPLY VOLTAGE [V] Fig. 47 Supply Current - Supply Voltage BU7231 family OUTPUT VOLTAGE HIGH [V] OUTPUT VOLTAGE HIGH [V] 5.5V 2 -60 1 150 Fig. 46 Derating Curve BU7231 family 6 4 105 AMBIENT TEMPERATURE [] 10 SUPPLY CURRENT [A] 0 150 0 15 5.5V 10 5 0 -60 3.0V 1.8V -30 0 30 60 90 AMBIENT TEMPERATURE [] 120 Fig. 55 Output Sink Current - Output Voltage Fig. 56 Output Sink Current - Ambient Temperature (VDD=3[V]) (VOUT=VSS+0.4[V]) (VOUT=VDD-0.4[V]) (*) The above date is ability value of sample, it is not guaranteed. BU7231G-40[] to+85[] BU7231SG-40[] to+105[] 8/18 BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note BU7231 series BU7231 family 5.0 -40 2.5 25 0.0 105 -2.5 7.5 INPUT OFFSET VOLTAGE [mV] 85 -5.0 -7.5 5.0 3.0V 2.5 1.8V 0.0 5.5V -2.5 -5.0 -7.5 -10.0 -10.0 1 2 3 4 5 6 -30 0 30 60 90 AMBIENT TEMPERATURE [] SUPP LY VOLTAG E [V] 105 100 85 -40 25 80 60 140 1.8V 120 100 3.0V 80 5.5V 60 1 2 3 4 5 SUPPLY VOLTAGE [V] 6 -60 Fig. 60 Large Signal Voltage Gain - Supply Voltage 80 3.0V 60 1.8V 40 20 0 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] 120 Fig. 63 Common Mode Rejection Ratio - Ambient Temperature (VDD=3[V]) 0 1 2 3 INPUT VOLTAGE [V] -30 0 30 60 90 AMBIENT TEMPERATURE [] 100 80 60 85 105 25 -40 40 20 0 1 120 2 3 4 5 SUPPLY VOLTAGE [V] 80 60 40 20 BU7231 family 5 4 3 5.5V 3.0V 2 1.8V 1 0 -30 0 30 60 90 AMBIENT TEMPERATURE [] 120 Fig. 64 Power Supply Rejection Ratio - Ambient Temperature -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] Fig. 65 Propagation Delay L-H - Ambient Temperature 1.2 0.9 5.5V 0.6 1.8V 3.0V 0.3 0.0 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] 120 Fig. 66 Propagation Delay H-L- Ambient Temperature (*) The above date is ability value of sample, it is not guaranteed. 6 Fig. 62 Common Mode Rejection Ratio - Supply Voltage (VDD=3[V]) 100 0 -60 BU7231 family 120 BU7231 family 120 4 (VDD=3[V]) BU7231 family 1.5 PROPAGATION DELAY H-L [s] 25 Fig. 59 Input Offset Voltage - Input Voltage PROPAGATION DELAY L-H [s] 5.5V -1 Fig. 61 POWER SUPPLY REJECTION RATIO [dB] COMMON MODE REJECTION RATIO [dB] 100 -40 -10 Large Signal Voltage Gain - Ambient Temperature BU7231 family 120 105 -5 120 BU7231 family 160 LARGE SIGNAL VOLTAGE GAIN [dB] LARGE SIGNAL VOLTAGE GAIN [dB] 120 85 0 (Vicm=VDD, Vout=0.1[V]) BU7231 family 140 5 Fig. 58 Input Offset Voltage - Ambient Temperature (Vicm=VDD, Vout=0.1[V]) 160 10 -15 -60 Fig. 57 Input Offset Voltage - Supply Voltage BU7231 family 15 COMMON MODE REJECTION RATIO [dB] INPUT OFFS ET VOLTAGE [mV ] 7.5 BU7231 family 10.0 INPUT OFFSET VOLTAGE [mV] 10.0 BU7231G-40[] to+85[] BU7231SG-40[] to+105[] 9/18 120 BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note BU7232 family POWER DISSIPATION [mV] 600 BU7232F BU7232FVM 400 200 0 0 800 600 BU7232SF BU7232SFVM 400 200 50 100105 AMBIENT TEMPERATURE [] . OUTPUT VOLTAGE HIGH [V] SUPPLY CURRENT [A] 30 5.5V 3.0V 1.8V 10 0 20 10 1 BU7232 family 6 105 85 4 25 -40 2 2 3 4 5 SUPPLY VOLTAGE [V] 1 BU7232 family 8 2 3 4 5 6 SUPPLY VOLTAGE [V] 5.5V 6 4 3.0V 1.5V 2 -60 7 Fig. 71 Output Voltage High - Supply Voltage -30 0 30 60 90 AMBIENT TEMPERATURE [] 85 20 10 25 -40 5.5V 3.0V 20 10 1.8V 0 0 2 3 4 5 SUPPLY VOLTAGE [V] 6 (RL=10[k]) 0 30 60 90 3.0V 2 1.8V 1 30 60 90 120 (VOUT=VDD-0.4[V]) 0.5 1 1.5 2 2.5 3 Fig. 75 Output Source Current - Output Voltage (VDD=3[V]) BU7232 family 20 -40 25 20 105 85 10 15 5.5V 10 5 3.0V 1.8V 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 OUTPUT VOLTAGE [V] AMBIENT TEMPERATURE [] Fig. 76 Output Source Current - Ambient Temperature 85 105 2 OUTPUT VOLTAGE [V] 0 0 0 4 0 BU7232 family 30 OUTPUT SINK CURRENT [mA] 5.5V -30 25 6 120 (RL=10[k]) 3 -60 -30 Fig. 74 Output Voltage Low - Ambient temperature BU7232 family 4 -40 AMBIENT TEMPERATURE [] Fig. 73 Output Voltage Low - Supply Voltage 5 8 0 -60 7 OUTPUT SINK CURRENT [mA] 1 OUTPUT SOURCE CURRENT [mA] 30 BU7232 family 10 OUTPUT SO URCE CURRENT [mA] 105 30 (RL=10[k]) BU7232 family 40 OUTPUT VOLTAGE LOW [mV] OUTPUT VOLTAGE LOW [mV] 40 120 Fig. 72 Output Voltage - Ambient Temperature (RL=10[k]) BU7232 family 50 6 0 120 Fig. 70 Supply Current - Ambient emperature 25 -40 150 0 -30 0 30 60 90 AMBIENT TEMPERATURE [] 85 Fig. 69 Supply Current - Supply Voltage 8 40 -60 105 Fig. 68 Derating Curve BU7232 family 20 30 0 0 150 Fig. 67 Derating Curve 50 40 0 85 50 100 AMBIENT TEMPERATURE [] . BU7232 family 50 OUTPUT VOLTAGE HIGH [V] POWER DISSIPATION [mV] 800 BU7232 family 1000 SUPPLY CURRENT [A] BU7232 family 1000 -60 -30 0 30 60 90 120 AMBIENT TEMPERATURE [] Fig. 77 Fig. 78 Output Sink Current - Output Voltage Output Sink Current - Ambient Temperature (*) The above date is ability value of sample, it is not guaranteed. (VDD=3[V]) BU7232 F/FVM-40[] to+85[] 10/18 (VOUT=VSS+0.4[V]) BU7232S F/FVM-40[] to+105[] BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note BU7232 family BU7232 family 5.0 2.5 85 25 -40 0.0 -2.5 105 -5.0 -7.5 -10.0 5.0 2.5 1.8V 2 3 4 5 AMBIENT TEMPERATURE [] 0.0 -2.5 5.5V -5.0 -7.5 6 0 100 85 80 -40 25 -10 120 3 4 5 SUPPLY VOLTAGE [V] 140 120 1.8V 100 5.5V 80 3.0V -60 6 Fig. 82 Large Signal Voltage Gain - Supply Voltage POWER SUPPLY REJECTION RATIO [dB] 100 80 5.5V 60 40 1.8V 3.0V 20 0 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] 120 Fig. 85 Common Mode Rejection Ratio - Ambient Temperature (VDD=3[V]) -30 0 30 60 90 AMBIENT TEMPERATURE [] 100 80 105 60 40 25 -40 20 0 1 2 3 4 5 SUPPLY VOLTAGE [V] 100 80 60 40 20 0 BU7232 family 5 4 5.5V 3 3.0V 2 1 1.8V 0 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] 120 Fig. 86 Power Supply Rejection Ratio - Ambient Temperature -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] Fig. 87 5.5V 1.8V 0.6 0.3 3.0V 0.0 -60 -30 0 30 60 90 AMBIENT TEMPERATURE [] 120 Fig. 88 Propagation Delay H-L - Ambient Temperature (*) The above date is ability value of sample, it is not guaranteed. BU7232 F/FVM-40[] to+85[] 11/18 120 Propagation Delay L-H - Ambient temperature 1.2 0.9 6 Fig. 84 Common Mode Rejection Ratio - Supply Voltage (VDD=3[V]) BU7232 family 120 4 BU7232 family 120 120 BU7232 family 1.5 1 2 3 INPUT VOLTAGE [V] (VDD=3[V]) Fig. 83 Large Signal Voltage Gain - Ambient Temperature BU7232 family 120 0 Fig. 81 Input Offset Voltage - Input Voltage PROPAGATION DELAY L-H [s] 2 -1 BU7232 family 60 60 1 85 -5 COMMON MODE REJECTION RATIO [dB] 25 105 -30 0 30 60 90 AMBIENT TEMPERATURE [] 160 LARGE SIGNAL VOLTAGE GAIN [dB] 140 120 105 (Vicm=VDD, VOUT=0.1[V]) BU7232 family 160 -40 5 Fig. 80 Input Offset Voltage - Ambient Temperature (Vicm=VDD, VOUT=0.1[V]) COMMON MODE REJECTION RATIO [dB] 10 -15 -60 Fig. 79 Input Offset Voltage - Ambient Temperature PROPAGATION DELAY H-L [us] 3.0V BU7232 family 15 -10.0 1 LARGE SIGNAL VOLTAGE GAIN [dB] 7.5 INPUT OFFSET VOLTAGE [mV] INPUT OFFSET VOLTAGE [mV] 7.5 BU7232 family 10.0 INPUT OFFSET VOLTAGE [mV] 10.0 BU7232S F/FVM-40[] to+105[] BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note Schematic diagram Fig. 89 Simplified schematic Test circuit1 NULL method VDD,VSS,EK,Vicm, Unit : [V] Parameter Input offset voltage VF S1 S2 S3 VF1 ON ON ON VF2 Large signal voltage gain VF3 VF4 Common-mode rejection ratio (Input common-mode voltage range) VF5 VF6 Power supply rejection ratio VF7 -Calculation1. Input offset Voltage (Vio) Vio = |VF1| 1+Rf/Rs VSS EK Vicm OFF 3 0 -0.1 0.3 1 ON ON 3 0 0.3 2 ON ON OFF 3 0 -0.1 ON ON OFF 0 -0.1 1.8 5.5 -0.3 -2.7 [V] 2. Large signal voltage gain (Av) 3. Common-mode rejection ratio (CMRR) 4. Power supply rejection ratio (PSRR) 0.47[F] Rf 50[k] S1 0.1[uF] VDD RK EK 500[k] 0.01[F] RS 50[] Ri 1[M] Vicm Ri 1[M] RS 50[] 0.1[uF] S2 +15[V] 500[k] DUT RK VSS Calculation VDD S3 NULL -15[V] RL 50[k] Fig. 90 Test Circuit 1 (one channel only) 12/18 VF 0 3 0.3 3 4 BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note Test circuit2 switch condition Unit : [V] supply current SW 1 OFF SW 2 ON SW 3 ON SW 4 OFF SW 5 OFF SW 6 OFF SW 7 OFF SW 8 OFF maximum output voltage RL=10 [k] OFF ON ON ON OFF OFF ON OFF output current OFF OFF OFF OFF OFF ON OFF OFF response time ON OFF ON OFF ON OFF OFF ON SW No. VDD=3[V] SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 GND RL VIN- CL VIN+ Vo Fig. 91 Test circuit2 (one channel only) V IN [V] V IN Input Wave [V] Input Wave 1.6[V] 1.6[V] 100mV over drive Vref=1.5[V] Vref=1.5[V] 100mV over drive 1.4[V] 1.4[V] V OUT [V] t V OUT [V] Output Wave Output Wave 3[V] 3[V] 1.5[V] 0[V] 1.5[V] 0[V] t TPHL t TPLH Fig. 92 Slew rate input output wave 13/18 BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note Description of electrical characteristics Described here are the terms of electric characteristics used in this technical note. Items and symbols used are also shown. Note that item name and symbol and their meaning may differ from those on another manufacture's document or general document. 1. Absolute maximum ratings Absolute maximum rating item indicates the condition which must not be exceeded. Application of voltage in excess of absolute Maximum rating or use out of absolute maximum rated temperature environment may cause deterioration of characteristics. 1.1 Power supply voltage(VDD/VSS) Indicates the maximum voltage that can be applied between the positive power supply terminal and negative power supply terminal without deterioration or destruction of characteristics of internal circuit. 1.2 Differential input voltage (Vid) Indicates the maximum voltage that can be applied between non-inverting terminal and inverting terminal without deterioration and destruction of characteristics of IC. 1.3 Input common-mode voltage range (Vicm) Indicates the maximum voltage that can be applied to non-inverting terminal and inverting terminal without deterioration or destruction of characteristics. Input common-mode voltage range of the maximum ratings not assure normal operation of IC. When normal operation of IC is desired, the input common-mode voltage of characteristics item must be followed. 1.4 Power dissipation (Pd) Indicates the power that can be consumed by specified mounted board at the ambient temperature 25(normal temperature). As for package product, Pd is determined by the temperature that can be permitted by IC chip in the package(maximum junction temperature) and thermal resistance of the package 2. Electrical characteristics item 2.1 Input offset voltage (Vio) Indicates the voltage difference between non-inverting terminal and inverting terminal. It can be translated into the input voltage difference required for setting the output voltage at 0 [V] 2.2 Input offset current (Iio) Indicates the difference of input bias current between non-inverting terminal and inverting terminal. 2.3 Input bias current (Ib) Indicates the current that flows into or out of the input terminal. It is defined by the average of input bias current at non-inverting terminal and input bias current at inverting terminal. 2.4 Input common-mode voltage range (Vicm) Indicates the input voltage range where IC operates normally. 2.5 Large signal voltage gain (AV) Indicates the amplifying rate (gain) of output voltage against the voltage difference between non-inverting terminal and inverting terminal. It is normally the amplifying rate (gain) with reference to DC voltage. Av = (Output voltage fluctuation) / (Input offset fluctuation) 2.6 Circuit current (ICC) Indicates the IC current that flows under specified conditions and no-load steady status. 2.7 Output sink current (OL) Indicates the maximum current that can be output under specified output condition (such as output voltage and load condition). 2.8 Output saturation voltage, Low level output voltage (VOL) Indicates the voltage range that can be output under specified load conditions. 2.9 Output leakage current, High level output current(I leak) Indicates the current that flows into IC under specified input and output conditions. 2.10 Response Time (Tre) The interval between the application of an input and output condition. 2.11 Common-mode rejection ratio (CMRR) Indicates the ratio of fluctuation of input offset voltage when in-phase input voltage is changed. It is normally the fluctuation of DC. CMRR (Change of Input common-mode voltage)/(Input offset fluctuation) 2.12 Power supply rejection ratio (PSRR) Indicates the ratio of fluctuation of input offset voltage when supply voltage is changed. It is normally the fluctuation of DC. PSRR(Change of power supply voltage)/(Input offset fluctuation) 14/18 BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note Derating curve Power dissipation (total loss) indicates the power that can be consumed by IC at Ta=25(normal temperature).IC is heated when it consumed power, and the temperature of IC ship becomes higher than ambient temperature. The temperature that can be accepted by IC chip depends on circuit configuration, manufacturing process, and consumable power is limited. Power dissipation is determined by the temperature allowed in IC chip (maximum junction temperature) and thermal resistance of package (heat dissipation capability). The maximum junction temperature is typically equal to the maximum value in the storage package (heat dissipation capability). The maximum junction temperature is typically equal to the maximum value in the storage temperature range. Heat generated by consumed power of IC radiates from the mold resin or lead frame of the package. The parameter which indicates this heat dissipation capability (hardness of heat release) is called thermal resistance, represented by the symbol j-a[/W]. The temperature of IC inside the package can be estimated by this thermal resistance. Fig.93 (a) shows the model of thermal resistance of the package. Thermal resistance ja, ambient temperature Ta, junction temperature Tj, and power dissipation Pd can be calculated by the equation below : ja (Tj-Ta) / Pd [/W] () Derating curve in Fig.93 (b) indicates power that can be consumed by IC with reference to ambient temperature. Power that can be consumed by IC begins to attenuate at certain ambient temperature. This gradient is determined by thermal resistance ja. Thermal resistance ja depends on chip size, power consumption, package, ambient temperature, package condition, wind velocity, etc even when the same of package is used. Thermal reduction curve indicates a reference value measured at a specified condition. Fig94(c)-(f) show a derating curve for an example of BU7251family, BU7252 family, BU7231 family, BU7232 family. Power dissipation Pd:[W] LSI[W] Pd(max) ja = ( Tj Ta ) / Pd [/W] P2 ja2 < ja1 Ambient temperature Ta [] ja2 P1 Tj(max) ja1 Chip surface temperature Tj [] 0 Power dissipation P [W] 25 50 75 Ambient temperature:Ta[] Ta[] 100 T j(max) POWER DISSIPATION [mW] . POWER DISSIPATION [mW] . 1000 600 540[mw] BU7251G(*8) BU7231G(*8) 400 200 0 800 620[mw] 600 480[mw] BU7252FVM(*10) BU7232FVM(*10) 400 200 50 85 100 150 0 AMBIENT TEMPERATURE [] (c) BU7251G 50 85 100 (d) BU7252F/FVM BU7231G BU7232F/FVM 1000 540[mw] POWER DISSIPATION [mW] . 600 BU7251SG(*8) BU7231SG(*8) 400 200 800 620[mw] 0 50 100 105 400 200 0 150 50 105 100 150 AMBIENT TEMPERATURE [] AMBIENT TEMPERATURE [] (e) BU7251SG BU7252SF(*9) BU7232SF(*9) 480[mw] BU7252SFVM(*10) BU7232SFVM(*10) 600 0 0 BU7231SG (f) BU7252S F/FVM (*9) 6.2 BU72432S F/FVM (*10) 4.8 When using the unit above Ta=25[], subtract the value above per degree[]. Permissible dissipation is the value when FR4 glass epoxy board 70[mm]x70[mm]x1.6[mm] (cooper foil area below 3[%]) is mounted. Fig. 94. 150 AMBIENT TEMPERATURE [] 800 POWER DISSIPATION [mW] . BU7252F(*9) BU7232F(*9) 0 0 (*8) 5.4 150 BU7251/BU7231 (b) Derating curve (a) Thermal resistance Fig. 93. Thermal resistance and power dissipation 800 125 Derating curve 15/18 Unit [mW/] BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note Notes for use 1) Absolute maximum ratings Absolute maximum ratings are the values which indicate the limits, within which the given voltage range can be safely charged to the terminal.However, it does not guarantee the circuit operation. 2) Applied voltage to the input terminal For normal circuit operation of voltage comparator, please input voltage for its input terminal within input common mode voltage VDD+0.3[V].Then, regardless of power supply voltage,VSS-0.3[V] can be applied to inputterminals without deterioration or destruction of its characteristics. 3) Operating power supply (split power supply/single power supply) The voltage comparator operates if a given level of voltage is applied between VDD and VSS. Therefore, the operational amplifier can be operated under single power supply or split power supply. 4) Power dissipation (pd) If the IC is used under excessive power dissipation. An increase in the chip temperature will cause deterioration of the radical characteristics of IC. For example, reduction of current capability. Take consideration of the effective power dissipation and thermal design with a sufficient margin. Pd is reference to the provided power dissipation curve. 5) Short circuits between pins and incorrect mounting Short circuits between pins and incorrect mounting when mounting the IC on a printed circuits board, take notice of the direction and positioning of the IC. If IC is mounted erroneously, It may be damaged. Also, when a foreign object is inserted between output, between output and VDD terminal or VSS terminal which causes short circuit, the IC may be damaged. 6) Using under strong electromagnetic field Be careful when using the IC under strong electromagnetic field because it may malfunction. 7) Usage of IC When stress is applied to the IC through warp of the printed circuit board, The characteristics may fluctuate due to the piezo effect. Be careful of the warp of the printed circuit board. 8) Testing IC on the set board When testing IC on the set board, in cases where the capacitor is connected to the low impedance,make sure to discharge per fabrication because there is a possibility that IC may be damaged by stress. When removing IC from the set board, it is essential to cut supply voltage. As a countermeasure against the static electricity, observe proper grounding during fabrication process and take due care when carrying and storage it. 9) The IC destruction caused by capacitive load The transistors in circuits may be damaged when VDD terminal and VSS terminal is shorted with the charged output terminal capacitor. When IC is used as a operational amplifier or as an application circuit,where oscillation is not activated by an output capacitor,the output capacitor must be kept below 0.1[F] in order to prevent the damage mentioned above. 10) Decupling capacitor Insert the deculing capacitance between VDD and VSS, for stable operation of operational amplifier. 11) Latch up Be careful of input vltage that exceed the VDD and VSS. When CMOS device have sometimes occur latch up operation. And protect the IC from abnormaly noise 16/18 BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note Ordering part number B U 7 Part No. 2 5 2 Part No. 7231 , 7231S 7251 , 7251S 7252 , 7252S 7232 , 7232S F V M - Package G: SSOP5 F: SOP8 FVM: MSOP8 T R Packaging and forming specification E2: Embossed tape and reel (SOP8) TR: Embossed tape and reel (SSOP5/MSOP8) SOP8 <Tape and Reel information> 7 5 6 6.20.3 4.40.2 0.3MIN 8 +6 4 -4 0.90.15 5.00.2 (MAX 5.35 include BURR) 1 2 3 Tape Embossed carrier tape Quantity 2500pcs Direction of feed E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 4 0.595 1.50.1 +0.1 0.17 -0.05 0.11 S 1.27 0.420.1 Direction of feed 1pin Reel (Unit : mm) Order quantity needs to be multiple of the minimum quantity. SSOP5 5 4 1 2 0.2Min. +0.2 1.6 -0.1 2.80.2 <Tape and Reel information> +6 4 -4 2.90.2 3 Tape Embossed carrier tape Quantity 3000pcs Direction of feed TR The direction is the 1pin of product is at the upper right when you hold ( reel on the left hand and you pull out the tape on the right hand 1pin +0.05 0.13 -0.03 0.050.05 1.10.05 1.25Max. ) +0.05 0.42 -0.04 0.95 0.1 Direction of feed (Unit : mm) Reel 17/18 Order quantity needs to be multiple of the minimum quantity. BU7251G,BU7251SG, BU7231G,BU7231SG, BU7252F/FVM,BU7252S F/FVM,BU7232F/FVM,BU7232S F/FVM Technical Note MSOP8 <Tape and Reel information> 2.80.1 4.00.2 8 7 6 5 0.60.2 +6 4 -4 0.290.15 2.90.1 (MAX 3.25 include BURR) Tape Embossed carrier tape Quantity 3000pcs Direction of feed TR The direction is the 1pin of product is at the upper right when you hold ( reel on the left hand and you pull out the tape on the right hand ) 1 2 3 4 1PIN MARK 1pin +0.05 0.145 -0.03 0.475 0.080.05 0.750.05 0.9MAX S +0.05 0.22 -0.04 0.08 S Direction of feed 0.65 Reel (Unit : mm) 18/18 Order quantity needs to be multiple of the minimum quantity. Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). 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