19-3174; Rev 1; 10/05 KIT ATION EVALU LE B A IL A AV Low-Cost, Linear-Regulator LCD Panel Power Supplies The MAX8710/MAX8711/MAX8712/MAX8761 offer complete linear-regulator power-supply solutions for thin-film transistor (TFT) liquid-crystal-display (LCD) panels used in LCD monitors and LCD TVs. All four devices include a high-performance AV DD linear regulator, a positive charge-pump regulator, a negative charge-pump regulator, and built-in power-up sequence control. The MAX8710/MAX8711/MAX8761 also include a high-current operational amplifier. Additionally, the MAX8710/ MAX8761 provide logic-controlled high-voltage switches to control the positive charge-pump output. The linear regulator directly steps down the input voltage to generate the supply voltage for the source-driver ICs (AV DD ). The two built-in charge-pump regulators are used to generate the TFT gate-on and gate-off supplies. The high-current operational amplifier is typically used to drive the LCD backplane (VCOM) and features high output current (150mA), fast slew rate (12V/s), and wide bandwidth (12MHz). Its rail-to-rail inputs and output maximize flexibility. The MAX8710/MAX8761 are available in a 24-pin thin QFN package, the MAX8711 is available in a 16-pin thin QFN package, and the MAX8712 is available in a 12-pin thin QFN package. All three packages are 4mm x 4mm with a maximum thickness of 0.8mm for ultra-thin LCD panel design. The MAX8710/MAX8711/MAX8712 operate over the -40C to +100C temperature range and the MAX8761 operates over the -40C to +85C range. Applications LCD Monitor Panel Modules LCD TV Panel Modules Features High-Performance Linear Regulator 1.6% Output Accuracy Works with Small Ceramic Output Capacitors Fast Transient Response Foldback Current Limit 50mA Negative Regulated Charge Pump 20mA Positive Regulated Charge Pump with Adjustable Delay Built-In Power-Up Sequence High-Current Operational Amplifier (MAX8710/MAX8711/MAX8761) 150mA Output Short-Circuit Current 12V/s Slew Rate 12MHz, -3dB Bandwidth Rail-to-Rail Inputs/Output Dual-ModeTM High-Voltage Switches (MAX8710/MAX8761) Thermal Protection Latched Fault Protection with Timer Ordering Information PART TEMP RANGE PIN-PACKAGE PKG CODE MAX8710ETG+ -40C to +100C 24 Thin QFN 4mm x 4mm T2444-4 MAX8711ETE+ -40C to +100C 16 Thin QFN 4mm x 4mm T2444-4 MAX8712ETC+ -40C to +100C 12 Thin QFN 4mm x 4mm T2444-4 MAX8761ETG+ -40C to +85C 24 Thin QFN 4mm x 4mm T2444-4 +Denotes lead-free package. Minimum Operating Circuit SHDN FBP THR SUPB OUTB GND Pin Configurations 18 17 16 15 14 13 IN IN TOP VIEW INL GND REF CTL 19 12 N.C. FBL 20 11 DRVP MODE 21 10 DRVN DLP 22 9 SUPCP FBN 23 8 OUTL AVDD OUTL REF FBL FBN MAX8710 SRC MAX8710 MAX8761 24 7 5 6 THIN QFN 4mm x 4mm Pin Configurations continued at end of data sheet. SUPCP SHDN DRVN DRVP DLP AVDD VCOM VP POSB AVDD SUPB FBP OUTB NEGB SRC MODE NEGB 4 INL REF 3 POSB DRN GON 2 VGOFF IN + 1 MAX8761 VIN GON CTL CTL VGON REF DRN THR Dual Mode is a trademark of Maxim Integrated Products, Inc. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX8710/MAX8711/MAX8712/MAX8761 General Description MAX8710/MAX8711/MAX8712/MAX8761 Low-Cost, Linear-Regulator LCD Panel Power Supplies ABSOLUTE MAXIMUM RATINGS CTL, FBL, FBP, FBN, SHDN, REF, THR to GND........-0.3V to +6V MODE, DLP to GND ......................................-0.3V to VREF + 0.3V IN, INL to GND .........................................................-0.3V to +28V SUPCP, SUPB to GND.............................................-0.3V to +14V OUTL (MAX8710/MAX8761) ...........................-0.3V to +28V OUTL (MAX8711/MAX8712) ...........................-0.3V to +14V POSB, OUTB, NEGB to GND .....................-0.3V to VSUPB + 0.3V DRVN, DRVP (MAX8710/MAX8761) .......-0.3V to (VSUPCP - 0.3V) DRVN, DRVP (MAX8711/MAX8712)...............-0.3V to (VIN - 0.3V) SRC to GND .............................................................-0.3V to +30V GON, DRN to GND .......................................-0.3V to VSRC + 0.3V DRN to GON .............................................................-30V to +30V OUTB Maximum Continuous Output Current.....................75mA DRVP RMS Output Current...................................................90mA DRVN RMS Output Current ...............................................-150mA Continuous Power Dissipation (TA = +70C) 24-, 16-, and 12-Pin Thin QFN 4mm x 4mm (derate 16.9mW/C above +70C) ..............................1349mW Operating Temperature Range MAX8710/MAX8711/MAX8712 .......................-40C to +100C MAX8761 ...........................................................-40C to +85C Junction Temperature........................................................+150C Storage Temperature Range ..............................-65C to +160C Lead Temperature (soldering, 10s)...................................+300C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (Circuit of Figure 1. VIN = VINL = VSUPCP = 12V, VOUTL = VSUPB = 10V, VSRC = 27V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.) PARAMETER CONDITIONS IN Operating Supply Range IN Quiescent Current TYP MAX UNITS 28 V 0.2 0.4 8 SHDN = GND SHDN = 3.3V Duration to Trigger Fault Condition 216 oscillator clock cycles REF Output Voltage -10A < IREF < 1mA (excluding internal load) SUPCP Input Supply Range 2.5 44 4.9 5.0 2.7 Charge-Pump Regulators Operating Frequency Thermal Shutdown MIN 1275 Rising temperature, 15C hysteresis 1500 mA ms 5.1 V 13.2 V 1725 kHz C +160 LINEAR REGULATOR INL Operation Supply Range 7 28 IOUTL = 50mA (MAX8710/MAX8711/MAX8712) 150 300 IOUTL = 200mA (MAX8761) 200 400 FBL Regulation Voltage IOUTL = 50mA 2.46 FBL Input Bias Current VFBL = 2.5V FBL Fault Trip Level Falling edge FBL Line-Regulation Error VINL = VIN = 10.8V~13.2V, VOUTL = 10V, IOUTL = 50mA Bandwidth Guaranteed by design 1000 VFBL = 2.4V (MAX8710/MAX8711/MAX8712) 300 VFBL = 2.4V (MAX8761) 500 Dropout Voltage VOUTL < VINL 1.92 2.00 V 50 nA 2.08 V mV 10 kHz mA OUTL Soft-Start Period 212 oscillator clock cycles in a 7-bit DAC OUTL Load Regulation VIN = 12V, 5mA < IOUT < 300mA (MAX8710/MAX8711/MAX8712) 2 VIN = 12V, 5mA < IOUT < 500mA (MAX8761) 2 2 mV 2.54 15 VINL = VIN = 10V~28V, VOUTL = 9V, IOUTL = 50mA Maximum OUTL Current 2.50 V 2.73 _______________________________________________________________________________________ ms % Low-Cost, Linear-Regulator LCD Panel Power Supplies (Circuit of Figure 1. VIN = VINL = VSUPCP = 12V, VOUTL = VSUPB = 10V, VSRC = 27V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS 13.2 V OPERATIONAL AMPLIFIER (MAX8710/MAX8711/MAX8761) SUPB Supply Operating Range 4.5 SUPB Supply Current Buffer configuration, VPOSB = 4V, no load 0.7 1.0 mA Input Offset Voltage (VNEGB, VPOSB) = VSUPB / 2, TA = +25C 0 12 mV Input Bias Current (VNEGB, VPOSB) = VSUPB / 2 +1 +50 nA Common-Mode Input Range VNEGB, VPOSB 0 Common-Mode Rejection Ratio 0 (VNEGB, VPOSB) < VSUPB 50 -50 Open-Loop Gain VSUPB dB 125 dB IOUTB = 100A VSUPB - VSUPB 15 2 IOUTB = 5mA VSUPB - VSUPB 150 80 mV Output Voltage Swing High Output Voltage Swing Low Short-Circuit Current V 90 IOUTB = -100A 2 15 IOUTB = -5mA 80 150 Short to VSUPB / 2, sourcing 50 150 Short to VSUPB / 2, sinking 50 140 Output Current Buffer configuration, VPOSB = 4V, VOUTB error < 10mV Power-Supply Rejection Ratio 6V VSUPB 13.2V, DC (VNEGB, VPOSB) = VSUPB / 2 60 Slew Rate mV mA 40 mA 100 dB 12 V/s -3dB Bandwidth Buffer configuration, RL = 10k, CL = 10pF 12 MHz Gain-Bandwidth Product Buffer configuration, RL = 10k, CL = 10pF 8 MHz POSITIVE CHARGE-PUMP REGULATOR FBP Regulation Voltage IGON = 10mA FBP Line-Regulation Error VOUTL (VSUPCP, MAX8710/MAX8761) = 10.8V~13.2V, VGON = 27V, IGON = 20mA FBP Input Bias Current VFBP = 2.5V 2.425 -50 DRVP p-Channel On-Resistance DRVP n-Channel On-Resistance 2.500 VFBP = 2.4V VFBP = 2.6V 20 FBP Fault Trip Level Falling edge 1.92 Positive Charge-Pump Soft-Start Period 212 oscillator clock cycles in a 7-bit DAC 2.575 V 25 mV +50 nA 15 30 6 12 k 2.00 2.08 2.73 V ms NEGATIVE CHARGE-PUMP REGULATOR FBN Regulation Voltage IGOFF = 10mA 200 FBN Input Bias Current VFBN = 250mV -50 FBN Line Regulation VOUTL (VSUPCP, MAX8710/MAX8761) = 10.8V~13.2V, VVGOFF = -6V, IGOFF = -50mA DRVN p-Channel On-Resistance 250 7.5 300 mV +50 nA 25 mV 15 _______________________________________________________________________________________ 3 MAX8710/MAX8711/MAX8712/MAX8761 ELECTRICAL CHARACTERISTICS (continued) MAX8710/MAX8711/MAX8712/MAX8761 Low-Cost, Linear-Regulator LCD Panel Power Supplies ELECTRICAL CHARACTERISTICS (continued) (Circuit of Figure 1. VIN = VINL = VSUPCP = 12V, VOUTL = VSUPB = 10V, VSRC = 27V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.) PARAMETER DRVN n-Channel On-Resistance CONDITIONS MIN VFBN = 350mV VFBN = 150mV TYP MAX 3 6 20 UNITS k FBN Fault Trip Level Rising edge 700 mV Negative Charge-Pump Soft-Start Period 212 oscillator clock cycles in a 7-bit DAC 2.73 ms SEQUENCE CONTROL SHDN Input Low Voltage SHDN Input High Voltage V 1 A A V SHDN Input Current DLP Capacitor Charge Current 0.6 2.0 During startup, VDLP = 1.0V DLP Turn-On Threshold 4 5 6 2.375 2.5 2.625 SHDN = low or fault tripped; DLP, FBP, FBN to GND Pin Discharge Switch On-Resistance SHDN = low or fault tripped; MODE, OUTL, OUTB to GND MAX8710, SHDN = low or fault trip; GON to GND V 10 1 k POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES (MAX8710/MAX8761) CTL Input Low Voltage CTL Input High Voltage 2.0 CTL Input Leakage Current -1 0.6 V +1 A V CTL to GON Rising Propagation Delay VMODE = VREF, 1.5nF from GON to GND, VCTL = 0 to 3V step, no load on GON, measured from VCTL = 1.5V to GON = 20% 100 ns CTL to GON Falling Propagation Delay VMODE = VREF, 1.5nF from GON to GND, VCTL = 3V to 0 step, DRN falling, no load on DRN and GON, measured from VCTL = 1.5V to GON = 80% 100 ns SRC Input Current DRN Input Current VMODE = VREF, VDLP = 3V, CTL = high 150 VMODE = VREF, VDRN = 8V, VDLP = 3V, VCTL = 0V SRC Switch On-Resistance VMODE = VREF, VDLP = 3V, CTL = high DRN Switch On-Resistance VMODE = VREF, VDLP = 3V, VCTL = 0V 60 1 k SRC Input Voltage Range MODE Switch On-Resistance Mode 2 MODE Capacitor Charge Current VMODE < MODE current-source stop voltage threshold MODE Voltage Threshold for Enabling DRN Switch Control in Mode 2 MODE Current-Source Stop Voltage Threshold THR to GON Voltage Gain GON Falling Slew Rate 4 VMODE rising, CMODE = 150pF 28 V 250 A 26 40 A 20 40 42 50 64 A 2.3 2.5 2.7 V 3.3 3.5 3.7 V 10 10.6 9.4 13.5 _______________________________________________________________________________________ V/V V/s Low-Cost, Linear-Regulator LCD Panel Power Supplies (Circuit of Figure 1. VIN = VINL = VSUPCP = 12V, VOUTL = VSUPB = 10V, VSRC = 27V, TA = -40C to +100C (-40C to 85C for MAX8761), unless otherwise noted.) (Note 1) PARAMETER REF Output Voltage CONDITIONS -10A < IREF < 1mA (excluding internal load) SUPCP Input Supply Range Charge-Pump Regulators Operating Frequency MIN MAX UNITS 4.9 TYP 5.1 V 2.7 13.2 V 1200 1850 kHz LINEAR REGULATOR Dropout Voltage IOUTL = 50mA (MAX8710/MAX8711/MAX8712) 300 IOUTL = 200mA (MAX8761) 400 mV FBL Regulation Voltage IOUTL = 50mA 2.455 2.545 V FBL Fault Trip Level Falling edge 1.96 2.04 V FBL Line-Regulation Error VINL = VIN = 10.8V~13.2V, VOUTL = 10V, IOUTL = 50mA 15 mV Maximum OUTL Current OUTL Load Regulation VFBL = 2.4V (MAX8710/MAX8711/MAX8712) 300 VFBL = 2.4V (MAX8761) 500 mA VIN = 12V, 5mA < IOUT < 300mA (MAX8710/MAX8711/MAX8712) 2 VIN = 12V, 5mA < IOUT < 500mA (MAX8761) 2 % OPERATIONAL AMPLIFIER (MAX8710/MAX8711/MAX8761) SUPB Supply Current Buffer configuration, VPOSB = 4V, no load 1.0 mA Input Offset Voltage (VNEGB, VPOSB) = VSUPB / 2 14 mV IOUTB = 100A VSUPB 15 IOUTB = 5mA VSUPB 150 mV Output-Voltage-Swing High Output-Voltage-Swing Low Short-Circuit Current IOUTB = -100A 15 IOUTB = -5mA 150 Short to VSUPB / 2, sourcing 50 Short to VSUPB / 2, sinking 50 mV mA POSITIVE CHARGE-PUMP REGULATOR FBP Regulation Voltage FBP Line-Regulation Error IGON = 10mA MAX8710/MAX8711/MAX8712 2.425 2.575 MAX8761 2.40 2.65 VOUTL (VSUPCP, MAX8710) = 10.8V~13.2V, VGON = 27V, IGON = 20mA 25 VOUTL (VSUPCP, MAX8761) = 10.8V ~ 13.2V, VGON = 27V, IGON = 20mA 50 mV DRVP p-Channel On-Resistance DRVP n-Channel On-Resistance 30 VFBP = 2.4V VFBP = 2.6V V 12 20 k NEGATIVE CHARGE-PUMP REGULATOR FBN Regulation Voltage IGOFF = 10mA FBN Line Regulation VOUTL (VSUPCP, MAX8710/MAX8761) = 10.8V~13.2V, VGOFF = -6V, IGOFF = -50mA DRVN p-Channel On-Resistance 200 300 mV 25 mV 15 _______________________________________________________________________________________ 5 MAX8710/MAX8711/MAX8712/MAX8761 ELECTRICAL CHARACTERISTICS ELECTRICAL CHARACTERISTICS (continued) (Circuit of Figure 1. VIN = VINL = VSUPCP = 12V, VOUTL = VSUPB = 10V, VSRC = 27V, TA = -40C to +100C, (-40C to +85C for MAX8761), unless otherwise noted.) (Note 1) PARAMETER CONDITIONS MIN TYP VFBN = 350mV DRVN n-Channel On-Resistance MAX 6 VFBN = 150mV 20 MAX8710/MAX8711/MAX8712 2.0 MAX8761 2.05 UNITS k SEQUENCE CONTROL SHDN Input Low Voltage 0.6 SHDN Input High Voltage DLP Capacitor Charge Current During startup, VDLP = 1.0V DLP Turn-On Threshold V V 4 6 A 2.375 2.625 V POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES (MAX8710/MAX8761) SRC Input Current VMODE = VREF, VDLP = 3V, CTL = high 250 A DRN Input Current VMODE = VREF, VDRN = 8V, VDLP = 3V, VCTL = 0V 40 A SRC Switch On-Resistance VMODE=VREF, VDLP = 3V, CTL = high 40 Mode 2 MODE Capacitor Charge Current VMODE < MODE current-source stop voltage threshold 42 64 A 2.3 2.7 V MODE Voltage Threshold for Enabling DRN Switch Control in Mode 2 Note 1: Specifications to -40C and +85C are guaranteed by design, not production tested. Typical Operating Characteristics (Circuit of Figure 1. VIN = VINL = VSUPCP = 12V, VOUTL = VSUPB = 10V, VSRC = 27V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.) IOUTL = 300mA -2 -3 -4 -0.8 -1.2 IOUTL = 500mA 12 14 16 18 20 22 INPUT VOLTAGE (V) 24 26 0 -0.5 VOUTL = 10V VINL = 12V -1.0 VOUTL = 10V -1.5 -2.0 10 MAX8710/11/12/61 toc03 IOUTL = 50mA -0.4 -1.6 VOUTL = 10V -5 6 0 0.5 OUTPUT-VOLTAGE ERROR (%) IOUTL = 50mA -1 MAX8710/11/12/61 toc02 0 0.4 OUTPUT-VOLTAGE ERROR (%) MAX8710/11/12/61 toc01 1 MAX8710/MAX8711/MAX8712 LINEAR-REGULATOR LOAD REGULATION MAX8761 LINEAR REGULATOR LINE REGULATION MAX8710/MAX8711/MAX8712 LINEAR-REGULATOR LINE REGULATION OUTPUT-VOLTAGE ERROR (%) MAX8710/MAX8711/MAX8712/MAX8761 Low-Cost, Linear-Regulator LCD Panel Power Supplies 28 10 12 14 16 18 20 INPUT VOLTAGE (V) 22 24 26 1 10 100 LOAD CURRENT (mA) _______________________________________________________________________________________ 1000 Low-Cost, Linear-Regulator LCD Panel Power Supplies MAX8761 LINEAR-REGULATOR LOAD REGULATION MAX8761 LINEAR-REGULATOR LOAD TRANSIENT RESPONSE MAX8710/11/12/61 toc05 0 VOUTL = 10V VINL = 12V -0.4 MAX8710/11/12/61 toc06 MAX8710/11/12/61 toc04 0.4 10V A A -0.8 B -1.2 B -1.6 0mA LOAD CURRENT (mA) -2.0 0 100 200 300 400 20s/div 500 MAX8710/MAX8711/MAX8712 LINEARREGULATOR PULSED LOAD-TRANSIENT RESPONSE 40s A: VOUTL, 50mV/div, AC-COUPLED B: IOUTL, 200mA/div A: IOUTL, 200mA/div B: VOUTL, AC-COUPLED, 20mV/div MAX8761 LINEAR-REGULATOR PULSED LOAD TRANSIENT RESPONSE MAX8710/MAX8711/MAX8712 LINEARREGULATOR OVERCURRENT PROTECTION MAX8710/11/12/61 toc07 MAX8710/11/12/61 toc09 MAX8710/11/12/61 toc08 10V A A A 0V B B 0mA B 0mA 4s/div 10ms/div 10s A: IOUTL, 500mA/div B: VOUTL, AC-COUPLED, 100mV/div A: VOUTL, 100mV/div, AC-COUPLED B: IOUTL, 500mA/div MAX8761 LINEAR REGULATOR OVERCURRENT PROTECTION A: VOUTL, 5V/div B: IOUTL, 500mA/div POSITIVE CHARGE-PUMP LOAD REGULATION CHARGE-PUMP NO-LOAD SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.9 A 1.8 1.7 1.6 0.5 MAX8710/11/12/61 toc07 MAX8710/11/12/61 toc11 2.0 OUTPUT-VOLTAGE ERROR (%) MAX8710/11/12/61 toc10 SUPPLY CURRENT (mA) OUTPUT-VOLTAGE ERROR (%) MAX8710/MAX8711/MAX8712 LINEARREGULATOR LOAD TRANSIENT RESPONSE 0 -0.5 -1.0 -1.5 B INPUT = 12V -2.0 1.5 10s A: VOUTL, 5V/div B: IOUTL, 500mA/div 8 9 10 11 12 SUPPLY VOLTAGE (V) 13 14 0 10 20 30 40 50 LOAD CURRENT (mA) _______________________________________________________________________________________ 7 MAX8710/MAX8711/MAX8712/MAX8761 Typical Operating Characteristics (continued) (Circuit of Figure 1. VIN = VINL = VSUPCP = 12V, VOUTL = VSUPB = 10V, VSRC = 27V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.) Typical Operating Characteristics (continued) (Circuit of Figure 1. VIN = VINL = VSUPCP = 12V, VOUTL = VSUPB = 10V, VSRC = 27V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.) POSITIVE CHARGE-PUMP LINE REGULATION -0.4 -0.6 -0.8 -0.25 -0.50 -0.75 MAX8710/11/12/61 toc15 0 0.2 MAX8710/11/12 toc14 VGOFF = -5V INPUT = 12V OUTPUT-VOLTAGE ERROR (%) -0.2 0.25 OUTPUT-VOLTAGE ERROR (%) 0 NEGATIVE CHARGE-PUMP LINE REGULATION NEGATIVE CHARGE-PUMP LOAD REGULATION MAX8710/11/12/61 toc13 0.2 OUTPUT-VOLTAGE ERROR (%) 0 -0.2 -0.4 -0.6 -0.8 -1.00 VGOFF = -5V IGOFF = 50mA 20mA LOAD CURRENT -1.0 -1.0 -1.25 10 11 12 14 13 0 20 40 INPUT VOLTAGE (V) 60 80 7 100 8 9 10 11 MAX8710/MAX8761 SWITCH CONTROL FUNCTION (MODE 1) POWER-UP SEQUENCE MAX8710/11/12/61 toc16 MAX8710/11/12/61 toc17 A 0V A 0V B 0V CGON = 1.5nF B 0V C C 0V 0V 10ms/div 20s/div A: VOUTL, 10V/div B: VGOFF, 5V/div C: VGON, 10V/div A: VGON, 10V/div B: VMODE, 5V/div C: VCTL, 5V/div MAX8710/MAX8761 SWITCH CONTROL FUNCTION (MODE 2) REFERENCE LOAD REGULATION MAX8710/11/12/61 toc18 0V CGON = 1.5nF B 0V MAX8710/11/12/61 toc19 0 A -0.02 -0.04 -0.06 -0.08 C 0V 20s/div A: VGON, 10V/div B: VMODE, 5V/div C: VCTL, 5V/div 8 12 INPUT VOLTAGE (V) LOAD CURRENT (mA) REF VOLTAGE ERROR (%) MAX8710/MAX8711/MAX8712/MAX8761 Low-Cost, Linear-Regulator LCD Panel Power Supplies -0.10 0 0.2 0.4 0.6 0.8 REF LOAD CURRENT (mA) _______________________________________________________________________________________ 1.0 13 14 Low-Cost, Linear-Regulator LCD Panel Power Supplies MAX8710/MAX8711/MAX8761 SUPB SUPPLY CURRENT vs. SUPB VOLTAGE REFERENCE vs. TEMPERATURE -0.2 -0.4 MAX8710/11/12/61 toc21 0 MAX8710/11/12/61 toc22 1.0 SUPB SUPPLY CURRENT (mA) MAX8710/11/12/91 toc20 REF VOLTAGE ERROR (%) 0.2 MAX8710/MAX8711/MAX8761 OPERATIONALAMPLIFIER SMALL-SIGNAL STEP RESPONSE (BUFFER CONFIGURATION) 0.8 A 0V 0.6 0.4 B 0V 0.2 BUFFER CONFIGURATION VOUTB = 0.5 x VPOSB -0.6 0 -40 -20 0 20 40 60 80 100 4 6 8 10 12 14 400ns/div TEMPERATURE (C) SUPB VOLTAGE (V) MAX8710/MAX8711/MAX8761 OPERATIONALAMPLIFIER LARGE-SIGNAL STEP RESPONSE (BUFFER CONFIGURATION) MAX8710/MAX8711/MAX8761 OPERATIONALAMPLIFIER LOAD TRANSIENT RESPONSE (BUFFER CONFIGURATION) A: VPOSB, 50mV/div, AC-COUPLED B: VOUTB, 50mV/div, AC-COUPLED MAX8710/MAX8711/MAX8761 OPERATIONALAMPLIFIER RAIL-TO-RAIL I/O MAX8710/11/12/61 toc24 MAX8710/11/12/61 toc23 MAX8710/11/12/61 toc25 A A 5V A 0V 0V B B B 1s/div 400ns/div A: VPOSB, 5V/div B: VOUTB, 5V/div 0V 0mA 0V A: VOUTB, 2V/div B: IOUTB, 50mA/div 40s/div A: VPOSB, 5V/div B: VOUTB, 5V/div _______________________________________________________________________________________ 9 MAX8710/MAX8711/MAX8712/MAX8761 Typical Operating Characteristics (continued) (Circuit of Figure 1. VIN = VINL = VSUPCP = 12V, VOUTL = VSUPB = 10V, VSRC = 27V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.) MAX8710/MAX8711/MAX8712/MAX8761 Low-Cost, Linear-Regulator LCD Panel Power Supplies Pin Description PIN NAME FUNCTION -- GON Internal High-Voltage MOSFET Switch Common Terminal. GON is the output of the high-voltage switch-control block. GON is internally pulled to GND by a 1k resistor in shutdown for the MAX8710. GON is not pulled to GND for the MAX8761. -- -- DRN Switch Input. Drain of the internal high-voltage back-to-back p-channel MOSFETs connected to GON. 3 1 1 REF Reference Output. Connect a 0.22F capacitor from REF to GND. REF remains on in shutdown. 4 2 -- POSB 5 3 2 INL 6 4 -- NEGB 7 5 3 IN MAX8710/ MAX8761 MAX8711 MAX8712 1 -- 2 Operational-Amplifier Inverting Input IC Supply Input. Bypass IN to GND with a 0.1F capacitor. 8 6 4 OUTL Linear-Regulator Output. OUTL is internally pulled to GND by a 1k resistor in shutdown. For the MAX8711/MAX8712, OUTL is also the supply input for the charge-pump regulators. 9 -- -- SUPCP Supply Input for the Charge-Pump Regulators. Connect a 0.1F capacitor from SUPCP to GND. 10 7 5 DRVN Negative Charge-Pump Driver Output. Output high level is VSUPCP, and output low level is GND. DRVN is internally pulled high to SUPCP when the negative charge pump is disabled. 11 8 6 DRVP Positive Charge-Pump Driver Output. Output high level is VSUPCP, and output low level is GND. DRVP is internally pulled low in shutdown. 12 -- -- N.C. No Connection. Not internally connected. 13 9 7 GND Ground 14 10 -- OUTB Operational-Amplifier Output. OUTB is internally pulled to GND by a 1k resistor in shutdown. 15 11 -- SUPB Operational-Amplifier Supply Input. Bypass SUPB to GND with a 0.1F capacitor. 16 17 10 Operational-Amplifier Noninverting Input Linear-Regulator Supply Input -- 12 -- 8 THR GON Low-Level Regulation Set-Point Input. Connect THR to the center of a resistive voltage-divider between REF and GND to set the VGON regulation level. The actual level is 10 x VTHR. See the Switch Control (MAX8710/MAX8761) section for details. FBP Positive Charge-Pump Feedback Input. Connect FBP to the center of a resistive voltage-divider between the positive charge-pump regulator output and GND to set the regulator output voltage. Place the divider within 5mm of FBP. FBP is internally pulled to GND by a 10 resistor in shutdown. ______________________________________________________________________________________ Low-Cost, Linear-Regulator LCD Panel Power Supplies PIN NAME FUNCTION MAX8710/ MAX8761 MAX8711 MAX8712 18 13 9 SHDN Active-Low Shutdown Control Input. Pull SHDN low to turn off all sections of the device except REF. Pull SHDN high to enable the device. Cycle SHDN to reset the device after a fault. 19 -- -- CTL High-Voltage Switch-Control Block Timing Control Input. See the Switch Control (MAX8710/MAX8761) section for details. 20 14 10 FBL Linear-Regulator Feedback Input. Connect FBL to the center of a resistive voltage-divider between the linear-regulator output and GND to set the linearregulator output voltage. Place the divider within 5mm of FBL. 21 -- -- MODE 22 15 11 DLP 23 16 12 FBN 24 -- -- SRC High-Voltage Switch-Control Block-Mode Selection Input and Timing-Adjustment Input. See the Switch Control (MAX8710/MAX8761) section for details. MODE is high impedance when it is connected to REF. MODE is internally pulled to GND by a 1k resistor during REF UVLO, when VDLP < 2.5V, or in shutdown. Positive Charge-Pump Startup Delay and High-Voltage Switch Delay Input. Connect a capacitor from DLP to GND to set the delay time. A 5A current source charges CDLP. DLP is internally pulled to GND by a 10 resistor in shutdown. Negative Charge-Pump Feedback Input. Connect FBN to the center of a resistive voltage-divider between the negative output and REF to set the output voltage. Place the divider within 5mm of FBN. FBN is internally pulled to GND through a 10 resistor in shutdown. Switch Input. Source of the internal high-voltage p-channel MOSFET connected to GON. Typical Operating Circuit Figures 1, 2, and 3 are the Typical Operating Circuits of the MAX8710/MAX8761, MAX8711, and MAX8712 for generating power rails in TFT LCD panels. The input voltage range is from 10.8V to 13.2V. The AVDD output is 10V at 300mA, the VGON output is 27V at 20mA, and the VGOFF output is -5V at 50mA. Detailed Description The MAX8710/MAX8711/MAX8712/MAX8761 include a high-performance linear regulator, a positive chargepump regulator, a negative charge-pump regulator, and built-in power-up sequence control. The MAX8710/ MAX8711/MAX8761 also include a high-current operational amplifier. Additionally, the MAX8710/MAX8761 provide logic-controlled high-voltage switches to control the positive charge-pump output. The linear regulator directly steps down the input voltage to generate the source-dri- ver ICs' supply voltage. The two built-in charge-pump regulators are used to generate the TFT gate-on and gate-off supplies. The high-current operational amplifier is typically used to drive the LCD backplane (VCOM) and features high output current (150mA), fast slew rate (12V/s), and wide bandwidth (12MHz). Its rail-to-rail inputs and output maximize flexibility. Linear Regulator The MAX8710/MAX8711/MAX8712/MAX8761 contain a linear regulator including a PMOS pass transistor. The MAX8710/MAX8711/MAX8712 can supply an output current of at least 300mA and the MAX8761 can supply at least 500mA. Connect an external resistive voltagedivider between the regulator output and GND with the midpoint connected to FBL to adjust the linear-regulator output. An error amplifier compares the FBL voltage with the 2.5V internal reference voltage and amplifies the difference. If the feedback voltage is higher than the ______________________________________________________________________________________ 11 MAX8710/MAX8711/MAX8712/MAX8761 Pin Description (continued) MAX8710/MAX8711/MAX8712/MAX8761 Low-Cost, Linear-Regulator LCD Panel Power Supplies IN 10.8V TO 13.2V GND 10F 0.1F GND IN N.C. INL OUTL C1 4.7F/10F 47pF/22pF (MAX8710/MAX8761) (MAX8710/MAX8761) AVDD SUPB 0.1F AVDD 10V 300mA/500mA (MAX8710/MAX8761) FBL 120k POSB 100k R1 100k 1% R2 33.2k 1% MAX8710 MAX8761 IN SUPCP 0.1F NEGB 0.1F OUTB OUTB DRVP 0.1F 0.22F MMBD4148SE (FAIRCHILD) DRVN 1F R5 110k 1% VP 27V/20mA FBP FBN R4 33.2k 1% R6 100k 1% 0.47F R3 325k 1% SRC REF REF 5V/1mA 0.1F 0.1F MMBD4148SE (FAIRCHILD) GOFF -5V/50mA MMBD4148SE (FAIRCHILD) 1F 51.1k THR GON 20k 20k GON DRN MODE SHDN SHDN CTL DLP 0.1F 100k Figure 1. MAX8710/MAX8761 Typical Operating Circuit 12 ______________________________________________________________________________________ CTL Low-Cost, Linear-Regulator LCD Panel Power Supplies 10F 0.1F GND IN INL OUTL C1 47pF AVDD 4.7F SUPB 120k MAX8710/MAX8711/MAX8712/MAX8761 IN 10.8V TO 13.2V GND 0.1F AVDD 10V/300mA FBL POSB R1 100k 1% R2 33.2k 1% MAX8711 100k NEGB OUTB OUTB MMBD4148SE (FAIRCHILD) DRVP 0.22F 0.1F DRVN 1F GOFF -5V/50mA MMBD4148 0.1F 0.1F 2x MMBD4148SE (FAIRCHILD) R5 110k 1% 1F FBN R4 33.2k 1% REF GON 27V/20mA FBP R6 100k 1% REF 5V/1mA 1F R3 325k 1% DLP 0.1F 0.47F SHDN SHDN Figure 2. MAX8711 Typical Operating Circuit ______________________________________________________________________________________ 13 MAX8710/MAX8711/MAX8712/MAX8761 Low-Cost, Linear-Regulator LCD Panel Power Supplies IN 10.8V TO 13.2V GND 10F 0.1F GND IN INL OUTL MMBD4148SE (FAIRCHILD) C1 47pF 0.22F DRVN 1F GOFF -5V/50mA R6 100k 1% MAX8712 0.47F R1 100k 1% R2 33.2k 1% MMBD4148 REF REF 5V/1mA AVDD 10V/300mA FBL R5 110k 1% FBN 4.7F 0.1F DRVP 0.1F 0.1F DLP 1F 2x MMBD4148SE (FAIRCHILD) 0.1F 1F SHDN SHDN GON 27V/20mA FBP R4 33.2k 1% R3 325k 1% Figure 3. MAX8712 Typical Operating Circuit reference voltage, the controller lowers the base current of the pnp transistor, which reduces the amount of current delivered to the output. If the feedback voltage is too low, the device increases the pnp transistor's base current, which allows more current to pass to the output and raises the output voltage. The linear regulator also includes an output current limit that protects the internal pass transistor against short circuits. The input voltage range of the linear regulator is from 8V to 28V. The Typical Operating Circuits shown use a 12V input. The output voltage range of the linear regulator (OUTL) is up to 28V (MAX8710/MAX8761) or up to 13.2V (MAX8711/MAX8712). The linear-regulator output is used to generate the AVDD voltage, which is the analog supply rail for source-driver ICs in TFT LCD panels. The typical load of the AVDD supply is a periodic pulsed load, with a peak current of approximately 1A and pulse width of 14 approximately 2s. The typical period of the pulse load is between 8.9s and 31.7s. The excellent transient performance of the linear regulator can easily meet this transient-response requirement. The linear regulator can deliver at least 300mA (500mA for the MAX8761) output current continuously with a 4.7F (10F for the MAX8761) output capacitor. Do not allow the device power dissipation to exceed the package-dissipation limit listed in the Absolute Maximum Ratings section. The power dissipation can be estimated by multiplying the voltage difference between the input and the output with the required maximum continuous output current. For applications where the power dissipation exceeds the package limit, see the External Transistor for Higher Current or Power Dissipation section for more information. ______________________________________________________________________________________ Low-Cost, Linear-Regulator LCD Panel Power Supplies MAX8710/MAX8711/MAX8712/MAX8761 IN IN GND REF REF REF MAX8710 MAX8761 INL LINEAR REG OUTL AVDD FBL FBN VIN SUPCP OSC SHDN DRVN VGOFF DLP DRVP SEQ POSB AVDD AVDD VP SUPB FBP OUTB VCOM NEGB MODE SRC SWITCH CONTROL CTL GON VGON CTL REF DRN THR Figure 4. MAX8710/MAX8761 Functional Diagram ______________________________________________________________________________________ 15 MAX8710/MAX8711/MAX8712/MAX8761 Low-Cost, Linear-Regulator LCD Panel Power Supplies The linear regulator is enabled whenever REF is in regulation and SHDN is logic high. Each time it is enabled, the linear regulator goes through a soft-start routine by ramping up its internal reference voltage from 0 to 2.5V in 128 steps. The soft-start period is 2.73ms (typ), and FBL fault detection is disabled during this period. This soft-start feature effectively limits the inrush current during startup. The linear-regulator current-limit circuitry monitors the current flowing through the internal pass transistor. The internal current limit is approximately 800mA (1.1A for the MAX8761). The linear-regulator output declines when it is not able to supply the load current. If the FBL voltage drops below 0.75V, the current limit folds back to approximately 180mA (250mA for the MAX8761). The MAX8710/MAX8711/MAX8712/MAX8761 monitor the FBL voltage for undervoltage conditions. If VFBL is continuously below 2V (typ) for approximately 44ms, the device latches off. The foldback current-limit circuit, in conjunction with the output undervoltage fault latch and thermaloverload protection, protects the output load and the internal pass transistor against short circuits or overloads. Positive Charge-Pump Regulator The positive charge-pump regulator is typically used to generate the positive supply rail for the TFT LCD gate-dri- ver ICs. The output voltage is set with an external resistive voltage-divider from its output to GND with the midpoint connected to FBP. The number of charge-pump stages and the setting of the feedback divider determine the output voltage of the positive charge-pump regulator. The charge-pump driver includes a high-side p-channel MOSFET (P1) and a low-side n-channel MOSFET (N1) to control the power transfer as shown in Figure 5. The MOSFETs switch at a constant frequency of 1.5MHz. During the first half-cycle, N1 turns on and allows VINPUT (V SUPCP , MAX8710/MAX8761 or VOUTL, MAX8711/ MAX8712) to charge up the flying capacitor CX(POS) through diode D1. The amount of charge transferred from VINPUT to CX(POS) is determined by the on-resistance of N1, which varies according to the output of the feedback error amplifier. The error amplifier compares the feedback signal (FBP) with a 2.5V internal reference and amplifies the difference. If the feedback signal is below the reference, the error-amplifier output increases the supply voltage of N1's gate driver, lowering the onresistance. Similarly, if the feedback signal is above the reference, the error-amplifier output reduces the driver supply voltage, increasing the on-resistance. During the second half-cycle, N1 turns off and P1 turns on, level shifting CX(POS) by VINPUT volts. This connects CX(POS) REF FBN MAX8710 MAX8761 SUPCP VSUPCP D4 P2 VNEG DRVN D1 P1 0.5 x VREF VSUPCP DRVP COUT(NEG) CX(NEG) D3 N2 250mV CX(POS) N1 D2 COUT(POS) OSCILLATOR FBP SEQUENCE Figure 5. Charge-Pump Regulator Functional Diagram 16 VPOS ______________________________________________________________________________________ Low-Cost, Linear-Regulator LCD Panel Power Supplies Negative Charge-Pump Regulator The negative charge-pump regulator is typically used to generate the negative supply rail for the TFT LCD gatedriver ICs. The output voltage is set with an external resistive voltage-divider from its output to REF with the midpoint connected to FBN. The number of charge-pump stages and the setting of the feedback divider determine the output of the negative charge-pump regulator. The charge-pump driver includes a high-side p-channel MOSFET (P2) and a low-side n-channel MOSFET (N2) to control the power transfer as shown in Figure 5. The MOSFETs switch a constant frequency of 1.5MHz. During the first half-cycle, P2 turns on and allows V INPUT to charge up the flying capacitor C X(NEG) through diode D3. During the second half-cycle, P2 turns off and N2 turns on, level shifting CX(NEG) by VINPUT volts. This connects CX(NEG) in parallel with reservoir capacitor COUT(NEG). If the voltage across COUT(NEG) minus a diode drop is greater than the voltage across CX(NEG), charge flows from COUT(NEG) to CX(NEG) until diode D4 turns off. The amount of charge transferred to the output is controlled by the on-resistance of N2, which varies according to the output of the feedback error amplifier. The error amplifier compares the feedback signal (FBN) with a 250mV internal reference and amplifies the difference. If the feedback signal is above the reference, the error-amplifier output increases the supply voltage of N2's gate driver, lowering the on-resistance. Similarly, if the feedback signal is below the reference, the error-amplifier output reduces the driver supply voltage, increasing the on-resistance. The negative charge-pump regulator is enabled when SHDN is logic high and REF reaches regulation. Each time it is enabled, the negative charge-pump regulator goes through a soft-start routine by ramping down its internal reference voltage from 5V to 250mV in 128 steps. The soft-start period is 2.73ms (typ), and FBN fault detection is disabled during this period. The softstart feature effectively limits the inrush current during startup. The MAX8710/MAX8711/MAX8712/MAX8761 also monitor the FBN voltage for undervoltage conditions. If VFBN is continuously above 700mV (typ) for approximately 44ms, the device latches off. Operational Amplifier (MAX8710/MAX8711/MAX8761) The MAX8710/MAX8711/MAX8761s' operational amplifier features high output current (150mA), fast slew rate (7.5V/s), and wide bandwidth (12MHz). The operational amplifier is enabled when REF is in regulation and SHDN is logic high. The output of the amplifier (OUTB) is internally pulled to ground through a 1k resistor in shutdown. The amplifier is typically used to drive the backplane (VCOM) of TFT LCD panels. The LCD backplane consists of a distributed series capacitance and resistance, a load that can be easily driven by this operational amplifier. However, if the operational amplifier is used in an application with a pure capacitive load, steps must be taken to ensure stable operation. As the operational amplifier's capacitive load increases, the amplifier's bandwidth decreases, and its gain peaking increases. To ensure stable operation, a 5 to 50 resistor can be placed between OUTB and the capacitive load to reduce gain peaking. The operational amplifier limits short-circuit current to approximately 150mA if the output is directly shorted to SUPB or to GND. If the short-circuit condition persists, the junction temperature of the IC rises until it trips the IC's thermal-overload protection. Reference Voltage (REF) The reference output is nominally 5V and can source up to 1mA (see the Typical Operating Characteristics). Bypass REF with a 0.22F ceramic capacitor connected between REF and GND. The reference remains enabled in shutdown. ______________________________________________________________________________________ 17 MAX8710/MAX8711/MAX8712/MAX8761 in parallel with the reservoir capacitor COUT(POS). If the voltage across COUT(POS) plus a diode drop (VPOS + VDIODE) is smaller than the level-shifted flying-capacitor voltage (VCX(POS) + VINPUT), charge flows from CX(POS) to COUT(POS) until diode D2 turns off. The positive charge-pump regulator's startup can be delayed by connecting an external capacitor from DLP to GND. An internal constant current source begins charging the DLP capacitor when SHDN is logic high and REF reaches regulation. When the DLP voltage exceeds VREF / 2, the positive charge-pump regulator is enabled. Each time it is enabled, the positive chargepump regulator goes through a soft-start routine by ramping up its internal reference voltage from 0 to 2.5V in 128 steps. The soft-start period is 2.73ms (typ), and FBP fault detection is disabled during this period. The soft-start feature effectively limits the inrush current during startup. The MAX8710/MAX8711/MAX8712/ MAX8761 also monitor the FBP voltage for undervoltage conditions. If VFBP is continuously below 2V (typ) for approximately 44ms, the device latches off. MAX8710/MAX8711/MAX8712/MAX8761 Low-Cost, Linear-Regulator LCD Panel Power Supplies Power-Up Sequence and Shutdown Control Thermal-Overload Protection When the MAX8710/MAX8711/MAX8712/MAX8761 are powered up, REF rises with the voltage on IN. After REF reaches regulation and if SHDN is logic high, the linear regulator, operational amplifier, and negative chargepump regulator are enabled and begin their respective soft-start routines. After the soft-start routines are completed, the fault-protection circuits for the linear regulator and the negative charge-pump regulator are activated. When the linear regulator is enabled, the positive charge-pump-regulator delay block is enabled. An internal current source starts charging the DLP capacitor. The voltage on DLP linearly rises because of the constant charging current. When V DLP goes above VREF / 2, the switch control block is enabled, and the positive charge-pump regulator begins its soft-start. After the positive charge-pump regulator's soft-start is completed, the fault protection of the positive chargepump regulator is also enabled. The thermal-overload protection prevents excessive power dissipation from overheating the IC. When the junction temperature exceeds +160C, a thermal sensor immediately activates the fault protection, which shuts down all the outputs except the reference, allowing the device to cool down. Once the device cools down by approximately 15C, the IC restarts automatically. The MAX8710/MAX8711/MAX8712/MAX8761 enter into shutdown when SHDN is pulled low or REF falls below 4.5V. In shutdown, OUTL and OUTB are internally pulled to ground with 1k resistors, FBN and FBP are internally pulled to ground with 10 resistors, and DLP is pulled to GND through a 10 resistor, discharging CDLP. In the MAX8710 only, GON is pulled to GND through a 1k resistor. REF remains on in shutdown. Pulling SHDN high when REF is above 4.5V reactivates the IC. Output fault protection and thermal-overload protection can also turn off the IC's outputs. See the respective sections for details. Output Fault Protection During steady-state operation, if the output of the linear regulator or any of the charge-pump regulator outputs does not exceed its respective fault-detection threshold, the MAX8710/MAX8711/MAX8712/MAX8761 activate an internal fault timer. If any condition or the combination of conditions indicates a continuous fault for the fault-timer duration (44ms typ), the MAX8710/ MAX8711/MAX8712/MAX8761 set the fault latch, shutting down all the outputs except the reference. Once the fault condition is removed, cycle the input voltage or toggle SHDN to clear the fault latch and reactivate the device. Each regulator's fault-detection circuit is disabled during the regulator's soft-start time. 18 Switch Control (MAX8710/MAX8761) The MAX8710/MAX8761s' switch-control block (Figures 6 and 7) consists of a high-voltage p-channel MOSFET Q1 between SRC and GON, and a common-source-connected p-channel MOSFET pair Q2 between GON and DRN. The MAX8710 switch control block is enabled when VDLP goes above VREF / 2 and for MAX8761 VDLP has no control on switch control block. Both the MAX8710 and MAX8761 have two different modes of operation. Activate the first mode by connecting MODE to REF. When CTL is logic high, Q1 turns on and Q2 turns off, connecting GON to SRC. When CTL is logic low, Q1 turns off and Q2 turns on, connecting GON to DRN. GON can then be discharged through a resistor connected between DRN and GND or OUTL. Q2 turns off and stops discharging GON when VGON reaches 10 times the voltage on THR. When VMODE is less than 0.9 x VREF, the switch-control block works in the second mode. The rising edge of VCTL turns on Q1 and turns off Q2, connecting GON to SRC. An internal n-channel MOSFET Q5 between MODE and GND is also turned on to discharge an external capacitor between MODE and GND. The falling edge of VCTL turns off Q5, and an internal 50A current source starts charging the MODE capacitor. Once VMODE exceeds 0.5 x VREF, the switch-control block turns off Q1 and turns on Q2, connecting GON to DRN. GON can then be discharged through a resistor connected between DRN and GND or OUTL. Q2 turns off and stops discharging GON when VGON reaches 10 times the voltage on THR. ______________________________________________________________________________________ Low-Cost, Linear-Regulator LCD Panel Power Supplies MAX8710/MAX8711/MAX8712/MAX8761 REF MAX8710 5A DLP Q4 FAULT SHDN REF OK SRC 0.5 x VREF Q1 GON 9R 1k Q3 REF 50A R R Q2 DRN THR 4R MODE 1k 5R Q5 CTL Figure 6. MAX8710 High-Voltage Switch Control ______________________________________________________________________________________ 19 MAX8710/MAX8711/MAX8712/MAX8761 Low-Cost, Linear-Regulator LCD Panel Power Supplies FAULT REF OK SRC MAX8761 Q1 GON REF 50A 9R R R Q2 4R DRN THR MODE 1k 5R Q5 CTL Figure 7. MAX8761 High-Voltage Switch Control 20 ______________________________________________________________________________________ Low-Cost, Linear-Regulator LCD Panel Power Supplies Linear Regulator Output-Voltage Selection Adjust the linear-regulator output voltage by connecting a resistive voltage-divider from the linear-regulator output AVDD to GND with the center tap connected to FBL (Figure 1). Select the lower resistor of divider R2 in the 10k to 50k range. Calculate upper resistor R1 with the following equation: V R1 = R2 x AVDD - 1 VFBL where VFBL = 2.5V (typ) is the regulation point of the linear regulator. Input-Capacitor Selection The linear regulator's output stage consists of a pnp pass transistor. Rapid movements of the input voltage must be avoided since the movement can be coupled into the base of the transistor through the base-to-emitter junction capacitance. The input capacitor reduces the current peaks drawn from the input supply and slows down the input voltage movement. One 10F ceramic capacitor is used in the Typical Operating Circuits (Figures 1, 2, and 3) because of the high source impedance seen in typical lab setups. Actual applications usually have much lower source impedance, since the linear regulator typically runs directly from the output of another regulated supply and can operate with less input capacitance. Output-Capacitor Selection The output capacitor and its equivalent series resistance (ESR) affect the linear regulator's stability and transient response. The MAX8710/MAX8711/MAX8712 can deliver at least 300mA continuously and are stable with a 4.7F output capacitor. The MAX8761 can deliver at least 500mA of output current and is stable with a 10F output capacitor. The typical load on the linear regulator for source-driver applications is a large pulsed load, with a peak current of approximately 1A and pulse width of approximately 2s. The shape of the pulse is close to a triangle, so it is equivalent to a square pulse with 1A height and 1s pulse width. The total voltage dip during the pulsed load transient also has two components: the ohmic dip due to the output capacitor's ESR, and the capacitive dip caused by discharging the output capacitance: VDIP = VDIP(ESR) + VDIP(C) VDIP(ESR) = IPULSE x RESR I x tPULSE VDIP(C) PULSE COUT where IPULSE is the height of the pulse load, and tPULSE is the pulse width. Higher capacitance and lower ESR result in less voltage dip. The ESR dip can be ignored when using ceramic output capacitors. Calculate the minimum required capacitance for the maximum allowed dip using: I x tPULSE COUT(MIN) PULSE VDIP(MAX) The above equations are "worst case" and assume that the linear regulator does not react to correct the output voltage during the load pulse. In fact, the regulator is fast enough to partially correct the output voltage, so the actual dip may be smaller, or a smaller capacitor may be acceptable. For the typical load pulse described above, assuming the voltage dip must be limited to 150mV, the minimum output capacitor is: COUT(MIN) 1A x 1s = 6.7F 0.15V Because the regulator is able to limit the dip somewhat, the circuit of Figure 1 uses a 4.7F/10F (MAX8710/MAX8761) output capacitor. The voltage rating and temperature characteristics of the output capacitor must also be considered. Feed-Forward Compensation The output capacitance and equivalent load resistance determine the dominant pole. An internal parasitic capacitance of the regulator creates a second pole. This pole typically occurs at 100kHz, but can vary between 60kHz and 140kHz depending on the process variation. Since the pole occurs after the loop gain crossover, it does not affect the loop stability. However, canceling this pole with an additional zero can improve the load-transient response. An additional zero improves the closed-loop phase margin, thereby improving the transient response. The feed-forward network should be designed to get maximum positive phase at unity gain frequency (fu). A zero can be added by connecting a feed-forward capacitor (C1) between OUTL and FBL as shown in Figure 1. The frequency of the zero can be calculated with the following equation: ______________________________________________________________________________________ 21 MAX8710/MAX8711/MAX8712/MAX8761 Design Procedure MAX8710/MAX8711/MAX8712/MAX8761 Low-Cost, Linear-Regulator LCD Panel Power Supplies U 1 ZERO = = 2R1C1 VOUTL / VFBL where R1 is the upper resistor of the feedback divider and fu is the unity gain frequency. The unity gain frequency (f u) for the MAX8710/MAX8711/MAX8712 is approximately 80kHz; for MAX8761, fu is approximately 160kHz. The value of R1 was calculated in the OutputVoltage Selection section to set VOUTL. Use the value for unity gain frequency (fu), the ratio between VOUTL and VFBL, and R1 to calculate the value of C1. Charge-Pump Regulators Number of Charge-Pump Stages For highest efficiency, always choose the lowest number of charge-pump stages that meets the output requirement. The number of positive charge-pump stages is given by: nPOS = VP + VSWITCH VINPUT - - VSUPCP 2 x VDIODE where nPOS is the number of positive charge-pump stages, VP is the positive charge-pump regulator output, VINPUT is the supply voltage for the charge-pump regulators (VSUPCP, MAX8710/MAX8761 or VOUTL, MAX8711/ MAX8712), VDIODE is the forward-voltage drop of the charge-pump diode, and VSWITCH is the voltage drop of the internal switches. Use VSWITCH = 0.3V. The number of negative charge-pump stages is given by: nNEG = + VSWITCH - VGOFF VINPUT - 2 x VDIODE where nNEG is the number of negative charge-pump stages and VGOFF is the negative charge-pump regulator output. The above equations are derived based on the assumption that the first stage of the positive charge pump is connected to VMAIN and the first stage of the negative charge pump is connected to ground. Sometimes fractional stages are more desirable for better efficiency. This can be done by connecting the first stage to another available supply, such as a 5V supply. If the first charge-pump stage is powered from 5V, then the above equations become: nPOS = nNEG = 22 VP + VSWITCH - Output-Voltage Selection Adjust the positive charge-pump-regulator output voltage by connecting a resistive voltage-divider from the regulator output VP to GND with the center tap connected to FBP (Figure 1). Select the lower resistor of divider R4 in the range of 10k to 50k. Calculate upper resistor R3 with the following equation: V R3 = R4 x P - 1 VFBP where VFBP = 2.5V (typ) is the regulation point of the positive charge-pump regulator. Adjust the negative charge-pump-regulator output voltage by connecting a resistive voltage-divider from the negative charge-pump output VGOFF to REF with the center tap connected to FBN (Figure 1). Select R6 in the 20k to 100k range. Calculate R5 with the following equation: R5 = R6 x VFBN - VGOFF VREF - VFBN where VREF = 5V and VFBN = 250mV is the regulation point of the negative charge-pump regulator. Flying Capacitor Increasing the flying-capacitor (CX) value lowers the effective source impedance and increases the outputcurrent capability of the charge pump. Increasing the capacitance indefinitely has a negligible effect on output-current capability because the internal switch resistance and the diode impedance place a lower limit on the source impedance. A 0.1F ceramic capacitor works well in most low-current applications. The flying capacitor's voltage rating must exceed the following: VCX > n x VINPUT where n is the stage number in which the flying capacitor is used, and VINPUT is the supply voltage for the charge-pump regulators (VSUPCP, MAX8710/MAX8761 or VOUTL, MAX8711/MAX8712). Charge-Pump Input Capacitor Use an input capacitor with a value equal to or greater than the flying capacitor. Place the capacitor as close to the IC as possible. Connect the capacitor directly to PGND. 5V VINPUT - 2 x VDIODE - VGOFF + VSWITCH + 5V VINPUT - 2 x VDIODE ______________________________________________________________________________________ Low-Cost, Linear-Regulator LCD Panel Power Supplies COUT _ CP VIN = 19V 51 INL ILOAD _ CP LINEAR REGULATOR 2 fOSC VRIPPLE _ CP 140k 4.7F 20k Figure 8. High-Power Linear Regulator REF 0.47F MAX8710 VDD External Transistor for Higher Current or Power Dissipation The solution for such applications is to connect an external pnp transistor with the internal pnp transistor in a Darlington configuration as shown in Figure 8. The external pass transistor must be able to handle most of the power dissipation since most of the load current flows through it. On the other hand, the power dissipated in the internal pass transistor is very low. The currentlimit circuit does not work if an external pass transistor is used because the linear regulator only senses the current of the internal pass transistor. AVDD = 10V OUTL MAX8710 MAX8711 MAX8712 MAX8761 Applications Information The load current and the voltage difference between the input and output determine the linear regulator's power dissipation as shown in the following equation: PDISSIPATION = (VINL - VOUTL) x IOUTL For some applications, the input voltage to the linear regulator is from a 19V adapter. To make a 10V output, the voltage across the pass transistor is 9V. In this case, the regulator's power dissipation may exceed the dissipation limit that the package can handle. In some other applications, the load current may be much higher than the regulator's guaranteed 300mA output current for the MAX8710/MAX8711/MAX8712 and 500mA for the MAX8761. KSB834W (FAIRCHILD) FBL where COUT_CP is the output capacitor of the charge pump, I LOAD_CP is the load current of the charge pump, and V RIPPLE_CP is the desired peak-to-peak value of the output ripple. Charge-Pump Rectifier Diode Use low-cost silicon switching diodes with a current rating equal to or greater than two times the average charge-pump input current. If it helps avoid an extra stage, some or all of the diodes can be replaced with Schottky diodes with an equivalent current rating. 4.7F OUTL MAX8711 MAX8761 4.7F MAX1512 CE SUPB AVDD 20k POSB OUT 100k CTL 0.1F TO OUTB VCOM NEGB SET GND 25k Figure 9. Using the MAX1512 to Adjust the VCOM Buffer Output Using the MAX1512 VCOM Calibrator to Adjust the Buffer Output The operational amplifier is typically used as the VCOM buffer in TFT LCD panels. The output voltage of the VCOM buffer can be adjusted using the MAX1512, which is an EEPROM-programmable VCOM calibrator, using the circuit shown in Figure 9. Refer to the MAX1512 data sheet for details. ______________________________________________________________________________________ 23 MAX8710/MAX8711/MAX8712/MAX8761 Charge-Pump Output Capacitor Increasing the output capacitance or decreasing the ESR reduces the output ripple voltage and the peak-topeak transient voltage. With ceramic capacitors, the output voltage ripple is dominated by the capacitance value. Use the following equation to approximate the required capacitor value: 5) Minimize the size of the switching nodes (DRVP and DRVN). Keep the switching nodes away from feedback nodes (FBL, FBP, and FBN) and the analog ground. Use DC traces as a shield if necessary. Refer to the MAX8710 evaluation kit for an example of proper board layout. FBP SUPB OUTB GND TOP VIEW 12 11 10 9 SHDN 13 8 DRVP FBL 14 7 DRVN 6 OUTL 5 IN MAX8711 DLP 15 FBN 16 + 4 INL POSB 3 NEGB 2 REF 1 FBP GND THIN QFN 4mm x 4mm 9 8 7 FBL 10 DLP 11 MAX8712 FBN 12 1 2 3 DRVP 5 DRVN 4 OUTL IN THIN QFN 4mm x 4mm Chip Information MAX8710/MAX8711/MAX8712 TRANSISTOR COUNT: 3946 MAX8761 TRANSISTOR COUNT: 4127 PROCESS: BiCMOS 24 6 + INL 2) Place all feedback voltage-divider resistors as close to their respective feedback pins as possible. The divider's center trace should be kept short. Placing the resistors far away causes their FB traces to become antennas that can pick up noise from the switching nodes of the charge pumps. Avoid running any feedback trace near these switching nodes. 3) Place IN, INL, SUPB, SUPCP, and REF pin bypass capacitors close to the IC. The ground connection of the IN bypass capacitor should be connected directly to the GND pin with a wide trace. 4) Minimize the length and maximize the width of the traces between the output capacitors and the load for best transient responses. Pin Configurations (continued) SHDN PC Board Layout Guidelines Careful PC board layout is important for proper operation. Use the following guidelines for good PC board layout: 1) Create a power ground island consisting of the linear-regulator input and output-capacitor ground connections, the GND pin, and the capacitor ground connections for the charge-pump regulators. Connect all these together with short, wide traces or a small ground plane. Maximizing the width of the power ground traces improves efficiency. Create an analog ground island consisting of all the feedback-divider ground connections, the operational-amplifier divider ground connection, the REF capacitor ground connection, the MODE capacitor ground connection, the DLP capacitor ground connection, and the device's exposed backside pad. Connect the analog ground island and the power ground island by connecting the GND pin directly to the exposed backside pad. Make no other connections between these separate ground islands. REF MAX8710/MAX8711/MAX8712/MAX8761 Low-Cost, Linear-Regulator LCD Panel Power Supplies ______________________________________________________________________________________ Low-Cost, Linear-Regulator LCD Panel Power Supplies 24L QFN THIN.EPS PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm 21-0139 E 1 2 PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm 21-0139 E 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 25 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc. MAX8710/MAX8711/MAX8712/MAX8761 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) ENGLISH * ???? * ??? * ??? WHAT'S NEW PRODUCTS SOLUTIONS DESIGN APPNOTES SUPPORT BUY COMPANY MEMBERS MAX8711 Part Number Table Notes: 1. See the MAX8711 QuickView Data Sheet for further information on this product family or download the MAX8711 full data sheet (PDF, 624kB). 2. Other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales. 3. Didn't Find What You Need? Ask our applications engineers. Expert assistance in finding parts, usually within one business day. 4. Part number suffixes: T or T&R = tape and reel; + = RoHS/lead-free; # = RoHS/lead-exempt. More: See full data sheet or Part Naming C onventions. 5. * Some packages have variations, listed on the drawing. "PkgC ode/Variation" tells which variation the product uses. Part Number Free Buy Sample Direct Package: TYPE PINS SIZE DRAWING CODE/VAR * Temp RoHS/Lead-Free? Materials Analysis MAX8711ETE THIN QFN;16 pin;4X4X0.8mm Dwg: 21-0139E (PDF) Use pkgcode/variation: T1644-4* -40C to +85C RoHS/Lead-Free: No Materials Analysis MAX8711ETE-T THIN QFN;16 pin;4X4X0.8mm Dwg: 21-0139E (PDF) Use pkgcode/variation: T1644-4* -40C to +85C RoHS/Lead-Free: No Materials Analysis Didn't Find What You Need? C ONTAC T US: SEND US AN EMAIL C opyright 2 0 0 7 by M axim I ntegrated P roduc ts , Dallas Semic onduc tor * Legal N otic es * P rivac y P olic y