TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DQualified for Automotive Applications
DRail-To-Rail Input/Output
DWide Bandwidth ...3 MHz
DHigh Slew Rate ...2.4 V/μs
DSupply Voltage Range ...2.7 V to 16 V
DSupply Current . . . 550 μA/Channel
DInput Noise Voltage . . . 39 nV/√Hz
DInput Bias Current...1 pA
DSpecified Temperature Range
−40°C to 125°C . . . Automotive Grade
DUltrasmall Packaging
− 5 Pin SOT-23 (TLV2371)
− 8 Pin MSOP (TLV2372)
description
The TLV237x single supply operational amplifiers provide rail-to-rail input and output capability. The TLV237x
takes the minimum operating supply voltage down to 2.7 V over the extended automotive temperature range
while adding the rail-to-rail output swing feature. The TLV237x also provides 3-MHz bandwidth from only
550 μA. The maximum recommended supply voltage is 16 V, which allows the devices to be operated from (±8
V supplies down to ±1.35 V) a variety of rechargeable cells.
The CMOS inputs enable use in high-impedance sensor interfaces, with the lower voltage operation making
an ideal alternative for the TLC227x in battery-powered applications. The rail-to-rail input stage further
increases its versatility. The TLV237x is the seventh member of a rapidly growing number of RRIO products
available from Texas Instruments and it is the first to allow operation up to 16-V rails with good ac performance.
The 2.7-V operation makes the TLV237x compatible with Li-Ion powered systems and the operating supply
voltage range of many micro-power microcontrollers available today including Texas Instruments’ MSP430.
SELECTION OF SIGNAL AMPLIFIER PRODUCTS†
DEVICE VDD (V) VIO
(μV)
Iq/Ch
(μA) IIB (pA) GBW
(MHz)
SR
(V/μs) SHUTDOWN
RAIL-
TO-
RAIL
SINGLES/DUALS/QUADS
TLV237x 2.7−16 500 550 1 3 2.4 Yes I/O S/D/Q
TLC227x 4−16 300 1100 1 2.2 3.6 — O D/Q
TLV27x 2.7−16 500 550 1 3 2.4 — O S/D/Q
TLC27x 3−16 1100 675 1 1.7 3.6 — — S/D/Q
TLV246x 2.7−6 150 550 1300 6.4 1.6 Yes I/O S/D/Q
TLV247x 2.7−6 250 600 2 2.8 1.5 Yes I/O S/D/Q
TLV244x 2.7−10 300 725 1 1.8 1.4 — O D/Q
†Typical values measured at 5 V, 25°C
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
Operational Amplifier
−
+
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FAMILY PACKAGE TABLE{
DEVICE
NUMBER OF PACKAGE TYPES}UNIVERSAL
DEVICE
NUMBER
OF
CHANNELS SOIC SOT-23 TSSOP MSOP
UNIVERSAL
EVM BOARD
TLV2371 1 8 5 — —
See the EVM
TLV2372 2 8 — — 8
See
the
EVM
Selection Guide
TLV2374 4 14 — 14 —
Selection
Guide
(SLOU060)
†For the most current package and ordering information, see the Package Option Addendum at
the end of this document, or see the TI web site at http://www.ti.com.
‡Package drawings, thermal data, and symbolization are available at
http://www.ti.com/packaging.
TLV2371 AVAILABLE OPTIONS
VMAX AT
PACKAGED DEVICES
TA
VIOMAX AT
25
°
C
SMALL OUTLINE SOT-23
TA
25°C
SMALL
OUTLINE
(D) (DBV) SYMBOL
−40°C to 125°C4.5 mV TLV2371QDRQ1 TLV2371QDBVRQ1†
†Product Preview
TLV2372 AVAILABLE OPTIONS
VMAX AT
PACKAGED DEVICES
TA
VIOMAX AT
25
°
C
SMALL OUTLINE MSOP
TA
25°C
SMALL
OUTLINE
(D) (DGK) SYMBOL
−40°C to 125°C4.5 mV TLV2372QDRQ1 TLV2372QDGKRQ1†
†Product Preview
TLV2374 AVAILABLE OPTIONS
VMAX AT
PACKAGED DEVICES
TAVIOMAX AT
25°CSMALL OUTLINE
(D)
TSSOP
(PW)
−40°C to 125°C4.5 mV TLV2374QDRQ1 TLV2374QPWRQ1
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV237x PACKAGE PINOUTS(1)
3
2
4
5
(TOP VIEW)
1
OUT
GND
IN+
VDD
IN−
TLV2371
DBV PACKAGE
1
2
3
4
8
7
6
5
NC
IN−
IN+
GND
NC
VDD
OUT
NC
TLV2371
D PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1OUT
1IN−
1IN+
GND
VDD
2OUT
2IN−
2IN+
TLV2372
D OR DGK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OUT
1IN−
1IN+
VDD
2IN+
2IN−
2OUT
4OUT
4IN−
4IN+
GND
3IN+
3IN−
3OUT
(TOP VIEW)
TLV2374
D OR PW PACKAGE
NC − No internal connection
(1) SOT−23 may or may not be indicated
TYPICAL PIN 1 INDICATORS
Printed or
Molded Dot Bevel Edges
Pin 1
Molded ”U” Shape
Pin 1
Stripe
Pin 1 Pin 1
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (see Note 1) 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, VID ±VDD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) −0.2 V to VDD + 0.2 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current range, II ±10 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current range, IO ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Notes 2 and 3): D (8-pin) package 176°C/W. . . . . . . . . . . . . . . . . . . . .
D (14-pin) package 122.3°C/W. . . . . . . . . . . . . . . . .
D (16-pin) package 114.7°C/W. . . . . . . . . . . . . . . . .
DBV (5-pin) package 324.1°C/W. . . . . . . . . . . . . . . .
DGK (8-pin) package 259.96°C/W. . . . . . . . . . . . . . .
PW (14-pin) package 173.6°C/W. . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: Q suffix −40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to GND.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Selecting the maximum of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN MAX UNIT
Supply voltage V
Single supply 2.7 16
V
Supply voltage, VDD Split supply ±1.35 ±8V
Common-mode input voltage range, VICR 0 VDD V
Turnon voltage level, V(ON), relative to GND pin voltage 2 V
Turnoff voltage level, V(OFF), relative to GND pin voltage 0.8 V
Operating free-air temperature, TAQ-suffix −40 125 °C
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V, and 15 V (unless
otherwise noted)
dc performance
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
V
Input offset voltage
V V /2
V V /2
25°C 2 4.5
mV
VIO Input offset voltage VIC = VDD/2,
RS=50Ω
VO = VDD/2, Full range 6mV
Offset voltage drift
R
S =
50
Ω
25°C
2
V/°C
αVIO Offset voltage drift
S
25°C 2 μV/°C
VI
C
= 0 to VDD,25°C 50 68
VIC
=
0
to
VDD
,
RS = 50 Ω
V27V
Full range 49
VI
C
= 0 to VDD−1.35 V, VDD = 2.7 V 25°C 53 70
VIC
=
0
to
VDD 1
.
35 V
,
RS = 50 ΩFull range 54
VI
C
= 0 to VDD,25°C 55 72
CMRR
Common mode rejection ratio
VIC
=
0
to
VDD
,
RS = 50 Ω,
V5V
Full range 54
dB
CMRR Common-mode rejection ratio VI
C
= 0 to VDD−1.35 V, VDD = 5 V 25°C 58 80 dB
VIC
=
0
to
VDD 1
.
35 V
,
RS = 50 Ω,Full range 57
VI
C
= 0 to VDD,25°C 64 82
VIC
=
0
to
VDD
,
RS = 50 Ω,
V15 V
Full range 63
VI
C
= 0 to VDD−1.35 V, VDD = 15 V 25°C 67 84
VIC
=
0
to
VDD 1
.
35 V
,
RS = 50 Ω,Full range 66
V27V
25°C 95 106
VDD = 2.7 V Full range 76
A
Lar
g
e-si
g
nal differential volta
g
e V
O(
PP
)
= VDD/2,
V5V
25°C 80 110
dB
AVD
Large signal
differential
voltage
amplification
VO(PP)
=
VDD/2
,
RL = 10 kΩVDD = 5 V Full range 82 dB
V15 V
25°C 77 83
VDD = 15 V Full range 79
input characteristics
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
I
Input offset current
25°C 1 60
pA
IIO Input offset current VDD = 15 V, VI
C
= VDD/2, 125°C 500 pA
I
Input bias current
VDD
=
15
V
,
VIC
=
VDD/2
,
VO = VDD/2 25°C 1 60
pA
IIB Input bias current
ODD
125°C 500 pA
ri(d) Differential input resistance 25°C 1000 GΩ
CIC Common-mode input capacitance f = 21 kHz 25°C 8 pF
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V, and 15 V (unless
otherwise noted) (continued)
output characteristics
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
V27V
25°C 2.55 2.58
VDD = 2.7 V Full range 2.48
VI
C
= VDD/2, I
O
H = −1 mA
V5V
25°C 4.9 4.93
VIC
=
VDD/2
,
IOH
=
1
mA
VID = 1 V VDD = 5 V Full range 4.85
V15 V
25°C 14.92 14.96
V
High level output voltage
VDD = 15 V Full range 14.9
V
VOH High-level output voltage
V27V
25°C 1.88 2 V
VDD = 2.7 V Full range 1.42
VI
C
= VDD/2, I
O
H = −5 mA
V5V
25°C 4.58 4.68
VIC
=
VDD/2
,
IOH
=
5
mA
VID = 1 V VDD = 5 V Full range 4.44
V15 V
25°C 14.7 14.8
VDD = 15 V Full range 14.6
V27V
25°C 0.1 0.15
VDD = 2.7 V Full range 0.22
VI
C
= VDD/2, I
O
L = 1 mA
V5V
25°C 0.05 0.1
VIC
=
VDD/2
,
IOL
=
1
mA
VID = 1 V VDD = 5 V Full range 0.15
V15 V
25°C 0.05 0.08
V
Low level output voltage
VDD = 15 V Full range 0.1
V
VOL Low-level output voltage
V27V
25°C 0.52 0.7 V
VDD = 2.7 V Full range 1.15
VI
C
= VDD/2, I
O
L = 5 mA
V5V
25°C 0.28 0.4
VIC
=
VDD/2
,
IOL
=
5
mA
VID = 1 V VDD = 5 V Full range 0.54
V=15V
25°C 0.19 0.3
VDD = 15 V Full range 0.35
power supply
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
VDD = 2.7 V 25°C 470 560
I
Supply current (per channel)
VO=V /2
VDD = 5 V 25°C 550 660
μA
IDD Supply current (per channel) VO = VDD/2,
V=15V
25°C 750 900 μA
VDD = 15 V Full range 1200
PSRR
Suppl
y
volta
g
e rejection ratio VDD = 2.7 V to 15 V, VI
C
= VDD /2, 25°C 70 80
dB
PSRR
Supply
voltage
rejection
ratio
(ΔVDD /ΔVIO)
VDD
=
2
.
7
V
to
15
V
,
No load
VIC
=
VDD /2
,
Full range 65 dB
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V, and 15 V (unless
otherwise noted) (continued)
dynamic performance
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
UGBW
Unity gain bandwidth
R
L
= 2 kΩ
,
VDD = 2.7 V 25°C 2.4
MHz
UGBW Unity gain bandwidth
RL
=
2
kΩ
,
CL = 10 pF VDD = 5 V to 15 V 25°C 3 MHz
V27V
25°C1.4 2
V/ s
VDD = 2.7 V Full range 1V/μs
SR
Slew rate at unity gain
VO(PP) = VDD/2,
C50 pF
V5V
25°C1.4 2.4
V/ s
SR Slew rate at unity gain CL = 50 pF,
R
L
= 1
0
kΩ
VDD = 5 V Full range 1.2 V/μs
R
L =
10
kΩ
V15 V
25°C1.9 2.1
V/ s
VDD = 15 V Full range 1.4 V/μs
φmPhase margin RL = 2 kΩ, CL = 100 pF 25°C 65°
Gain margin RL = 2 kΩ, CL = 10 pF 25°C 18 dB
t
Settling time
VDD = 2.7 V,
V(STEP)PP = 1 V, AV = −1,
CL = 10 pF, RL = 2 kΩ
0.1%
25°C
2.9
μs
tsSettling time VDD = 5 V, 15 V,
V(STEP)PP = 1 V, AV = −1,
CL = 47 pF, RL = 2 kΩ
0.1%
25°C
2
μs
noise/distortion performance
PARAMETER TEST CONDITIONS TAMIN TYP MAX UNIT
VDD
=
2.7 V,
AV = 1 0.02%
V
DD =
2
.
7
V
,
VO(PP) = VDD/2 V, AV = 10 25°C0.05%
THD+N
Total harmonic distortion plus noise
VO(PP)
VDD/2
V,
RL = 2 kΩ, f = 10 kHz AV = 100
25 C
0.18%
THD + N Total harmonic distortion plus noise
VDD
=
5V,5V,
AV = 1 0.02%
V
DD =
5
V
,
5
V
,
VO(PP) = VDD/2 V, AV = 10 25°C0.09%
VO(PP)
VDD/2
V,
RL = 2 kΩ, f = 10 kHz AV = 100
25 C
0.5%
V
Equivalent input noise voltage
f = 1 kHz
25°C
39
nV/√Hz
VnEquivalent input noise voltage f = 10 kHz 25°C35 nV/
√
Hz
InEquivalent input noise current f = 1 kHz 25°C 0.6 fA /√Hz
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO Input offset voltage vs Common-mode input voltage 1, 2, 3
CMRR Common-mode rejection ratio vs Frequency 4
Input bias and offset current vs Free-air temperature 5
VOL Low-level output voltage vs Low-level output current 6, 8, 10
VOH High-level output voltage vs High-level output current 7, 9, 11
VO(PP) Peak-to-peak output voltage vs Frequency 12
IDD Supply current vs Supply voltage 13
PSRR Power supply rejection ratio vs Frequency 14
AVD Differential voltage gain & phase vs Frequency 15
Gain-bandwidth product vs Free-air temperature 16
SR
Slew rate
vs Supply voltage 17
SR Slew rate vs Free-air temperature 18
φmPhase margin vs Capacitive load 19
VnEquivalent input noise voltage vs Frequency 20
Voltage-follower large-signal pulse response 21, 22
Voltage-follower small-signal pulse response 23
Inverting large-signal response 24, 25
Inverting small-signal response 26
Crosstalk vs Frequency 27
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 1
−200
0
200
400
600
800
1000
0 0.4 0.8 1.2 1.6 2 2.4 2.7
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
VDD = 2.7 V
TA = 25°C
VICR − Common-Mode Input Voltage − V
VIO − Input Offset Voltage − V
μ
Figure 2
−200
0
200
400
600
800
1000
012345
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
VICR − Common-Mode Input Voltage − V
VIO − Input Offset Voltage − V
μ
VDD = 5 V
TA = 25 °C
Figure 3
−200
0
200
400
600
800
1000
0246810121415
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
VICR − Common-Mode Input Voltage −V
VIO − Input Offset Voltage − V
μ
VDD =15 V
TA = 25 °C
Figure 4
0
20
40
60
80
100
120
10 100 1 k 10 k 100 k 1 M
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
f − Frequency − Hz
CMRR − Common-Mode Rejection Ratio − dB
VDD = 5 V, 15 V
VDD = 2.7 V
Figure 5
−50
0
50
100
150
200
250
300
−40 −25 −10 5 20 35 50 65 80 95 110 125
VDD = 2.7 V, 5 V and 15 V
VIC = VDD/2
TA − Free-Air Temperature − °C
INPUT BIAS/OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
IIB − Input Bias / Offset Current − pA
/IIO
Figure 6
0
0.40
0.80
1.20
1.60
2
2.40
2.80
0 2 4 6 8 10 12 14 16 18 20 22 24
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
IOL − Low-Level Output Current − mA
VDD = 2.7 V
OL
V − Low-Level Output Voltage − V
TA = 25 °C
TA = 125 °C
TA = 70 °C
TA = 0 °C
TA = 40 °C
Figure 7
0
0.40
0.80
1.20
1.60
2
2.40
2.80
0123456789101112
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
IOH − High-Level Output Current − mA
VOH − High-Level Output Voltage − V
VDD = 2.7 V
TA = 125°C
TA = 70°C
TA = 25°C
TA = 0°C
TA =−40°C
Figure 8
0
0.50
1
1.50
2
2.50
3
3.50
4
4.50
5
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
IOL − Low-Level Output Current − mA
VDD = 5 V
OL
V − Low-Level Output Voltage − V
TA = 125 °C
TA = 70 °C
TA = 25 °C
TA = 0 °C
TA = −40 °C
Figure 9
0
0.50
1
1.50
2
2.50
3
3.50
4
4.50
5
0 5 10 15 20 25 30 35 40 45
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
IOH − High-Level Output Current − mA
VOH − High-Level Output Voltage − V
VCC = 5 V
TA = −40°C
TA = 0°C
TA = 25°C
TA = 70°C
TA = 125°C
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 10
0
2
4
6
8
10
12
14
15
020 40 60 80 100 120 140 160
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
IOL − Low-Level Output Current − mA
VDD = 15 V
OL
V − Low-Level Output Voltage − V
TA =125°C
TA =70°C
TA =25°C
TA =0°C
TA =−40°C
Figure 11
0
2
4
6
8
10
12
14
15
0 20 40 60 80 100 120 140 160
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
IOH − High-Level Output Current − mA
VOH − High-Level Output Voltage − V
VDD = 15 V
TA = −40°C
TA = 0°C
TA = 25°C
TA = 70°C
TA = 125°C
Figure 12
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
10 100 1 k 10 k 100 k 1 M 10 M
PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
f − Frequency − Hz
− Peak-to-Peak Output Voltage − V
VO(PP)
AV = −10
RL = 2 kΩ
CL = 10 pF
TA = 25°C
THD = 5%
VDD = 15 V
VDD = 5 V
VDD = 2.7 V
Figure 13
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
VCC − Supply Voltage − V
DD
I Supply Current − − mA/Ch
AV = 1
VIC = VDD / 2 TA = 125°C
TA = 70°C
TA = 25°C
TA = 0°C
TA = −40°C
Figure 14
0
20
40
60
80
100
120
10 100 1 k 10 k 100 k 1 M
VDD = 5 V, 15 V
TA = 25°C
VDD = 2.7 V
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
f − Frequency − Hz
PSRR − Power Supply Rejection Ratio − dB
Figure 15
−40
−20
0
20
40
60
80
100
120
10 100 1 k 10 k 100 k 1 M 10 M
−180
−135
−90
−45
0
45
90
135
180
DIFFERENTIAL VOLTAGE GAIN AND PHASE
vs
FREQUENCY
f − Frequency − Hz
− Differential Voltage Gain − dB
Phase − °
VDD=5 Vdc
RL=2 kΩ
CL=10 pF
TA=25°C
AVD
Phase
Gain
Figure 16
0
0.5
1
1.5
2
2.5
3
3.5
4
−40 −25 −10 5 20 35 50 65 80 95 110 125
GAIN BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
GBWP − Gain Bandwidth Product − MHz
TA − Free-Air Temperature − °C
VDD = 15 V
VDD = 2.7 V
VDD = 5 V
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 17
0
0.5
1
1.5
2
2.5
3
2.5 4.5 6.5 8.5 10.5 12.5 14.5
SLEW RATE
vs
SUPPLY VOLTAGE
SR − Slew Rate − V/ s
VCC − Supply Voltage −V
AV = 1
RL = 10 kΩ
CL = 50 pF
TA = 25°C
SR−
SR+
μ
Figure 18
0
0.5
1
1.5
2
2.5
3
3.5
−40 −25 −10 5 20 35 50 65 80 95 110 125
SLEW RATE
vs
FREE-AIR TEMPERATURE
TA − Free-Air Temperature − °C
SR+
SR−
VDD = 5 V
AV = 1
RL = 10 kΩ
CL = 50 pF
VI = 3 V
SR − Slew Rate − V/ s
μ
Figure 19
0
10
20
30
40
50
60
70
80
90
100
10 100 1000
PHASE MARGIN
vs
CAPACITIVE LOAD
CL − Capacitive Load − pF
VDD = 5 V
RL= 2 kΩ
TA = 25°C
AV = Open Loop
Phase Margin − °
Rnull = 100
Rnull = 0
Rnull = 50
Figure 20
0
10
20
30
40
50
60
70
80
90
100
10 100 1 k 10 k 100 k
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
f − Frequency − Hz
nV/ Hz− Equivalent Input Noise Voltage −Vn
VDD = 2.7, 5, 15 V
TA = 25°C
Figure 21
0
1
2
3
4
024681012141618
0
1
2
3
4
VI
t − Time − μs
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 3 VPP
TA = 25°C
VI− Input Voltage − V
VO
V
O− Output Voltage − V
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
Figure 22
0
3
6
9
12
024681012141618
0
3
6
9
12
VI
t − Time − μs
VDD = 15 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 9 VPP
TA = 25°C
VI− Input Voltage − V
VO
V
O− Output Voltage − V
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
Figure 23
0
0.04
0.08
0.12
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
0
0.04
0.08
0.12
VI
t − Time − μs
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 100 mVPP
TA = 25°C
VI− Input Voltage − mV
VO
V
O− Output Voltage − mV
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 24
246810 12 14 16
VI
t − Time − μs
VDD = 5 V
AV = 1
RL = 2 kΩ
CL = 10 pF
VI = 3 VPP
TA = 25°C
VI− Input Voltage − V
VO
V
O− Output Voltage − V
4
3
2
1
0
0
1
2
3
INVERTING LARGE-SIGNAL RESPONSE
20
Figure 25
0246810121416
t − Time − μs
INVERTING LARGE-SIGNAL RESPONSE
VDD = 15 V
AV = −1
RL = 2 kΩ
CL = 10 pF
VI = 9 Vpp
TA = 25°C
VO
− Output Voltage − VVO
VI
− Input Voltage − VVI
12
9
6
3
0
9
6
3
0
Figure 26
0
0.05
0.10
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
0
0.05
0.1
INVERTING SMALL-SIGNAL RESPONSE
VDD = 5 V
AV = −1
RL = 2 kΩ
CL = 10 pF
VI = 100 mVpp
TA = 25°CVO
− Output Voltage − VVO
VI
− Input Voltage − VVI
t − Time − μs
Figure 27
−140
−120
−100
−80
−60
−40
−20
0
10 100 1 k 10 k 100 k
CROSSTALK
vs
FREQUENCY
f − Frequency −Hz
VDD = 2.7, 5, & 15 V
VI = VDD/2
AV = 1
RL = 2 kΩ
TA = 25°C
Crosstalk − dB
Crosstalk in Shutdown
Crosstalk
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
rail-to-rail input operation
The TLV237x input stage consists of two differential transistor pairs, NMOS and PMOS, that operate together
to achieve rail-to-rail input operation. The transition point between these two pairs can be seen in Figure 1
through Figure 3 for a 2.7-V, 5-V, and 15-V supply. As the common-mode input voltage approaches the positive
supply rail, the input pair switches from the PMOS differential pair to the NMOS differential pair. This transition
occurs approximately 1.35 V from the positive rail and results in a change in offset voltage due to different device
characteristics between the NMOS and PMOS pairs. If the input signal to the device is large enough to swing
between both rails, this transition results in a reduction in common-mode rejection ratio (CMRR). If the input
signal does not swing between both rails, it is best to bias the signal in the region where only one input pair is
active. This is the region in Figure 1 through Figure 3 where the offset voltage varies slightly across the input
range and optimal CMRR can be achieved. This has the greatest impact when operating from a 2.7-V supply
voltage.
driving a capacitive load
When the amplifier is configured in this manner, capacitive loading directly on the output decreases the device’s
phase margin, leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than
10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown
in Figure 28. A minimum value of 20 Ω should work well for most applications.
CLOAD
RF
Input
Output
RGRNULL
+
−
VDD/2
Figure 28. Driving a Capacitive Load
offset voltage
The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times
the corresponding gains. The schematic and formula in Figure 29 can be used to calculate the output offset
voltage.
VOO +VIOǒ1)ǒRF
RGǓǓ"IIB)RSǒ1)ǒRF
RGǓǓ"IIB– RF
+
−
VI
+
RG
RS
RF
IIB−
VO
IIB+
Figure 29. Output Offset Voltage Model
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often
required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier
(see Figure 30).
VI
VO
C1
+
−
RGRF
R1
f–3dB +1
2pR1C1
VO
VI+ǒ1)
RF
RGǓǒ1
1)sR1C1Ǔ
VDD/2
Figure 30. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth.
Failure to do this can result in phase shift of the amplifier.
VI
C2
R2R1
C1
RF
RG
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
(
=1
Q
2 − )
RG
RF
_
+
f–3dB +1
2pRC
VDD/2
Figure 31. 2-Pole Low-Pass Sallen-Key Filter
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
circuit layout considerations
To achieve the levels of high performance of the TLV237x, follow proper printed-circuit board design techniques.
The following is a general set of guidelines.
DGround planes—It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
DProper power supply decoupling—Use a 6.8-μF tantalum capacitor in parallel with a 0.1-μF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum capacitor among several
amplifiers depending on the application, but a 0.1-μF ceramic capacitor should always be used on the
supply terminal of every amplifier. In addition, the 0.1-μF capacitor should be placed as close as possible
to the supply terminal. As this distance increases, the inductance in the connecting trace makes the
capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device
power terminals and the ceramic capacitors.
DSockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins
often leads to stability problems. Surface-mount packages soldered directly to the printed-circuit board is
the best implementation.
DShort trace runs/compact part placements—Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This helps to minimize stray capacitance at the
input of the amplifier.
DSurface-mount passive components—Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
TLV2371-Q1, TLV2372-Q1, TLV2374-Q1
FAMILY OF 550-μA/Ch 3-MHz RAIL-TO-RAIL INPUT/OUTPUT
OPERATIONAL AMPLIFIERS
SGLS244A − MAY 2004 − REVISED JUNE 2008
16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
general power dissipation considerations
For a given θJA, the maximum power dissipation is shown in Figure 32 and is calculated by the following formula:
PD+ǒTMAX–TA
qJA Ǔ
Where:
PD= Maximum power dissipation of TLV237x IC (watts)
TMAX = Absolute maximum junction temperature (150°C)
TA= Free-ambient air temperature (°C)
θJA = θJC + θCA
θJC = Thermal coefficient from junction to case
θCA = Thermal coefficient from case to ambient air (°C/W)
1
0.75
0.5
0
−55 −40 −25 −10 5
Maximum Power Dissipation − W
1.25
1.5
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
1.75
20 35 50
0.25
TA − Free-Air Temperature − °C
2
65 80 95 110 125
MSOP Package
Low-K Test PCB
θJA = 260°C/W
TJ = 150°C
PDIP Package
Low-K Test PCB
θJA = 104°C/W
SOIC Package
Low-K Test PCB
θJA = 176°C/W
SOT-23 Package
Low-K Test PCB
θJA = 324°C/W
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 32.
PACKAGE OPTION ADDENDUM
www.ti.com 12-Oct-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TLV2371QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLV2371QDRG4Q1 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLV2371QDRQ1 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLV2372QDRG4Q1 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLV2372QDRQ1 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLV2374QDRG4Q1 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLV2374QDRQ1 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLV2374QPWRG4Q1 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLV2374QPWRQ1 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
PACKAGE OPTION ADDENDUM
www.ti.com 12-Oct-2011
Addendum-Page 2
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV2371-Q1, TLV2372-Q1, TLV2374-Q1 :
•Catalog: TLV2371, TLV2372, TLV2374
•Enhanced Product: TLV2371-EP, TLV2374-EP
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which
have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such
components to meet such requirements.
Products Applications
Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive
Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications
Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers
DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps
DSP dsp.ti.com Energy and Lighting www.ti.com/energy
Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Security www.ti.com/security
Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com
OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com
Wireless Connectivity www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2012, Texas Instruments Incorporated