September 2013 Doc ID 16812 Rev 2 1/27
1
VN750SMP-E
High side driver
Features
• ECOPACK® : lead free and RoHS compliant
• Automotive Grade: compliance with AEC
guidelines
• CMOS compatible input
• On-state open-load detection
• Off-state open-load detection
• Shorted load protection
• Undervoltage and overvoltage shutdown
• Protection against loss of ground
• Very low standby current
• Reverse battery protection (see Application
schematic on page 16 )
• In compliance with the 2002/95/EC european
directive
Description
The VN750SMP-E is a monolithic device
designed in STMicroelectronics VIPower™ M0-3
Technology, intended for driving any kind of load
with one side connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table). Active current limitation
combined with thermal shutdown and automatic
restart help protect the device against overload.
The device detects open-load condition in on and
off-state. The open-load threshold is aimed at
detecting the 5W/12V standard bulb as an open-
load fault in the on-state. Output shorted to VCC is
detected in the off-state. Device automatically
turns off in case of ground pin disconnection.
Type RDS(on) IOUT VCC
VN750SMP-E 55 m6 A 36 V
SO-8
Table 1. Device summary
Package
Order codes
Tube Tape and reel
SO-8 VN750SMP-E VN750SMPTR-E
www.st.com
Contents VN750SMP-E
2/27 Doc ID 16812 Rev 2
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.5 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
2.5.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 16
2.5.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 17
2.6 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.7 Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.8 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.9 SO-8 maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . 19
3 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.2 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
VN750SMP-E List of tables
Doc ID 16812 Rev 2 3/27
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Switching (VCC=13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 13. Electrical transient requirements on VCC pin (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 14. Electrical transient requirements on VCC pin (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 15. Electrical transient requirements on VCC pin (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 16. SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 17. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
List of figures VN750SMP-E
4/27 Doc ID 16812 Rev 2
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 13. On-state resistance vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 14. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 15. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 19. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 20. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 21. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22. Ilim vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26. SO-8 maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 27. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 28. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 20
Figure 29. SO-8 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 30. SO-8 thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 31. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 32. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 33. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
VN750SMP-E Block diagram and pin description
Doc ID 16812 Rev 2 5/27
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection/pin Status N.C. Output Input
Floating X X X X
To ground X Through 10 Kresistor
UNDERVOLTAGE
OVERTEMPERATURE
VCC
GND
INPUT
OUTPUT
OVERVOLTAGE
CURRENT LIMITER
LOGIC
DRIVER
Power CLAMP
STATUS
VCC
CLAMP
ON STATE OPENLOAD
OFF STATE OPENLOAD
AND OUTPUT SHORTED TO VCC
DETECTION
DETECTION
DETECTION
DETECTION
DETECTION
V
CC
V
CC
OUTPUT
OUTPUT
STAT_DIS
GND
STATUS
INPUT
1
4
5
8
6
7
2
3
SO-8
Electrical specifications VN750SMP-E
6/27 Doc ID 16812 Rev 2
2 Electrical specifications
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
Stress values that exceed those listed in the “Absolute maximum ratings” table can cause
permanent damage to the device. These are stress ratings only, and operation of the device
at these, or any other conditions greater than those, indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics sure
program and other relevant quality documents.
INPUT
IS
IIN
VIN
VCC
STATUS
ISTAT
VSTAT
GND
VCC
IOUT
VOUT
IGND
OUTPUT
V
F
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
VCC DC supply voltage 41 V
- VCC Reverse DC supply voltage - 0.3 V
- Ignd DC reverse ground pin current - 200 mA
IOUT DC output current Internally limited A
- IOUT Reverse DC output current - 6 A
IIN DC input current +/- 10 mA
ISTAT DC status current +/- 10 mA
VESD
Electrostatic discharge
(human body model: R=1.5 K C=100pF)
- Input
- Status
- Output
- VCC
4000
4000
5000
5000
V
V
V
V
VN750SMP-E Electrical specifications
Doc ID 16812 Rev 2 7/27
2.2 Thermal data
2.3 Electrical characteristics
Values specified in this section are for 8 V<VCC<36 V; -40 °C< Tj <150 °C, unless otherwise
specified.
EMAX
Maximum switching energy
(L=1.3mH; RL=0; Vbat=13.5V; Tjstart=150ºC;
IL=10A)
90 mJ
Ptot Power dissipation TC=25°C 4.2 W
TjJunction operating temperature Internally limited °C
Tstg Storage temperature - 55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Table 4. Thermal data
Symbol Parameter Max. value Unit
Rthj-case Thermal resistance junction-case 1.7 °C/W
Rthj-amb Thermal resistance junction-ambient 93(1)
1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected
to all VCC pins. Horizontal mounting and no artificial air flow.
82(2)
2. When mounted on a standard single-sided FR-4 board with 2cm2 of Cu (at least 35µm thick) connected to
all VCC pins. Horizontal mounting and no artificial air flow.
°C/W
Table 5. Power
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCC Operating supply voltage 5.5 13 36 V
VUSD Undervoltage shutdown 3 4 5.5 V
VUSDhyst
Undervoltage shutdown
hysteresis 0.5 V
VOV Overvoltage shutdown 36 V
RON On-state resistance IOUT=2 A; Tj=25 °C; VCC> 8 V
IOUT=2 A; VCC>8 V
55
110
m
m
ISSupply current
Off-state; VCC=13 V; VIN=VOUT=0 V
Off-state; VCC=13 V; VIN=VOUT=0 V;
Tj=25 °C
On-state; VCC=13 V; VIN=5 V;
IOUT=0 A
10
10
2
25
20
3.5
µA
µA
mA
IL(off1) Off-state output current VIN=VOUT=0 V 0 50 µA
IL(off2) Off-state output current VIN=0V; VOUT=3.5 V -75 0 µA
Electrical specifications VN750SMP-E
8/27 Doc ID 16812 Rev 2
IL(off3) Off-state output current VIN=VOUT=0 V; Vcc=13 V; Tj =125 °C 5 µA
IL(off4) Off-state output current VIN=VOUT=0 V; Vcc=13 V; Tj =25 °C 3 µA
Table 5. Power (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Table 6. Switching (VCC=13 V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time RL=6.5 from VIN rising edge to
VOUT=1.3 V -40-µs
td(off) Turn-off delay time RL=6.5 from VIN falling edge to
VOUT=11.7 V -30-µs
dVOUT/dt(on) Turn-on voltage slope RL=6.5 from VOUT=1.3 V to
VOUT=10.4 V -
See
relative
diagram
-V/µs
dVOUT/dt(off) Turn-off voltage slope RL=6.5 from VOUT=11.7 V to
VOUT=1.3 V -
See
relative
diagram
-V/µs
Table 7. Input pin
Symbol Parameter Test conditions Min. Typ. Max. Unit
VIL Input low level 1.25 V
IIL Low level input current VIN=1.25 V 1 µA
VIH Input high level 3.25 V
IIH High level input current VIN=3.25 V 10 µA
Vhyst Input hysteresis voltage 0.5 V
VICL Input clamp voltage IIN=1 mA
IIN=-1 mA
66.8
-0.7
8V
V
Table 8. VCC output diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
VFForward on voltage -IOUT=1.4 A; Tj=150 °C 0.6 V
Table 9. Status pin
Symbol Parameter Test conditions Min. Typ. Max. Unit
VSTAT Status low output voltage ISTAT=1.6 mA 0.5 V
ILSTAT Status leakage current Normal operation; VSTAT=5 V 10 µA
VN750SMP-E Electrical specifications
Doc ID 16812 Rev 2 9/27
CSTAT
Status pin input
capacitance Normal operation; VSTAT=5 V 100 pF
VSCL Status clamp voltage ISTAT=1mA
ISTAT=-1mA
66.8
-0.7
8V
V
Table 9. Status pin (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Table 10. Protections(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
TTSD Shutdown temperature 150 175 200 °C
TRReset temperature 135 °C
Thyst Thermal hysteresis 7 15 °C
tSDL
Status delay in overload
condition Tj>Tjsh 20 ms
Ilim Current limitation 5.5 V<VCC<36 V 61012
12
A
A
Vdemag
Turn-off output clamp
voltage IOUT=2 A; VIN=0 V; L=6 mH VCC-41 VCC-48 VCC-55 V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals
must be used together with a proper software strategy. If the device operates under abnormal conditions this software must
limit the duration and number of activation cycles.
Table 11. Open-load detection
Symbol Parameter Test conditions Min. Typ. Max. Unit
IOL
Open-load on-state
detection threshold VIN= 5 V 0.6 0.9 1.2 A
tDOL(on)
Open-load on-state
detection delay IOUT= 0 A 200 µs
VOL
Open-load off-state
voltage detection
threshold
VIN= 0 V 1.5 2.5 3.5 V
tDOL(off)
Open-load detection
delay at turn-off 1000 µs
Electrical specifications VN750SMP-E
10/27 Doc ID 16812 Rev 2
Figure 4. Status timings
Figure 5. Switching time waveforms
Table 12. Truth table
Conditions Input Output Status
Normal operation L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature L
H
L
L
H
L
Undervoltage L
H
L
L
X
X
Overvoltage L
H
L
L
H
H
V
IN
V
STAT
t
DOL(off)
OPEN LOAD STATUS TIMING
(with external pull-up) OVERTEMP STATUS TIMING
I
OUT
< I
OL
V
OUT
> V
OL
t
DOL(on)
T
j
> T
jsh
V
IN
V
STAT
t
SDL
t
SDL
t
t
VOUT
VIN
80%
10%
dVOUT/dt(on)
td(off)
90%
dVOUT/dt(off)
td(on)
VN750SMP-E Electrical specifications
Doc ID 16812 Rev 2 11/27
Output voltage > VOL
L
H
H
H
L
H
Output current < IOL
L
H
L
H
H
L
Table 13. Electrical transient requirements on VCC pin (part 1/3)
ISO T/R 7637/1
test pulse
Test levels
I II III IV Delays and
impedance
1 -25 V -50 V -75 V -100 V 2 ms 10
2 +25 V +50 V +75 V +100 V 0.2 ms 10
3a -25 V -50 V -100 V -150 V 0.1 µs 50
3b +25 V +50 V +75 V +100 V 0.1 µs 50
4 -4 V -5 V -6 V -7 V 100 ms, 0.01
5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2
Table 14. Electrical transient requirements on VCC pin (part 2/3)
ISO T/R 7637/1
test pulse
Test levels results
I II III IV
1CCCC
2CCCC
3aCCCC
3bCCCC
4CCCC
5C E E E
Table 15. Electrical transient requirements on VCC pin (part 3/3)
Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
EOne or more functions of the device is not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
Table 12. Truth table
Conditions Input Output Status
Electrical specifications VN750SMP-E
12/27 Doc ID 16812 Rev 2
Figure 6. Waveforms
OPEN LOAD without external pull-up
STATUS
INPUT
NORMAL OPERATION
UNDERVOLTAGE
V
CC
V
USD
V
USDhyst
INPUT
OVERVOLTAGE
V
CC
V
CC
>V
OV
STATUS
INPUT
STATUS
STATUS
INPUT
STATUS
INPUT
OPEN LOAD with external pull-up
undefined
LOAD VOLTAGE
V
CC
<V
OV
LOAD VOLTAGE
LOAD VOLTAGE
LOAD VOLTAGE
LOAD VOLTAGE
OVERTEMPERATURE
INPUT
STATUS
T
TSD
T
R
T
j
LOAD CURRENT
V
OUT
>V
OL
V
OL
VN750SMP-E Electrical specifications
Doc ID 16812 Rev 2 13/27
2.4 Electrical characteristics curves
Figure 7. Off-state output current Figure 8. High level input current
Figure 9. Input clamp voltage Figure 10. Status leakage current
Figure 11. Status low output voltage Figure 12. Status clamp voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
-1
-0.5
0
0.5
1
1.5
2
2.5
3
IL(off1) (uA)
Off state
Vcc=36V
Vin=Vout=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
1
2
3
4
5
6
7
Iih (uA)
Vin=3.25V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vicl (V)
Iin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.01
0.02
0.03
0.04
0.05
Ilstat (uA)
Vstat=5V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
0.1
0.2
0.3
0.4
0.5
0.6
Vstat (V)
Istat=1.6mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vscl (V)
Istat=1mA
Electrical specifications VN750SMP-E
14/27 Doc ID 16812 Rev 2
Figure 13. On-state resistance vs Tcase Figure 14. On-state resistance vs VCC
Figure 15. Open-load on-state detection
threshold
Figure 16. Open-load off-state voltage
detection threshold
Figure 17. Input high level Figure 18. Input low level
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
20
40
60
80
100
120
140
Ron (mOhm)
Iout=2A
Vcc=8V; 13V; 36V
5 10152025303540
Vcc (V)
20
30
40
50
60
70
80
90
100
110
120
Ron (mOhm)
Iout=2A
Tc= - 40°C
Tc= 25°C
Tc= 125°C
Tc= 150°C
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
1
1.5
2
2.5
3
3.5
4
4.5
5
Vol (V)
Vin=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
Vih (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
2.8
Vil (V)
VN750SMP-E Electrical specifications
Doc ID 16812 Rev 2 15/27
Figure 19. Turn-on voltage slope Figure 20. Turn-off voltage slope
Figure 21. Overvoltage shutdown Figure 22. Ilim vs Tcase
Figure 23. Input hysteresis voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
100
200
300
400
500
600
700
800
900
1000
dVout/dt/(on) (V/ms)
Vcc=13V
Rl=6.5Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
50
100
150
200
250
300
350
400
450
500
dVout/dt(off) (V/ms)
Vcc=13V
Rl=6.5Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
30
32
34
36
38
40
42
44
46
48
50
Vov (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
2
4
6
8
10
12
14
16
18
20
Ilim (A)
Vcc=13V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
Vhyst (V)
Electrical specifications VN750SMP-E
16/27 Doc ID 16812 Rev 2
Figure 24. Application schematic
2.5 GND protection network against reverse battery
2.5.1 Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1. RGND 600mV / (IS(on)max).
2. RGND VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power Dissipation in RGND (when VCC<0: during reverse battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift varies depending on how many devices are ON in the case of several high
side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
V
CC
GND
OUTPUT
D
GND
R
GND
D
ld
C
+5V
R
prot
V
GND
STATUS
INPUT
+5V
R
prot
VN750SMP-E Electrical specifications
Doc ID 16812 Rev 2 17/27
2.5.2 Solution 2: diode (DGND) in the ground line
A resistor (RGND=1 kshould be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (600mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.
Series resistor in input and status lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.
Safest configuration for unused input and status pin is to leave them unconnected.
2.6 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO T/R 7637/1 table.
2.7 Microcontroller I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins is pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os.
-VCCpeak/Ilatchup Rprot (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100 V and Ilatchup 20 mA; VOHµC 4.5 V
5k Rprot 65 k.
Recommended values: Rprot =10 k.
2.8 Open-load detection in off-state
Off-state open-load detection requires an external pull-up resistor (RPU) connected between
output pin and a positive supply voltage (VPU) like the +5 V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
1. no false open-load indication when load is connected: in this case we have to avoid
VOUT to be higher than VOlmin; this results in the following condition
VOUT=(VPU/(RL+RPU))RL<VOlmin.
2. no misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU<(VPU–VOLmax)/IL(off2).
Electrical specifications VN750SMP-E
18/27 Doc ID 16812 Rev 2
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pull-
up resistor RPU should be connected to a supply that is switched off when the module is in
standby.
The values of VOLmin, VOLmax and IL(off2) are available in the electrical characteristics
section.
Figure 25. Open-load detection in off-state
VOL
V batt. VPU
RPU
RL
R
DRIVER
+
LOGIC
+
-
INPUT
STATUS
VCC
OUT
GROUND
IL(off2)
VN750SMP-E Electrical specifications
Doc ID 16812 Rev 2 19/27
2.9 SO-8 maximum demagnetization energy (VCC = 13.5 V)
Figure 26. SO-8 maximum turn-off current versus inductance
Note: Values are generated with RL =0
.In case of repetitive pulses, Tjstart (at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves B and C.
C: Tjstart = 125 °C repetitive pulse
A: Tjstart = 150 °C single pulse
B: Tjstart = 100 °C repetitive pulse
Demagnetization Demagnetization Demagnetization
t
VIN, IL
1
10
100
0.1 1 10 100
L(mH)
ILMAX (A)
A
B
C
Package and PCB thermal data VN750SMP-E
20/27 Doc ID 16812 Rev 2
3 Package and PCB thermal data
3.1 SO-8 thermal data
Figure 27. SO-8 PC board
Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB
thickness = 2 mm, Cu thickness=35 µm, Copper areas: 0.14 cm2, 2 cm2).
Figure 28. Rthj-amb vs PCB copper area in open box free air condition
70
75
80
85
90
95
100
105
110
00.511.522.5
PCB Cu heatsink area (cm^2)
RT Hj_am b ( ºC/ W) SO-8 at 2 pins connected to TAB
VN750SMP-E Package and PCB thermal data
Doc ID 16812 Rev 2 21/27
Figure 29. SO-8 thermal impedance junction ambient single pulse
Equation 1: pulse calculation formula
where = tP/T
Figure 30. SO-8 thermal fitting model of a single channel
Table 16. SO-8 thermal parameter
Area/island (cm2)0.52
R1 (°C/W) 0.05
R2 (°C/W) 0.8
R3 (°C/W) 3.5
0.01
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZTH (°C/W)
0.5 cm
2
2 cm
2
ZTHRTH ZTHtp 1–+=
Package and PCB thermal data VN750SMP-E
22/27 Doc ID 16812 Rev 2
R4 (°C/W) 21
R5 (°C/W) 16
R6 (°C/W) 58 28
C1 (W·s/°C) 0.006
C2 (W·s/°C) 2.60E-03
C3 (W·s/°C) 0.0075
C4 (W·s/°C) 0.045
C5 (W·s/°C) 0.35
C6 (W·s/°C) 1.05 2
Table 16. SO-8 thermal parameter (continued)
Area/island (cm2)0.52
VN750SMP-E Package and packing information
Doc ID 16812 Rev 2 23/27
4 Package and packing information
4.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.2 SO-8 mechanical data
Figure 31. SO-8 package dimensions
Table 17. SO-8 mechanical data
Dim.
Millimeter
Min. Typ. Max.
A1.75
a1 0.1 0.25
a2 1.65
a3 0.65 0.85
b 0.35 0.48
b1 0.19 0.25
Package and packing information VN750SMP-E
24/27 Doc ID 16812 Rev 2
4.3 Packing information
Figure 32. SO-8 tube shipment (no suffix)
C 0.25 0.5
c1 45 (typ.)
D4.8 5
E5.8 6.2
e1.27
e3 3.81
F3.8 4
L 0.4 1.27
M0.6
S 8 (max.)
L1 0.8 1.2
Table 17. SO-8 mechanical data (continued)
Dim.
Millimeter
Min. Typ. Max.
All dimensions are in mm.
Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A3.2
B6
C (± 0.1) 0.6
C
B
A
VN750SMP-E Package and packing information
Doc ID 16812 Rev 2 25/27
Figure 33. SO-8 tape and reel shipment (suffix “TR”)
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (+ 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Reel dimensions
All dimensions are in mm.
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
Revision history VN750SMP-E
26/27 Doc ID 16812 Rev 2
5 Revision history
Table 18. Document revision history
Date Revision Changes
18-Nov-2009 1 Initial release.
20-Sep-2013 2 Updated Disclaimer.
VN750SMP-E
Doc ID 16812 Rev 2 27/27
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