74HC139-Q100; 74HCT139-Q100 Dual 2-to-4 line decoder/demultiplexer Rev. 1 -- 19 June 2014 Product data sheet 1. General description The 74HC139-Q100; 74HCT139-Q100 decodes two binary weighted address inputs (nA0, nA1) to four mutually exclusive outputs (nY0 to nY3). Each decoder features an enable input (nE). When nE is HIGH all outputs are forced HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer application. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C Input levels: For 74HC139-Q100: CMOS level For 74HCT139-Q100: TTL level Demultiplexing capability 2 independent 2-to-4 decoders Multifunction capability Suitable for memory decoding, data routing or code conversion Complies with JEDEC standard no. 7A Active LOW mutually exclusive outputs ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Multiple package options 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 3. Ordering information Table 1. Ordering information Type number Package 74HC139D-Q100 Temperature range Name Description Version 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74 HCT139D-Q100 74HC139DB-Q100 74HCT139DB-Q100 74HC139PW-Q100 74HCT139PW-Q100 4. Functional diagram < $ < '(&2'(5 $ $ $ $ ( < < < < < < < < < $ $ < '(&2'(5 74HC_HCT139_Q100 Product data sheet ( DDD Logic symbol < < ( Fig 1. < < ( $ DDD Fig 2. Functional diagram All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 2 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer '; * '; * ;< (1 ;< DDD (1 DDD a. Fig 3. b. IEC Logic symbol < $ < $ < ( < DDD Fig 4. Logic diagram (one decoder/demultiplexer) 74HC_HCT139_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 3 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 5. Pinning information 5.1 Pinning +&4 +&74 ( 9&& $ ( $ $ < $ < < < < < < *1' < DDD Fig 5. Pin configuration SO16, SSOP16 and TSSOP16 5.2 Pin description Table 2. Pin description Symbol Pin Description 1E, 2E 1, 15 enable input (active LOW) 1A0, 1A1 2, 3 address input 1Y0, 1Y1, 1Y2, 1Y3 4, 5, 6, 7 output (active LOW) GND 8 ground (0 V) 2Y0, 2Y1, 2Y2, 2Y3 12, 11, 10, 9 output (active LOW) 2A0, 2A1 14, 13 address input VCC 16 positive supply voltage 6. Functional description Table 3. Function table[1] Control Input nE nA1 nA0 nY3 nY2 nY1 nY0 H X X H H H H L L L H H H L L L H H H L H L H L H L H H L H H L H H H [1] Output H = HIGH voltage level; L = LOW voltage level; X = don't care. 74HC_HCT139_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 4 of 18 NXP Semiconductors 74HC139-Q100; 74HCT139-Q100 Dual 2-to-4 line decoder/demultiplexer 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V - 20 mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V - 20 mA IO output current VO = 0.5 V to (VCC + 0.5 V) - 25 mA ICC supply current - 50 mA IGND ground current 50 - mA Tstg storage temperature 65 +150 C Ptot total power dissipation SO16 package [1] - 500 mW SSOP16 package [2] - 500 mW TSSOP16 package [2] - 500 mW [1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C. [2] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C. 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC139-Q100 74HCT139-Q100 Unit Min Typ Max Min Typ Max VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 74HC_HCT139_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 5 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Tamb 25 C Min Typ VCC = 2.0 V 1.5 VCC = 4.5 V 3.15 VCC = 6.0 V 4.2 VCC = 2.0 V - VCC = 4.5 V - VCC = 6.0 V Unit 40 C to +85 C 40 C to +125 C Max Min Max Min Max 1.2 - 1.5 - 1.5 - V 2.4 - 3.15 - 3.15 - V 3.2 - 4.2 - 4.2 - V 0.8 0.5 - 0.5 - 0.5 V 2.1 1.35 - 1.35 - 1.35 V - 2.8 1.8 - 1.8 - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V 74HC139-Q100 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1.0 - 1.0 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 0.5 - 5.0 - 10.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - 160 A CI input capacitance - 3.5 - - - - - pF 74HC_HCT139_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 6 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer Table 6. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Tamb 25 C Min Typ Unit 40 C to +85 C 40 C to +125 C Max Min Max Min Max 74HCT139-Q100 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 4 mA 3.98 4.32 - 3.84 - 3.7 - V IO = 20 A - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA - 0.15 0.26 - 0.33 - 0.4 V VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V II input leakage current VI = VCC or GND; VCC = 5.5 V - - 0.1 - 1.0 - 1.0 A IOZ OFF-state output current per input pin; VI = VIH or VIL; VO = VCC or GND; other inputs at VCC or GND; VCC = 5.5 V; IO = 0 A - - 0.5 - 5.0 - 10 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 - 80 - 160 A ICC additional supply current VI = VCC 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A - 70 252 - 315 - 343 A per input pin; 1An inputs CI input capacitance 74HC_HCT139_Q100 Product data sheet per input pin; 2An inputs - 70 252 - 315 - 343 A per input pin; nE inputs - 135 486 - 607.5 - 661.5 A - 3.5 - - - - - pF All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 7 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8. Symbol Parameter Conditions Tamb 25 C Unit 40 C to +85 C 40 C to +125 C Min Typ Max Min Max Min Max VCC = 2.0 V - 39 145 - 180 - 220 ns VCC = 4.5 V - 14 29 - 36 - 44 ns VCC = 5.0 V; CL = 15 pF - - - - - - ns - 31 - 38 ns 74HC139-Q100 tpd propagation delay nAn to nYn; see Figure 6 [1] VCC = 6.0 V nE to nYn; see Figure 7 transition time power dissipation capacitance 11 25 VCC = 2.0 V - 33 135 - 170 - 205 ns VCC = 4.5 V - 12 27 - 34 - 41 ns VCC = 5.0 V; CL = 15 pF - - - - - - ns 10 - 10 23 - 29 - 35 ns VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns nYn; see Figure 6 and Figure 7 [2] VCC = 6.0 V CPD [1] VCC = 6.0 V tt 11 CL = 50 pF; f = 1 MHz; VI = GND to VCC [3] nAn to nYn; see Figure 6 [1] - 6 13 - 16 - 19 ns - 42 - - - - - pF - 16 34 - 43 - 51 ns - - - - - ns 34 - 43 - 51 ns - - - - - ns 15 - 19 - 22 ns 74HCT139-Q100 tpd propagation delay VCC = 4.5 V VCC = 5.0 V; CL = 15 pF nE to nYn; see Figure 7 - VCC = 4.5 V - VCC = 5.0 V; CL = 15 pF tt transition time nYn; see Figure 6 and Figure 7 VCC = 4.5 V 74HC_HCT139_Q100 Product data sheet 13 [1] - 16 13 [2] - 7 All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 8 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer Table 7. Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8. Symbol Parameter Conditions Tamb 25 C CPD power dissipation capacitance CL = 50 pF; f = 1 MHz; VI = GND to VCC 1.5 V [3] Unit 40 C to +85 C 40 C to +125 C Min Typ Max Min Max Min Max - 44 - - - - - [1] tpd is the same as tPLH and tPHL. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in W). pF PD = CPD VCC2 fi N + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL VCC2 fo) = sum of outputs. 11. Waveforms 9&& Q$Q LQSXW 90 *1' W3+/ W3/+ 92+ Q<Q LQSXW 90 92/ W7+/ W7/+ DDD Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Propagation delay input (nAn) to output (nYn) and transition time output (nYn) 74HC_HCT139_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 9 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 9&& (( LQSXW 90 *1' W3+/ W3/+ 92+ Q<Q RXWSXW 90 92/ W7+/ W7/+ DDD Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. Table 8. Propagation delay enable input (nE) to output (nYn) and transition time output (nYn) Measurement points Type Input Output VM VM 74HC139-Q100 0.5VCC 0.5VCC 74HCT139-Q100 1.3 V 1.3 V 74HC_HCT139_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 10 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 9, W: QHJDWLYH SXOVH 90 9 WI WU WU WI 9, SRVLWLYH SXOVH 9 90 90 90 W: 9&& 9&& * 9, 92 5/ 6 RSHQ '87 &/ 57 DDG Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 8. Table 9. Test circuit for measuring switching times Test data Type Input VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74HC139-Q100 VCC 6 ns 15 pF, 50 pF 1 k open GND VCC 74HCT139-Q100 3V 6 ns 15 pF, 50 pF 1 k open GND VCC 74HC_HCT139_Q100 Product data sheet Load S1 position All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 11 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 12. Package outline 62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627 ' ( $ ; F \ +( Y 0 $ = 4 $ $ $ $ SLQLQGH[ /S / H Z 0 ES GHWDLO; PP VFDOH ',0(16,216 LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP LQFKHV R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPP LQFK PD[LPXPSHUVLGHDUHQRWLQFOXGHG Fig 9. 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 ( 06 -(,7$ (8523($1 352-(&7,21 ,668('$7( Package outline SOT109-1 (SO16) 74HC_HCT139_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 12 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 6623SODVWLFVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ = 4 $ $ $ $ SLQLQGH[ /S / GHWDLO; Z 0 ES H PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7( 02 Fig 10. Package outline SOT338-1 (SSOP16) 74HC_HCT139_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 13 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ = 4 $ SLQLQGH[ $ $ $ /S / H GHWDLO; Z 0 ES PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP R R 1RWHV 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7( 02 Fig 11. Package outline SOT403-1 (TSSOP16) 74HC_HCT139_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 14 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT139_Q100 v.1 20140619 Product data sheet - - 74HC_HCT139_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 15 of 18 74HC139-Q100; 74HCT139-Q100 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term `short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74HC_HCT139_Q100 Product data sheet Suitability for use in automotive applications -- This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 16 of 18 NXP Semiconductors 74HC139-Q100; 74HCT139-Q100 Dual 2-to-4 line decoder/demultiplexer No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations -- A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74HC_HCT139_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 -- 19 June 2014 (c) NXP Semiconductors N.V. 2014. All rights reserved. 17 of 18 NXP Semiconductors 74HC139-Q100; 74HCT139-Q100 Dual 2-to-4 line decoder/demultiplexer 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information. . . . . . . . . . . . . . . . . . . . . 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP Semiconductors N.V. 2014. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 19 June 2014 Document identifier: 74HC_HCT139_Q100 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: NXP: 74HC139PW-Q100J 74HC139D-Q100J 74HCT139PW-Q100J 74HCT139D-Q100J 74HCT139DB-Q100J