Micropower, Low Noise Precision Voltage
References with Shutdown
ADR391/ADR392/ADR395
Rev. H
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FEATURES
Compact 5-lead TSOT package
Low temperature coefficient
B grade: 9 ppm/°C
A grade: 25 ppm/°C
Initial accuracy
B grade: ±4 mV maximum (ADR391)
A grade: ±6 mV maximum
Ultralow output noise: 5 μV p-p (0.1 Hz to 10 Hz)
Low dropout: 300 mV
Low supply current
3 μA maximum in shutdown
140 μA maximum in operation
No external capacitor required
Output current: 5 mA
Automotive grade available
Wide temperature range: −40°C to +125°C
APPLICATIONS
Battery-powered instrumentation
Portable medical instrumentation
Data acquisition systems
Industrial process controls
Automotive
PIN CONFIGURATION
1
2
3
5
4
GND
SHDN
V
OUT (SENSE)
V
OUT (FORCE)
V
IN
00419-001
ADR391/
ADR392/
ADR395
(No t to Scale)
Figure 1. 5-Lead TSOT (UJ Suffix)
Table 1.
Model
Output
Voltage (VO)
Temperature
Coefficient (ppm/°C)
Accuracy
(mV)
ADR391B 2.5 9 ±4
ADR391A 2.5 25 ±6
ADR392B 4.096 9 ±5
ADR392A 4.096 25 ±6
ADR395B 5.0 9 ±5
ADR395A 5.0 25 ±6
GENERAL DESCRIPTION
The ADR391/ADR392/ADR395 are precision 2.048 V, 2.5 V,
4.096 V, and 5 V band gap voltage references, respectively,
featuring low power and high precision in a tiny footprint. Using
patented temperature drift curvature correction techniques
from Analog Devices, Inc., the ADR39x references achieve a
low 9 ppm/°C of temperature drift in the TSOT package.
The ADR39x family of micropower, low dropout voltage references
provides a stable output voltage from a minimum supply of
300 mV above the output. Their advanced design eliminates the
need for external capacitors, which further reduces board space
and system cost. The combination of low power operation,
small size, and ease of use makes the ADR39x precision voltage
references ideally suited for battery-operated applications.
ADR391/ADR392/ADR395
Rev. H | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configuration ............................................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
ADR391 Electrical Characteristics ............................................. 3
ADR392 Electrical Characteristics ............................................. 4
ADR395 Electrical Characteristics ............................................. 5
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6
ESD Caution...................................................................................6
Typical Performance Characteristics ..............................................7
Terminology .................................................................................... 13
Theory of Operation ...................................................................... 14
Device Power Dissipation Considerations .............................. 14
Shutdown Mode Operation ...................................................... 14
Applications Information .............................................................. 15
Basic Voltage Reference Connection ....................................... 15
Capacitors .................................................................................... 17
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 18
REVISION HISTORY
10/09—Rev. G to Rev. H
Deleted ADR390 ................................................................. Universal
Changes to Ordering Guide Section ............................................ 18
2/08—Rev. F to Rev. G
Changes to Ripple Rejection Ration Parameter (Table 2) ........... 3
Changes to Ripple Rejection Ration Parameter (Table 3) ........... 4
Changes to Ripple Rejection Ration Parameter (Table 4) ........... 5
Changes to Ripple Rejection Ration Parameter (Table 5) ........... 6
Changes to Figure 7 .......................................................................... 9
Changes to Outline Dimensions ................................................... 19
Changes to Ordering Guide .......................................................... 19
5/05—Rev. E to Rev. F
Changes to Table 5 ............................................................................ 7
Changes to Figure 2 .......................................................................... 9
4/04—Rev. D to Rev. E
Changes to ADR390—Specifications ............................................. 3
Changes to ADR391—Specifications ............................................. 4
Changes to ADR392—Specifications ............................................. 5
Changes to ADR395—Specifications ............................................. 6
4/04—Rev. C to Rev. D
Updated Format .................................................................. Universal
Changes to Title ................................................................................ 1
Changes to Features .......................................................................... 1
Changes to Applications .................................................................. 1
Changes to General Description .................................................... 1
Changes to Table 1 ............................................................................ 1
Changes to ADR390—Specifications ............................................. 3
Changes to ADR391—Specifications ............................................. 4
Changes to ADR392—Specifications ............................................. 5
Changes to ADR395—Specifications ............................................. 6
Changes to Absolute Maximum Ratings ........................................ 7
Changes to Thermal Resistance....................................................... 7
Moved ESD Caution.......................................................................... 7
Changes to Figure 3, Figure 4, Figure 7, and Figure 8 .................. 9
Changes to Figure 11, Figure 12, Figure 13, and Figure 14....... 10
Changes to Figure 15, Figure 16, Figure 19, and Figure 20....... 11
Changes to Figure 23 and Figure 24............................................. 12
Changes to Figure 27 ...................................................................... 13
Changes to Ordering Guide .......................................................... 19
Updated Outline Dimensions ....................................................... 19
10/02—Rev. B to Rev. C
Add parts ADR392 and ADR395 ..................................... Universal
Changes to Features .......................................................................... 1
Changes to General Description ..................................................... 1
Additions to Table I ........................................................................... 1
Changes to Specifications ................................................................. 2
Changes to Ordering Guide ............................................................. 4
Changes to Absolute Maximum Ratings ........................................ 4
New TPCs 3, 4, 7, 8, 11, 12, 15, 16, 19, and 20 .............................. 6
New Figures 4 and 5 ....................................................................... 13
Deleted A Negative Precision Reference
without Precision Resistors Section ............................................. 13
Edits to General-Purpose Current Source Section .................... 13
Updated Outline Dimensions ....................................................... 15
5/02—Rev. A to Rev. B
Edits to Layout .................................................................... Universal
Changes to Figure 6 ........................................................................ 13
ADR391/ADR392/ADR395
Rev. H | Page 3 of 20
SPECIFICATIONS
ADR391 ELECTRICAL CHARACTERISTICS
VIN = 2.8 V to 15 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO A grade 2.494 2.5 2.506 V
B grade 2.496 2.5 2.504 V
INITIAL ACCURACY VOERR A grade 6 mV
A grade 0.24 %
B grade 4 mV
B grade 0.16 %
TEMPERATURE COEFFICIENT TCVO A grade, −40°C < TA < +125°C 25 ppm/°C
B grade, −40°C < TA < +125°C 9 ppm/°C
SUPPLY VOLTAGE HEADROOM VIN − VO 300 mV
LINE REGULATION ΔVO/ΔVIN V
IN = 2.8 V to 15 V, −40°C < TA < +125°C 10 25 ppm/V
LOAD REGULATION ΔVO/ΔILOAD I
LOAD = 0 mA to 5 mA, −40°C < TA < +85°C, VIN = 3 V 60 ppm/mA
I
LOAD = 0 mA to 5 mA, −40°C < TA < +125°C, VIN = 3 V 140 ppm/mA
QUIESCENT CURRENT IIN No load 120 μA
−40°C < TA < +125°C 140 μA
VOLTAGE NOISE en p-p 0.1 Hz to 10 Hz 5 μV p-p
TURN-ON SETTLING TIME tR 20 μs
LONG-TERM STABILITY1 ΔVO 1000 hours 50 ppm
OUTPUT VOLTAGE HYSTERESIS ΔVO_HYS 100 ppm
RIPPLE REJECTION RATIO RRR fIN = 60 Hz −80 dB
SHORT CIRCUIT TO GND ISC V
IN = 5 V 25 mA
V
IN = 15 V 30 mA
SHUTDOWN PIN
Shutdown Supply Current ISHDN 3 μA
Shutdown Logic Input Current ILOGIC 500 nA
Shutdown Logic Low VINL 0.8 V
Shutdown Logic High VINH 2.4 V
1 The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
ADR391/ADR392/ADR395
Rev. H | Page 4 of 20
ADR392 ELECTRICAL CHARACTERISTICS
VIN = 4.3 V to 15 V, TA = 25°C, unless otherwise noted.
Table 3.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO A grade 4.090 4.096 4.102 V
B grade 4.091 4.096 4.101 V
INITIAL ACCURACY VOERR A grade 6 mV
A grade 0.15 %
B grade 5 mV
B grade 0.12 %
TEMPERATURE COEFFICIENT TCVO A grade, −40°C < TA < +125°C 25 ppm/°C
B grade, −40°C < TA < +125°C 9 ppm/°C
SUPPLY VOLTAGE HEADROOM VIN − VO 300 mV
LINE REGULATION ΔVO/ΔVIN V
IN = 4.3 V to 15 V, −40°C < TA < +125°C 10 25 ppm/V
LOAD REGULATION ΔVO/ΔILOAD I
LOAD = 0 mA to 5 mA, −40°C < TA < +125°C, VIN = 5 V 140 ppm/mA
QUIESCENT CURRENT IIN No load 120 μA
−40°C < TA < +125°C 140 μA
VOLTAGE NOISE en p-p 0.1 Hz to 10 Hz 7 μV p-p
TURN-ON SETTLING TIME tR 20 μs
LONG-TERM STABILITY1 ΔVO 1000 hours 50 ppm
OUTPUT VOLTAGE HYSTERESIS ΔVO_HYS 100 ppm
RIPPLE REJECTION RATIO RRR fIN = 60 Hz −80 dB
SHORT CIRCUIT TO GND ISC V
IN = 5 V 25 mA
V
IN = 15 V 30 mA
SHUTDOWN PIN
Shutdown Supply Current ISHDN 3 μA
Shutdown Logic Input Current ILOGIC 500 nA
Shutdown Logic Low VINL 0.8 V
Shutdown Logic High VINH 2.4 V
1 The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
ADR391/ADR392/ADR395
Rev. H | Page 5 of 20
ADR395 ELECTRICAL CHARACTERISTICS
VIN = 5.3 V to 15 V, TA = 25°C, unless otherwise noted.
Table 4.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO A grade 4.994 5.000 5.006 V
B grade 4.995 5.000 5.005 V
INITIAL ACCURACY VOERR A grade 6 mV
A grade 0.12 %
B grade 5 mV
B grade 0.10 %
TEMPERATURE COEFFICIENT TCVO A grade, −40°C < TA < +125°C 25 ppm/°C
B grade, −40°C < TA < +125°C 9 ppm/°C
SUPPLY VOLTAGE HEADROOM VIN − VO 300 mV
LINE REGULATION ΔVO/ΔVIN V
IN = 4.3 V to 15 V, −40°C < TA < +125°C 10 25 ppm/V
LOAD REGULATION ΔVO/ΔILOAD I
LOAD = 0 mA to 5 mA, −40°C < TA < +125°C, VIN = 6 V 140 ppm/mA
QUIESCENT CURRENT IIN No load 120 μA
−40°C < TA < +125°C 140 μA
VOLTAGE NOISE en p-p 0.1 Hz to 10 Hz 8 μV p-p
TURN-ON SETTLING TIME tR 20 μs
LONG-TERM STABILITY1 ΔVO 1000 hours 50 ppm
OUTPUT VOLTAGE HYSTERESIS ΔVO_HYS 100 ppm
RIPPLE REJECTION RATIO RRR fIN = 60 Hz −80 dB
SHORT CIRCUIT TO GND ISC V
IN = 5 V 25 mA
V
IN = 15 V 30 mA
SHUTDOWN PIN
Shutdown Supply Current ISHDN 3 μA
Shutdown Logic Input Current ILOGIC 500 nA
Shutdown Logic Low VINL 0.8 V
Shutdown Logic High VINH 2.4 V
1 The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
ADR391/ADR392/ADR395
Rev. H | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
At 25°C, unless otherwise noted.
Table 5.
Parameter Rating
Supply Voltage 18 V
Output Short-Circuit Duration to GND See derating curves
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +125°C
Lead Temperature (Soldering, 60 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, for a device
soldered in a circuit board for surface-mount packages.
Table 6.
Package Type θJA θ
JC Unit
TSOT (UJ-5) 230 146 °C/W
ESD CAUTION
ADR391/ADR392/ADR395
Rev. H | Page 7 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
2.494
–40 –5 30 65 100 125
2.496
2.498
2.500
2.502
2.504
2.506
SAMPLE 1
SAMPLE 2
SAMPLE 3
TEMPERATURE (°C)
V
OUT
(V)
00419-004
Figure 2. ADR391 Output Voltage (VOUT) vs. Temperature
4.100
–40 0 40 80 125
4.098
4.096
4.094
4.090
4.088
4.092
SAMPLE 1
SAMPLE 2
SAMPLE 3
TEMPERATURE (°C)
V
OUT
(V)
00419-005
Figure 3. ADR392 Output Voltage (VOUT) vs. Temperature
5.006
–40 –5 30 65 125
5.004
5.002
5.000
4.996
4.994
4.998
100
SAMPLE 1
SAMPLE 2
SAMPLE 3
TEMPERATURE (°C)
V
OUT
(V)
00419-006
Figure 4. ADR395 Output Voltage (VOUT) vs. Temperature
INPUT VOLTAGE (V)
140
120
402.5 15.05.0
SUPP LY CURRENT ( µA)
7.5 10.0 12.5
100
80
60
+85°C
+25°C
–40°C
00419-008
+125°C
Figure 5. ADR391 Supply Current vs. Input Voltage
INPUT VOLTAGE (V)
140
57911
SUPP LY CURRENT (µA)
120
100
60
40
80
13 15
+125
°C
+25°C
–40°C
00419-009
Figure 6. ADR392 Supply Current vs. Input Voltage
INPUT VOLTAGE (V)
140
5.5 7.0 8.5 10.0 14.5
SUPP LY CURRENT ( µA)
120
100
60
40
80
13.0
+125
°
C
+25
°
C
–40
°
C
11.5
00419-010
Figure 7. ADR395 Supply Current vs. Input Voltage
ADR391/ADR392/ADR395
Rev. H | Page 8 of 20
TEMPERATURE (°
C)
80
–40 –10
LOAD REGUL
A
TION (ppm/mA)
50 80 110 125
100
120
140
160
180
20
I
L
= 0mA TO 5mA
V
IN
= 3V
V
IN
= 5V
00419-012
Figure 8. ADR391 Load Regulation vs. Temperature
TE M PE RAT URE (°C)
90
–40 –5 30 65 125
LOAD REGUL
A
TION (ppm/mA)
80
70
50
40
60
100
I
L
= 0mA TO 5mA
V
IN
= 7. 5V
V
IN
= 5V
00419-013
Figure 9. ADR392 Load Regulation vs. Temperature
TEM P ERAT URE ( ° C)
80
–40 –5 30 65 125
LOAD REGUL
A
TION (ppm/mA)
70
60
40
30
50
100
IL = 0mA TO 5mA
VIN = 7.5V VIN = 5V
00419-014
Figure 10. ADR395 Load Regulation vs. Temperature
TEMPERATURE (°C)
0
LI NE RE GULATION ( ppm /V)
25
5
10
15
20
00419-016
–40 –10
20 80 110 125
50
Figure 11. ADR391 Line Regulation vs. Temperature
TEMPERATURE (°C)
14
–40 –5 30 65 125
LI NE REGUL
A
TION (ppm/V)
10
6
2
0
4
100
12
8
V
IN
= 4.4V TO 1 5V
00419-017
Figure 12. ADR392 Line Regulation vs. Temperature
TEM PE RATURE (° C)
14
–40 –5 30 65 125
LINE REGUL
A
TION (ppm/V)
10
6
2
0
4
100
12
8V
IN
= 5. 3V TO 15V
00419-018
Figure 13. ADR395 Line Regulation vs. Temperature
ADR391/ADR392/ADR395
Rev. H | Page 9 of 20
LOAD CURRENT ( mA)
3.6
2.6 01
3.4
3.2
2.8
–40
°C
+85
°C
+25
°C
2345
3.0
+125
°C
00419-020
V
IN
MIN (V)
Figure 14. ADR391 Minimum Input Voltage (VIN) vs. Load Current
LO AD CURRENT (mA)
4.8
0123 5
V
IN
MIN (V)
4.4
4.0
3.8
4.2
4
4.6 +125
°C
+25°C
–40°C
0
0419-021
Figure 15. ADR392 Minimum Input Voltage (VIN) vs. Load Current
LOAD CURRENT ( mA)
6.0
0123 5
VIN MIN (V)
5.2
4.8
4.6
5.0
4
5.6 +125
°
C
+25
°
C
–40
°
C
5.8
5.4
00419-022
Figure 16. ADR395 Minimum Input Voltage (VIN) vs. Load Current
70
50
0
–0.56 –0.26
FREQUEN
C
Y
0.04 0.19
40
30
20
10
–0.41 –0.11 0.34
60
TEM PERAT URE : + 25°
C–40
°
C+125°C +25°C
00419-024
V
OUT
DEVIATION (mV)
Figure 17. ADR391 VOUT Hysteresis Distribution
1k
900
800
700
600
10010 100 1k 10k
FREQUENCY (Hz )
VOLTAGE NOISE DENSITY (nV/
√
Hz)
500
400
300
200
ADR391
V
IN
= 5V
00419-025
Figure 18. Voltage Noise Density vs. Frequency
VOLTAGE (2µV/DIV)
TIME (1s/DIV)
0
0
0
0
0
0
0
0
0
0
0419-026
Figure 19. ADR391 Typical Voltage Noise 0.1 Hz to 10 Hz
ADR391/ADR392/ADR395
Rev. H | Page 10 of 20
VOLTAGE (100µV/DIV)
TIME ( 10µs/DIV)
00419-027
Figure 20. ADR391 Voltage Noise 10 Hz to 10 kHz
VOLTAGE
TIME (10µs/DIV)
0.5V/DIV
1V/DIV
00419-028
LINE
INTERRUPTION
V
OUT
C
BYPASS
= 0µF
Figure 21. ADR391 Line Transient Response
VOL
T
AGE
TIME (10
µs/DIV)
0.5V/DIV
1V/DIV
00419-029
LINE
INTERRUPTION
V
OUT
C
BYPASS
= 0. 1µF
Figure 22. ADR391 Line Transient Response
VOLTAG E (1V/ DI V )
TIME ( 200µ s/DI V )
LO AD OFF
00419-030
V
OUT
C
L
= 0nF
V
LOAD
ON
Figure 23. ADR391 Load Transient Response
VOLTAGE (1V/ DI V)
TI ME ( 200
µs/DIV)
LO AD OFF
00419-031
V
OUT
C
L
= 1nF
V
LOAD
ON
Figure 24. ADR391 Load Transient Response
VOLTAGE (1V/DIV)
TIME ( 200
µs/DIV)
LO AD OFF
00419-032
V
OUT
C
L
= 100n F
V
LOAD
ON
Figure 25. ADR391 Load Transient Response
ADR391/ADR392/ADR395
Rev. H | Page 11 of 20
VOLTAGE
TIME (20µs/DIV)
5V/DIV
2V/DIV
00419-033
V
IN
= 15V
V
IN
V
OUT
Figure 26. ADR391 Turn-On Response Time at 15 V
VOLTAGE
TIME (40µs/DIV)
5V/DIV
2V/DIV
00419-034
V
IN
= 15V
V
IN
V
OUT
Figure 27. ADR391 Turn-Off Response at 15 V
VOLTAGE
TI ME ( 200µ s/DI V )
5V/DIV
2V/DIV
00419-035
C
BYPASS
= 0. 1µF
V
IN
V
OUT
Figure 28. ADR391 Turn-On/Turn-Off Response at 5 V with Capacitance
VOLTAGE
TI M E ( 200µ s/ DI V )
5V/DIV
2V/DIV
00419-036
R
L
= 500Ω
V
IN
V
OUT
Figure 29. ADR391 Turn-On/Turn-Off Response at 5 V with Resistor Load
VOLTAGE
TI M E ( 200
µs/DIV)
5V/DIV
2V/DIV
00419-037
R
L
= 500Ω
C
L
= 100nF
V
IN
V
OUT
Figure 30. ADR391 Turn-On/Turn-Off Response at 5 V
ADR391/ADR392/ADR395
Rev. H | Page 12 of 20
FRE QUENCY (Hz)
10 1M100
OUT P UT IM P E DANCE (Ω)
1k 10k 100k
100
90
0
80
70
60
50
40
30
20
10
00419-039
C
L
= 0µF
C
L
= 1µF C
L
= 0.1µ F
FRE Q UENCY ( Hz )
10 1M100
RIPP LE REJECTION (dB)
1k 10k 100k
80
60
–120
40
20
0
–20
–40
–60
–80
–100
00419-038
Figure 32. Output Impedance vs. Frequency
Figure 31. Ripple Rejection vs. Frequency
ADR391/ADR392/ADR395
Rev. H | Page 13 of 20
TERMINOLOGY
Temperature Coefficient
The change of output voltage with respect to operating temperature
changes normalized by the output voltage at 25°C. This parameter
is expressed in ppm/°C and can be determined by
[]
() ()
()
()
6
10
–C25
–
Cppm/ ×
×°
=°
12
O
1
O
2
O
OTTV
TVTV
TCV (1)
where:
VO (25°C) is VO at 25°C.
VO (T1) is VO at Temperature 1.
VO (T2) is VO at Temperature 2.
Line Regulation
The change in output voltage due to a specified change in input
voltage. This parameter accounts for the effects of self-heating.
Line regulation is expressed in either percent per volt, parts-per-
million per volt, or microvolts per volt change in input voltage.
Load Regulation
The change in output voltage due to a specified change in load
current. This parameter accounts for the effects of self-heating.
Load regulation is expressed in either microvolts per milliampere,
parts-per-million per milliampere, or ohms of dc output resistance.
Long-Term Stability
Typical shift of output voltage at 25°C on a sample of parts
subjected to a test of 1000 hours at 25°C.
ΔVO = VO(t0) − VO(t1)
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛×
−
=Δ 6
10
)(
)()(
]ppm[
0
O
1
O
0
O
OtV
tVtV
V (2)
where:
VO (t0) is VO at 25°C at Time 0.
VO (t1) is VO at 25°C after 1000 hours operation at 25°C.
Thermally Induced Output Voltage Hysteresis
The change of output voltage after the device cycles through
the temperatures from +25°C to –40°C to +125°C and back to
+25°C. This is a typical value from a sample of parts put through
such a cycle.
VO_HYS = VO(25°C) − VO_TC (3)
6
_
_10
)25(
)25(
]ppm[ ×
−
=CV
VCV
V
O
TCO
O
HYSOo
o
(4)
where:
VO (25°C) is VO at 25°C.
VO_TC is VO at 25°C after a temperature cycle from +25°C to
−40°C to +125°C and back to +25°C.
ADR391/ADR392/ADR395
Rev. H | Page 14 of 20
THEORY OF OPERATION
Band gap references are the high performance solution for low
supply voltage and low power voltage reference applications,
and the ADR391/ADR392/ADR395 are no exception. The
uniqueness of these devices lies in the architecture. As shown in
Figure 33, the ideal zero TC band gap voltage is referenced to
the output, not to ground. Therefore, if noise exists on the
ground line, it is greatly attenuated on VOUT. The band gap cell
consists of the PNP pair, Q51 and Q52, running at unequal
current densities. The difference in VBE results in a voltage with
a positive TC, which is amplified by a ratio of
R54
R58
2×
This PTAT voltage, combined with VBEs of Q51 and Q52,
produces a stable band gap voltage.
Reduction in the band gap curvature is performed by the ratio
of Resistors R44 and R59, one of which is linearly temperature
dependent. Precision laser trimming and other patented circuit
techniques are used to further enhance the drift performance.
SHDN
R60
Q51
R54
R61
R53
Q52
R58
R59 R44
R48
R49
Q1
GND
00419-040
V
IN
VOUT (FORCE)
VOUT (SENSE)
Figure 33. Simplified Schematic
DEVICE POWER DISSIPATION CONSIDERATIONS
The ADR391/ADR392/ADR395 are capable of delivering load
currents to 5 mA, with an input voltage that ranges from 2.8 V
(ADR391 only) to 15 V. When these devices are used in
applications with large input voltages, care should be taken to
avoid exceeding the specified maximum power dissipation or
junction temperature because it could result in premature
device failure. The following formula should be used to
calculate the maximum junction temperature or dissipation of
the device:
JA
A
J
D
TT
Pθ
=– (5)
where:
TJ and TA are, respectively, the junction and ambient temperatures.
PD is the device power dissipation.
θJA is the device package thermal resistance.
SHUTDOWN MODE OPERATION
The ADR391/ADR392/ADR395 include a shutdown feature
that is TTL/CMOS level compatible. A logic low or a zero volt
condition on the SHDN pin is required to turn the devices off.
During shutdown, the output of the reference becomes a high
impedance state, where its potential would then be determined
by external circuitry. If the shutdown feature is not used, the
SHDN pin should be connected to VIN (Pin 2).
ADR391/ADR392/ADR395
Rev. H | Page 15 of 20
APPLICATIONS INFORMATION
BASIC VOLTAGE REFERENCE CONNECTION
The circuit shown in Figure 34 illustrates the basic configuration
for the ADR39x family. Decoupling capacitors are not required
for circuit stability. The ADR39x family is capable of driving
capacitive loads from 0 μF to 10 μF. However, a 0.1 μF ceramic
output capacitor is recommended to absorb and deliver the
charge, as required by a dynamic load.
S
HUTDOWN
INPUT
C
B
0.1µF
C
B
0.1µF
*
*OUTPUT
*NOT REQUIRED
ADR39x
SHDN GND
V
OUT ( S ENSE)
V
IN
V
OUT (FORCE)
00419-041
Figure 34. Basic Configuration for the ADR39x Family
Stacking Reference ICs for Arbitrary Outputs
Some applications may require two reference voltage sources,
which are a combined sum of standard outputs. Figure 35 shows
how this stacked output reference can be implemented.
GND
U2
U1
C2
0.1µF
C2
0.1µF
OUTPUTTABLE
U1/U2
SHDN
V
OUT (SEN S E)
V
OUT (FORCE)
V
IN
V
OUT1
V
OUT2
V
IN
V
OUT1
(V) V
OUT2
(V)
ADR391/ADR391
ADR392/ADR392
ADR395/ADR395
2.5
4.096
5
5.0
8.192
10
00419-042
GND
SHDN
V
OUT (SEN S E)
V
OUT (FORCE)
V
IN
Figure 35. Stacking Voltage References with the ADR391/ADR392/ADR395
Two reference ICs are used, fed from an unregulated input, VIN.
The outputs of the individual ICs are connected in series, which
provide two output voltages, VOUT1 and VOUT2. VOUT1 is the
terminal voltage of U1, while VOUT2 is the sum of this voltage
and the terminal voltage of U2. U1 and U2 are chosen for the
two voltages that supply the required outputs (see the Output
Table in Figure 35). For example, if both U1 and U2 are ADR391s,
VOUT1 is 2.5 V and VOUT2 is 5.0 V.
While this concept is simple, a precaution is required. Because
the lower reference circuit must sink a small bias current from
U2 plus the base current from the series PNP output transistor
in U2, either the external load of U1 or an external resistor must
provide a path for this current. If the U1 minimum load is not
well defined, the external resistor should be used and set to a
value that conservatively passes 600 μA of current with the
applicable VOUT1 across it. Note that the two U1 and U2
reference circuits are treated locally as macrocells; each has its
own bypasses at input and output for best stability. Both U1 and
U2 in this circuit can source dc currents up to their full rating.
The minimum input voltage, VIN, is determined by the sum of
the outputs, VOUT2, plus the dropout voltage of U2.
A Negative Precision Reference without Precision Resistors
A negative reference can be easily generated by adding an A1
op amp and is configured as shown in Figure 36. VOUT (FORCE)
and VOUT (SENSE) are at virtual ground and, therefore, the negative
reference can be taken directly from the output of the op amp.
The op amp must be dual-supply, low offset, and rail-to-rail if
the negative supply voltage is close to the reference output.
GND
A1
SHDN
+
V
DD
V
OUT (FORCE)
V
OUT (SEN S E)
–V
DD
V
IN
–V
REF
00419-043
Figure 36. Negative Reference
ADR391/ADR392/ADR395
Rev. H | Page 16 of 20
General-Purpose Current Source
Many times in low power applications, the need arises for a
precision current source that can operate on low supply voltages.
The ADR391/ADR392/ADR395 can be configured as a precision
current source. As shown in Figure 37, the circuit configuration
is a floating current source with a grounded load. The reference
output voltage is bootstrapped across RSET, which sets the output
current into the load. With this configuration, circuit precision
is maintained for load currents in the range from the reference
supply current, typically 90 μA to approximately 5 mA.
ADR39x
GND
R1
P1
R1
0.1µF
SHDN
V
IN
V
IN
V
OUT (FORCE)
V
OUT (SENSE)
I
SET
R
SET
I
OUT
= I
SET
+ I
SY
(I
SET
)
R
L
I
SY
ADJUST
I
SY
(I
SET
)
00419-044
Figure 37. A General-Purpose Current Source
High Power Performance with Current Limit
In some cases, the user may want higher output current delivered
to a load and still achieve better than 0.5% accuracy out of the
ADR39x. The accuracy for a reference is normally specified on
the data sheet with no load. However, the output voltage changes
with load current.
The circuit shown in Figure 38 provides high current without
compromising the accuracy of the ADR39x. The series pass
transistor, Q1, provides up to 1 A load current. The ADR39x
delivers only the base drive to Q1 through the force pin. The
sense pin of the ADR39x is a regulated output and is connected
to the load.
The Transistor Q2 protects Q1 during short-circuit limit faults
by robbing its base drive. The maximum current is
ILMAX ≈ 0.6 V/RS (6)
SHDN GND
U1
ADR39x
00419-045
V
IN
V
IN
V
OUT (FORCE)
R
L
I
L
R
S
V
OUT (SENSE)
Q2
Q2N2222
R1
4.7kΩ
Q1
Q2N4921
Figure 38. ADR39x for High Power Performance with Current Limit
A similar circuit function can also be achieved with the
Darlington transistor configuration, as shown in Figure 39.
ADR39x
GND
U1
00419-D-046
SHDN
V
IN
V
IN
V
OUT (FORCE)
R
L
R
S
V
OUT (SENSE)
Q1
Q2N2222
R1
4.7kΩ
Q2
Q2N4921
Figure 39. ADR39x for High Output Current
with Darlington Drive Configuration
ADR391/ADR392/ADR395
Rev. H | Page 17 of 20
–150
DRIFT (ppm)
150
TIME (Hours)
0
–100
–50
0
50
100
100 200 300 400 500 600 700 1000
00419-002
900800
CAPACITORS
Input Capacitor
Input capacitors are not required on the ADR39x. There is no
limit for the value of the capacitor used on the input, but a 1 μF
to 10 μF capacitor on the input improves transient response in
applications where the supply suddenly changes. An additional
0.1 μF in parallel also helps reduce noise from the supply.
Output Capacitor
The ADR39x does not require output capacitors for stability under
any load condition. An output capacitor, typically 0.1 μF, filters
out any low level noise voltage and does not affect the operation
of the part. On the other hand, the load transient response can
improve with the addition of a 1 μF to 10 μF output capacitor in
parallel. A capacitor here acts as a source of stored energy for a
sudden increase in load current. The only parameter that degrades
by adding an output capacitor is the turn-on time, and it depends
on the size of the capacitor chosen.
Figure 40. ADR391 Typical Long-Term Drift over 1000 Hours
ADR391/ADR392/ADR395
Rev. H | Page 18 of 20
OUTLINE DIMENSIONS
*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
PIN 1
1.60 BSC 2.80 BSC
1.90
BSC
0.95 BSC
0.20
0.08
0.60
0.45
0.30
8°
4°
0°
0.50
0.30
0.10 MAX SEATING
PLANE
*1.00 MAX
*0.90
0.87
0.84
2.90 BS C
54
123
Figure 41. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions shown in millimeters
ORDERING GUIDE
Model
Output
Voltage
(VO)
Initial
Accuracy Temperature
Coefficient
(ppm/°C)
Package
Description
Package
Option Branding
Ordering
Quantity
Temp eratu re
Range
(mV) (%)
ADR391AUJZ-REEL71 2.5 ±6 0.24 25 5-Lead TSOT UJ-5 R1A 3,000 −40°C to +125°C
ADR391AUJZ-R21 2.5 ±6 0.24 25 5-Lead TSOT UJ-5 R1A 250 −40°C to +125°C
ADR391BUJZ-REEL71 2.5 ±4 0.16 9 5-Lead TSOT UJ-5 R1B 3,000 −40°C to +125°C
ADR391BUJZ-R21 2.5 ±4 0.16 9 5-Lead TSOT UJ-5 R1B 250 −40°C to +125°C
ADR392AUJZ-REEL71 4.096 ±6 0.15 25 5-Lead TSOT UJ-5 RCA 3,000 −40°C to +125°C
ADR392AUJZ-R21 4.096 ±6 0.15 25 5-Lead TSOT UJ-5 RCA 250 −40°C to +125°C
ADR392BUJZ-REEL71 4.096 ±5 0.12 9 5-Lead TSOT UJ-5 RCB 3,000 −40°C to +125°C
ADR392BUJZ-R21 4.096 ±5 0.12 9 5-Lead TSOT UJ-5 RCB 250 −40°C to +125°C
ADR392WBUJZ-R71, 2 4.096 ±5 0.12 9 5-Lead TSOT UJ-5 RCB 3,000 −40°C to +125°C
ADR395AUJZ-REEL71 5.0 ±6 0.12 25 5-Lead TSOT UJ-5 RDA 3,000 −40°C to +125°C
ADR395AUJZ-R21 5.0 ±6 0.12 25 5-Lead TSOT UJ-5 RDA 250 −40°C to +125°C
ADR395BUJZ-REEL71 5.0 ±5 0.10 9 5-Lead TSOT UJ-5 RDB 3,000 −40°C to +125°C
ADR395BUJZ-R21 5.0 ±5 0.10 9 5-Lead TSOT UJ-5 RDB 250 −40°C to +125°C
1 Z = RoHS Compliant Part.
2 Automotive grade.
ADR391/ADR392/ADR395
Rev. H | Page 19 of 20
NOTES
ADR391/ADR392/ADR395
Rev. H | Page 20 of 20
NOTES
©2002–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00419-0-10/09(H)
