1 pC Charge Injection, 100 pA Leakage,
CMOS, ±5 V/+5 V/+3 V, Quad SPST Switches
ADG611/ADG612/ADG613
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2002–2009 Analog Devices, Inc. All rights reserved.
FEATURES
1 pC charge injection
±2.7 V to ±5.5 V dual-supply operation
+2.7 V to +5.5 V single-supply operation
Automotive temperature range: −40°C to +125°C
100 pA maximum at 25°C leakage currents
85 Ω on resistance
Rail-to-rail switching operation
Fast switching times
16-lead TSSOP and SOIC packages
Typical power consumption: <0.1 μW
TTL-/CMOS-compatible inputs
APPLICATIONS
Automatic test equipment
Data acquisition systems
Battery-powered systems
Communications systems
Sample-and-hold systems
Audio signal routing
Relay replacement
Avionics
FUNCTIONAL BLOCK DIAGRAM
NOTES
1. SWITCHES SHOWN FOR A LOGIC 1 INPUT.
IN1
IN2
IN
3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG611
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG612
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG613
02753-001
Figure 1.
GENERAL DESCRIPTION
The ADG611/ADG612/ADG613 are monolithic CMOS devices
containing four independently selectable switches. These switches
offer ultralow charge injection of 1 pC over the full input signal
range and typical leakage currents of 10 pA at 25°C.
The devices are fully specified for ±5 V, +5 V, and +3 V supplies.
Each contains four independent single-pole, single-throw (SPST)
switches. The ADG611 and ADG612 differ only in that the digital
control logic is inverted. The ADG611 switches are turned on
with a logic low on the appropriate control input, whereas a
logic high is required to turn on the switches of the ADG612.
The ADG613 contains two switches with digital control logic
similar to that of the ADG611 and two switches in which the
logic is inverted.
Each switch conducts equally well in both directions when on
and has an input signal range that extends to the supplies. The
ADG613 exhibits break-before-make switching action. The
ADG611/ADG612/ADG613 are available in a small, 16-lead
TSSOP package, and the ADG611 is also available in a 16-lead
SOIC package.
PRODUCT HIGHLIGHTS
1. Ultralow charge injection (1 pC typically).
2. Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V operation.
3. Automotive temperature range: −40°C to +125°C.
4. Small, 16-lead TSSOP and SOIC packages.
ADG611/ADG612/ADG613
Rev. A | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Dual-Supply Operation ............................................................... 3
Single-Supply Operation ............................................................. 4
Absolute Maximum Ratings ............................................................6
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions ..............................7
Typical Performance Characteristics ..............................................8
Terminology .................................................................................... 10
Test Circuits ..................................................................................... 11
Applications Information .............................................................. 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
REVISION HISTORY
11/09—Rev. 0 to Rev. A
Changes to Analog Signal Range Parameter
and to On Resistance, RON Parameter, Table 1 .......................... 3
Change to Digital Input Capacitance, CIN Parameter, Table 2 .... 4
Changes to Table 4 and to Absolute Maximum Ratings Section ...... 6
Added Table 5; Renumbered Sequentially .................................... 7
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 14
1/02—Revision 0: Initial Version
ADG611/ADG612/ADG613
Rev. A | Page 3 of 16
SPECIFICATIONS
DUAL-SUPPLY OPERATION
VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter +25°C −40°C to +85°C −40°C to +125°C1Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VSS to VDD V
On Resistance, RON 85 Ω typ VS = ±3 V, IS = −1 mA; see Figure 14
115 140 160 Ω max VS = ±3 V, IS = −1 mA; see Figure 14
On-Resistance Match
Between Channels, ΔRON
2 Ω typ VS = ±3 V, IS = −1 mA
4 5.5 6.5 Ω max VS = ±3 V, IS = −1 mA
On-Resistance Flatness, RFLAT(ON) 25 Ω typ VS = ±3 V, IS = −1 mA
40 55 60 Ω max VS = ±3 V, IS = −1 mA
LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V
Source Off Leakage, IS(OFF) ±0.01 nA typ VD = ±4.5 V, VS = +4.5 V; see Figure 15
±0.1 ±0.25 ±2 nA max
VD = ±4.5 V, VS = +4.5 V; see Figure 15
Drain Off Leakage, ID(OFF) ±0.01 nA typ VD = ±4.5 V, VS = + 4.5 V; see Figure 15
±0.1 ±0.25 ±2 nA max
VD = ±4.5 V, VS = + 4.5 V; see Figure 15
Channel On Leakage, ID(ON), IS(ON) ±0.01 nA typ VD = VS = ±4.5 V; see Figure 16
±0.1 ± 0.25 ± 6 nA max VD = VS = ±4.5 V; see Figure 16
DIGITAL INPUTS
Input High Voltage, VINH 2.4 V min
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH
±0.1 μA max VIN = VINL or VINH
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2
tON 45 ns typ RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
65 75 90 ns max RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
tOFF 25 ns typ RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
40 45 50 ns max RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
Break-Before-Make Time Delay, tBBM 15 ns typ RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18
10 ns min RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18
Charge Injection −0.5 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19
Off Isolation −65 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 20
Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 21
−3 dB Bandwidth 680 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 22
CS(OFF) 5 pF typ f = 1 MHz
CD(OFF) 5 pF typ f = 1 MHz
CD(ON), CS(ON) 5 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = +5.5 V, VSS = −5.5 V
IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V
1.0 μA max Digital inputs = 0 V or 5.5 V
ISS 0.001 μA typ Digital inputs = 0 V or 5.5 V
1.0 μA max Digital inputs = 0 V or 5.5 V
1 The temperature range for the Y version is −40°C to +125°C.
2 Guaranteed by design; not subject to production test.
ADG611/ADG612/ADG613
Rev. A | Page 4 of 16
SINGLE-SUPPLY OPERATION
VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter +25°C −40°C to +85°C 40°C to +125°C1Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 to VDD V
On Resistance, RON 210 Ω typ VS = 3.5 V, IS = −1 mA; see Figure 14
290 350 380 Ω max VS = 3.5 V, IS = −1 mA; see Figure 14
On-Resistance Match
Between Channels, ΔRON
3 Ω typ VS = 3.5 V, IS = −1 mA
10 12 13 Ω max VS = 3.5 V, IS = −1 mA
LEAKAGE CURRENTS VDD = 5.5 V
Source Off Leakage, IS(OFF) ±0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 15
±0.1 ±0.25 ±2 nA max VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 15
Drain Off Leakage, ID(OFF) ±0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 15
±0.1 ±0.25 ±2 nA max VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 15
Channel On Leakage, ID(ON), IS(ON) ±0.01 nA typ VS = VD = 1 V or 4.5 V; see Figure 16
±0.1 ±0.25 ±6 nA max VS = VD = 1 V or 4.5 V; see Figure 16
DIGITAL INPUTS
Input High Voltage, VINH 2.4 V min
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH
±0.1 μA max VIN = VINL or VINH
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2
tON 70 ns typ RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
100 130 150 ns max RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
tOFF 25 ns typ RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
40 45 50 ns max RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
Break-Before-Make Time Delay, tBBM 25 ns typ RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18
10 ns min RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18
Charge Injection 1 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19
Off Isolation −62 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 20
Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 21
−3 dB Bandwidth 680 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 22
CS(OFF) 5 pF typ f = 1 MHz
CD(OFF) 5 pF typ f = 1 MHz
CD(ON), CS(ON) 5 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 5.5 V
IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V
1.0 μA max Digital inputs = 0 V or 5.5 V
1 The temperature range for the Y version is −40°C to +125°C.
2 Guaranteed by design; not subject to production test.
ADG611/ADG612/ADG613
Rev. A | Page 5 of 16
VDD = 3 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter +25°C −40°C to +85°C 40°C to +125°C1Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 to VDD V
On Resistance, RON 380 420 460 Ω typ VS = 1.5 V, IS = −1 mA; see Figure 14
LEAKAGE CURRENTS VDD = 3.3 V
Source Off Leakage, IS(OFF) ±0.01 nA typ VS = 1 V/3 V, VD = 3 V/1 V; see Figure 15
±0.1 ±0.25 ± 2 nA max VS = 1 V/3 V, VD = 3 V/1 V; see Figure 15
Drain Off Leakage, ID(OFF) ±0.01 nA typ VS = 1 V/3 V, VD = 3 V/1 V; see Figure 15
±0.1 ±0.25 ±2 nA max VS = 1 V/3 V, VD = 3 V/1 V; see Figure 15
Channel On Leakage, ID(ON), IS(ON) ±0.01 nA typ VS = VD = 1 V or 3 V; see Figure 16
±0.1 ±0.25 ±6 nA max VS = VD = 1 V or 3 V; see Figure 16
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH
±0.1 μA max VIN = VINL or VINH
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2
tON 130 ns typ RL = 300 Ω, CL = 35 pF, VS = 2 V; see Figure 17
185 230 260 ns max RL = 300 Ω, CL = 35 pF, VS = 2 V; see Figure 17
tOFF 40 ns typ RL = 300 Ω, CL = 35 pF, VS = 2 V; see Figure 17
55 60 65 ns max RL = 300 Ω, CL = 35 pF, VS = 2 V; see Figure 17
Break-Before-Make Time Delay, tBBM 50 ns typ RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 2 V; see Figure 18
10 ns min RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 2 V; see Figure 18
Charge Injection 1.5 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19
Off Isolation −62 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 20
Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 21
−3 dB Bandwidth 680 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 22
CS(OFF) 5 pF typ f = 1 MHz
CD(OFF) 5 pF typ f = 1 MHz
CD(ON), CS(ON) 5 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 3.3 V
IDD 0.001 μA typ Digital inputs = 0 V or 3.3 V
1.0 μA max Digital inputs = 0 V or 3.3 V
1 The temperature range for the Y version is −40°C to +125°C.
2 Guaranteed by design; not subject to production test.
ADG611/ADG612/ADG613
Rev. A | Page 6 of 16
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted
Table 4.
Parameter Rating
VDD to VSS 13 V
VDD to GND −0.3 V to +6.5 V
VSS to GND +0.3 V to −6.5 V
Analog Inputs1 V
SS − 0.3 V to VDD + 0.3 V
Digital Inputs1 GND − 0.3 V to VDD + 0.3 V or
30 mA, whichever occurs first
Peak Current, S or D 20 mA (pulsed at 1 ms, 10%
duty cycle maximum)
Continuous Current, S or D 10 mA
3 V operation 85°C to 125°C 7.5 mA
Operating Temperature Range
Automotive (Y Version) −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
θJA Thermal Impedance
16-Lead TSSOP 150.4°C/W
16-Lead SOIC, 4-Layer Board 80.6°C/W
Lead Soldering
Lead Temperature, Soldering
(10 sec)
300°C
IR Reflow, Peak Temperature
(<20 sec)
220°C
(Pb-Free) Soldering
Reflow, Peak Temperature 260(+0/−5)°C
Time at Peak Temperature 20 sec to 40 sec
1Overvoltages at IN, S, or D are clamped by internal diodes. The current
should be limited to the maximum ratings given.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating can be applied at any one time.
ESD CAUTION
ADG611/ADG612/ADG613
Rev. A | Page 7 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADG611/
ADG612/
ADG613
TOP VIEW
(Not to Scale)
1
IN1
2
D1
3
S1
4
V
SS
5
GND
6
S4
7
D4
8
IN4
16
15
14
13
12
11
10
9
IN2
D2
S2
V
DD
NC
S3
D3
IN3
NC = NO CONNECT
0
2753-002
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 IN1 Switch 1 Digital Control Input.
2 D1 Drain Terminal of Switch 1. Can be an input or output.
3 S1 Source Terminal of Switch 1. Can be an input or output.
4 VSS Most Negative Power Supply Terminal. Tie this pin to GND when using the device with single-supply voltages.
5 GND Ground (0 V) Reference.
6 S4 Source Terminal of Switch 4. Can be an input or output.
7 D4 Drain Terminal of Switch 4. Can be an input or output.
8 IN4 Switch 4 Digital Control Input.
9 IN3 Switch 3 Digital Control Input.
10 D3 Drain Terminal of Switch 3. Can be an input or output.
11 S3 Source Terminal of Switch 3. Can be an input or output.
12 NC Not Internally Connected.
13 VDD Most Positive Power Supply Terminal.
14 S2 Source Terminal of Switch 2. Can be an input or output.
15 D2 Drain Terminal of Switch 2. Can be an input or output.
16 IN2 Switch 2 Digital Control Input.
Table 6. ADG611/ADG612 Truth Table
ADG611 Input ADG612 Input Switch Condition
0 1 On
1 0 Off
Table 7. ADG613 Truth Table
Logic Switch 1, Switch 4 Switch 2, Switch 3
0 Off On
1 On Off
ADG611/ADG612/ADG613
Rev. A | Page 8 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
250
0
50
100
150
200
54321012345
ON RESISTANCE ()
VD, VS (V)
TA = 25°C
±3.3V
±4.5V
±5.5V
±5.0V
±2.7V ±3.0V
02753-003
600
500
400
300
200
100
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
ON RESISTANCE ()
VD, VS (V)
VDD = 5V
VSS = 0V
+125°C
+85°C
+25°C –40°C
02753-006
Figure 3. On Resistance vs. VD (VS), Dual Supplies Figure 6. On Resistance vs. VD (VS) for Various Temperatures, Single Supply
600
500
400
300
200
100
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
ON RESISTANCE ()
VD, VS (V)
TA = 25°C
VSS = 0V VDD = 2.7V
VDD = 3.0V
VDD = 3.3V
VDD = 4.5V
VDD = 5.0V
02753-004
2
1
0
–1
–2
–3
–4
–5
–6
0 20406080100120
LEAKAGE CURRENT (nA)
TEMPERATURE (°C)
V
DD
= +5V
V
SS
= –5V I
S(OFF)
I
D(OFF)
I
S(ON),
I
D(ON)
02753-007
Figure 4. On Resistance vs. VD (VS), Single Supply Figure 7. Leakage Current vs. Temperature, Dual Supplies
250
0
50
100
150
200
54321012345
ON RESISTANCE ()
VD, VS (V)
VDD = +5V
VSS = –5V
+125°C
+85°C
–40°C
+25°C
02753-005
2
1
0
–1
–2
–3
–4
–5
–6
0 20406080100120
LEAKAGE CURRENT (nA)
TEMPERATURE (°C)
V
DD
= 5V
V
SS
= 0V I
S(OFF)
I
D(OFF)
I
S(ON),
I
D(ON)
02753-008
Figure 5. On Resistance vs. VD (VS) for Various Temperatures, Dual Supplies Figure 8. Leakage Current vs. Temperature, Single Supply
ADG611/ADG612/ADG613
Rev. A | Page 9 of 16
2.0
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
54321012345
Q
INJ
(pC)
V
S
(V)
T
A
= 25°C V
DD
= +3V
V
SS
= 0V
V
DD
= +5V
V
SS
= 0V
V
DD
= +5V
V
SS
= –5V
02753-009
Figure 9. Charge Injection vs. Source Voltage
120
100
80
60
40
20
0
–40 0–20 20 40 60 80 100 120
TIME (ns)
TEMPERATURE (°C)
t
ON
, V
DD
= +5V
V
SS
= 0V
t
ON
, V
DD
= +5V
V
SS
= –5V
t
OFF
, V
DD
= +5V
V
SS
= 0V
t
OFF
, V
DD
= +5V
V
SS
= –5V
02753-010
Figure 10. tON/tOFF Times vs. Temperature
0
–2
–4
–6
–8
–10
–12
–14
–16
–18
0.3 1k100101
ATTENUATION (dB)
FREQUENCY (MHz)
T
A
= 25°C
V
DD
= –5V
V
SS
= +5V
V
DD
= +5V
V
SS
= 0V
02753-011
Figure 11. On Response vs. Frequency
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
0.3 1k100101
OFF ISOLATION (dB)
FREQUENCY (MHz)
V
DD
= –5V
V
SS
= +5V
T
A
= 25°C
02753-012
Figure 12. Off Isolation vs. Frequency
0
–10
–20
–30
–40
–50
–60
–70
–80
–100
–90
0.3 1k100101
CROSSTALK (dB)
FREQUENCY (MHz)
V
DD
= +5V
V
SS
= –5V
T
A
= 25°C
02753-013
Figure 13. Crosstalk vs. Frequency
ADG611/ADG612/ADG613
Rev. A | Page 10 of 16
TERMINOLOGY
VDD
Most positive power supply potential.
VSS
Most negative power supply potential.
IDD
Positive supply current.
ISS
Negative supply current.
GND
Ground (0 V) reference.
S
Source terminal. Can be an input or output.
D
Drain terminal. Can be an input or output.
IN
Logic control input.
VD (VS)
Analog voltage on Terminal D and Terminal S.
RON
Ohmic resistance between Terminal D and Terminal S.
ΔRON
On-resistance match between any two channels, that is,
RONMAX − RONMIN.
RFLAT(ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
IS(OFF)
Source leakage current with the switch off.
ID(OFF)
Drain leakage current with the switch off.
ID(ON), IS(ON)
Channel leakage current with the switch on.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL, IINH
Input current of the digital input.
CS(OFF)
Off switch source capacitance. Measured with reference
to ground.
CD(OFF)
Off switch drain capacitance. Measured with reference
to ground.
CD(ON), CS(ON)
On switch capacitance. Measured with reference to ground.
CIN
Digital input capacitance.
tON
Delay between applying the digital control input and the output
switching on (see Figure 17).
tOFF
Delay between applying the digital control input and the output
switching off (see Figure 17).
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
On Response
Frequency response of the on switch.
Insertion Loss
Loss due to the on resistance of the switch.
ADG611/ADG612/ADG613
Rev. A | Page 11 of 16
TEST CIRCUITS
I
DS
V1
SD
V
S
R
ON
= V1/I
DS
02753-014
Figure 14. On Resistance
SD
V
S
V
D
I
S(OFF)
I
D(OFF)
AA
02753-015
Figure 15. Off Leakage
SD
V
D
I
D(ON)
A
NC
NC = NO CONNECT
0
2753-016
Figure 16. On Leakage
V
DD
V
SS
V
DD
V
SS
0.1µF 0.1µF
GND
t
ON
t
OFF
R
L
300
C
L
35pF
V
S
IN
SD
50% 50%
90% 90%
50% 50%
V
OUT
V
OUT
V
IN
V
IN
ADG612
ADG611
02753-017
Figure 17. Switching Times
V
DD
V
SS
V
DD
0.1µF 0.1µF
V
SS
V
S1
V
S2
V
IN
IN1,
IN2
S1 D1
GND
S2 D2
ADG613
50% 50%
90%
90%
90%
90%
t
BBM
t
BBM
0V
0V
0V
R
L1
300
C
L1
35pF
R
L2
300
C
L2
35pF
V
OUT1
V
IN
V
OUT1
V
OUT2
V
OUT2
02753-018
Figure 18. Break-Before-Make Time Delay
V
DD
V
SS
V
DD
V
SS
V
S
IN
SD
R
S
ON OFF
GND
V
OUT
V
IN
V
IN
ADG611
ADG612
V
OUT
Q
INJ
= C
L
× ΔV
OUT
ΔV
OUT
C
L
1nF
02753-019
Figure 19. Charge Injection
ADG611/ADG612/ADG613
Rev. A | Page 12 of 16
V
OUT
R
L
50
IN
GND
V
IN
S
D
V
DD
V
SS
V
DD
V
SS
50
NETWORK
ANALYZER
OFF ISOLATION = 20 logV
OUT
V
S
0.1µF0.1µF
50
V
S
02753-020
Figure 20. Off Isolation
R
L
50
V
DD
V
SS
V
DD
V
SS
50
0.1µF0.1µF
V
S
GND
VIN2
SD
SD
NC V
OUT
VIN1
CHANNEL-TO-CHANNEL CROSSTALK = 20 log |V
S
/V
OUT
|
02753-021
Figure 21. Channel-to-Channel Crosstalk
V
OUT
R
L
50
IN
GND
V
IN
S
D
V
DD
V
SS
V
DD
V
SS
NETWORK
ANALYZER
INSERTION LOSS = 20 log V
OUT
WITH SWITCH
V
OUT
WITHOUT SWITCH
0.1µF0.1µF
50
V
S
02753-022
Figure 22. Bandwidth
ADG611/ADG612/ADG613
Rev. A | Page 13 of 16
APPLICATIONS INFORMATION
Figure 23 illustrates a photodetector circuit with programmable
gain. With the resistor values shown in this figure, gains in the
range of 2 to 16 can be achieved by using different combinations
of switches.
R1
33k
R2
510k
R4
240k
R5
240k
R6
120k
R7
120k
R8
120k
R3
510k
R9
120k
R9
120k
S1 D1
S2 D2
S3 D3
S4 D4
GND
C1
2.5V
D1
5V
V
OUT
5V
2.5V
GAIN RANGE: 2 TO 16
(LSB) IN1
IN2
IN3
(
MSB) IN4
02753-023
Figure 23. Photodetector Circuit with Programmable Gain
ADG611/ADG612/ADG613
Rev. A | Page 14 of 16
OUTLINE DIMENSIONS
16 9
81
PIN 1
SEATING
PLANE
4.50
4.40
4.30
6.40
BSC
5.10
5.00
4.90
0.65
BSC
0.15
0.05
1.20
MAX
0.20
0.09 0.75
0.60
0.45
0.30
0.19
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 24. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AC
10.00 (0.3937)
9.80 (0.3858)
16 9
8
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
COPLANARITY
0.10
060606-A
45°
Figure 25. 16-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model Temperature Range Package Description Package Option
ADG611YRUZ1−40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG611YRUZ-REEL1
−40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG611YRUZ-REEL71
−40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG611YRZ1
−40°C to +125°C 16-Lead Standard Small Outline Package [SOIC_N] R-16
ADG612YRUZ1
−40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG612YRUZ-REEL1
−40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG612YRUZ-REEL71
−40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG612WRUZ-REEL1
−40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG613YRUZ1
−40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG613YRUZ-REEL1
−40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG613YRUZ-REEL71
−40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
1 Z = RoHS Compliant Part.
ADG611/ADG612/ADG613
Rev. A | Page 15 of 16
NOTES
ADG611/ADG612/ADG613
Rev. A | Page 16 of 16
NOTES
©2002–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02753-0-11/09(A)