50
60
70
80
90
100
0.001 0.010 0.100 1.000
Efficiency (%)
Iout (A)
Vin = 2.5V
Vin = 3.3V
Vin = 4.2V
Vin = 5.0V
C004
Vout = 1.8 V
TPS62087
2.5V to 6V
VIN
POWER GOOD
VOS
FB
VIN
GND
EN
SW
PG
C2
22µF
R3
1M
VOUT
1.8V/3A
L1
0.47µH
C1
10µF
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS62085
,
TPS62086
,
TPS62087
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
TPS6208x, 3-A Step-Down Converter With Hiccup Short-Circuit Protection In 2-mm × 2-
mm VSON Package
1
1 Features
1• DCS-Control™ Topology
• Up to 95% Efficiency
• Hiccup Short-Circuit Protection
• Power Save Mode for Light Load Efficiency
• 100% Duty Cycle for Lowest Dropout
• 2.5-V to 6.0-V Input Voltage Range
• 17-μA Operating Quiescent Current
• 0.8-V to VIN Adjustable Output Voltage
• 1.8-V and 3.3-V Fixed Output Voltage
• Output Discharge
• Power Good Output
• Thermal Shutdown Protection
• Available in 2-mm × 2-mm VSON Package
• Create a Custom Design Using the:
– TPS62085 WEBENCH®Power Designer
– TPS62086 WEBENCH®Power Designer
– TPS62087 WEBENCH®Power Designer
2 Applications
• Battery-Powered Applications
• Point-of-Load
• Processor Supplies
• Hard Disk Drives
3 Description
The TPS62085, TPS62086, and TPS62087 devices
are high-frequency synchronous step-down
converters optimized for small solution size and high
efficiency. With an input voltage range of 2.5 V to
6.0 V, common battery technologies are supported.
The devices focus on high-efficiency step-down
conversion over a wide output current range. At
medium to heavy loads, the converter operates in
PWM mode and automatically enters Power Save
Mode operation at light load to maintain high
efficiency over the entire load current range.
To address the requirements of system power rails,
the internal compensation circuit allows a large
selection of external output capacitor values ranging
from 10 µF to 150 µF. Together with its DCS-Control
architecture, excellent load transient performance and
output voltage regulation accuracy are achieved. The
devices are available in a 2-mm × 2-mm VSON
package.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
TPS62085 VSON (7) 2.00 mm × 2.00 mmTPS62086
TPS62087
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Typical Application Schematic
Typical Application Efficiency
2
TPS62085
,
TPS62086
,
TPS62087
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
www.ti.com
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated
Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description............................................................. 1
4 Typical Application Schematic............................. 1
5 Revision History..................................................... 2
6 Device Options....................................................... 3
7 Pin Configuration and Functions......................... 3
8 Specifications......................................................... 3
8.1 Absolute Maximum Ratings ...................................... 3
8.2 ESD Ratings.............................................................. 4
8.3 Recommended Operating Conditions....................... 4
8.4 Thermal Information.................................................. 4
8.5 Electrical Characteristics........................................... 4
8.6 Typical Characteristics.............................................. 5
9 Detailed Description.............................................. 6
9.1 Overview................................................................... 6
9.2 Functional Block Diagram......................................... 6
9.3 Feature Description................................................... 7
9.4 Device Functional Modes.......................................... 8
10 Application and Implementation.......................... 9
10.1 Application Information............................................ 9
10.2 Typical Application ................................................. 9
11 Power Supply Recommendations ..................... 15
12 Layout................................................................... 15
12.1 Layout Guidelines ................................................. 15
12.2 Layout Example .................................................... 15
12.3 Thermal Considerations........................................ 15
13 Device and Documentation Support................. 16
13.1 Device Support...................................................... 16
13.2 Documentation Support ........................................ 16
13.3 Related Links ........................................................ 16
13.4 Community Resources.......................................... 16
13.5 Trademarks........................................................... 17
13.6 Electrostatic Discharge Caution............................ 17
13.7 Glossary................................................................ 17
14 Mechanical, Packaging, and Orderable
Information........................................................... 17
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (June 2015) to Revision B Page
• Changed package name from QFN to VSON in the Features list ......................................................................................... 1
• Added Webench links to the data sheet ................................................................................................................................ 1
• Added SW node AC value in Absolute Maximum Ratings table ........................................................................................... 3
• Changed fPFM To: fPSM in Equation 1 ..................................................................................................................................... 7
• Added Figure 2 to Power Save Mode section........................................................................................................................ 7
• Added Table 1 to Power Good section ................................................................................................................................. 8
• Changed Murata inductor part number in Table 5 ............................................................................................................... 11
Changes from Original (October 2013) to Revision A Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes,Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section.................................................................................................. 1
GND
SW
FB
VIN
PG
VOS
EN
4
3
1
5
6
7
2
3
TPS62085
,
TPS62086
,
TPS62087
www.ti.com
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation FeedbackCopyright © 2013–2018, Texas Instruments Incorporated
(1) For detailed ordering information, please check the Mechanical, Packaging, and Orderable Information section at the end of this
datasheet.
6 Device Options
PART NUMBER(1) OUTPUT VOLTAGE
TPS62085RLT Adjustable
TPS62086RLT 3.3 V
TPS62087RLT 1.8 V
7 Pin Configuration and Functions
RLT Package
7-Pin VSON
Top View
Pin Functions
PIN I/O DESCRIPTION
NAME NO.
EN 1 IN Device enable pin. To enable the device, this pin needs to be pulled high. Pulling this pin low disables the
device. This pin has a pulldown resistor of typically 400 kΩwhen the device is disabled.
FB 3 IN Feedback pin. For the fixed output voltage versions this pin must be connected to the output voltage.
GND 5 Ground pin.
PG 2 OUT Power good open drain output pin. The pullup resistor can not be connected to any voltage higher than 6 V. If
unused, leave it floating.
SW 6 PWR Switch pin of the power stage.
VIN 7 PWR Input voltage pin.
VOS 4 IN Output voltage sense pin. This pin must be directly connected to the output capacitor.
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) While switching.
8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Voltage at Pins(2) VIN, FB, VOS, EN, PG –0.3 7 VSW (DC) –0.3 VIN + 0.3
SW (AC, less than 100ns)(3) –3 11
Temperature Operating Junction, TJ–40 150 °C
Storage, Tstg –65 150 °C
4
TPS62085
,
TPS62086
,
TPS62087
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
www.ti.com
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
8.2 ESD Ratings VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-
C101(2) ±500
(1) Refer to Application and Implementation for further information.
8.3 Recommended Operating Conditions(1)
MIN NOM MAX UNIT
VIN Input voltage range 2.5 6 V
ISINK_PG Sink current at PG pin 1 mA
VPG Pullup resistor voltage 6 V
TJOperating junction temperature –40 125 °C
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
8.4 Thermal Information
THERMAL METRIC(1) TPS6208x
UNITRLT [VSON]
7 PINS
RθJA Junction-to-ambient thermal resistance 107.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 66.2 °C/W
RθJB Junction-to-board thermal resistance 17.1 °C/W
ψJT Junction-to-top characterization parameter 2.1 °C/W
ψJB Junction-to-board characterization parameter 17.1 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W
8.5 Electrical Characteristics
TJ= –40 °C to 125 °C, and VIN = 3.6 V. Typical values are at TJ= 25 °C, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
VIN Input voltage range 2.5 6 V
IQQuiescent current into VIN No load, device not switching
TJ= –40 °C to 85 °C, VIN = 2.5 V to 5.5 V 17 25 µA
ISD Shutdown current into VIN EN = Low,
TJ= –40 °C to 85 °C, VIN = 2.5 V to 5.5 V 0.7 5 µA
VUVLO Undervoltage lockout threshold VIN falling 2.1 2.2 2.3 V
Undervoltage lockout hysteresis VIN rising 200 mV
TJSD Thermal shutdown threshold TJrising 150 °C
Thermal shutdown hysteresis TJfalling 20 °C
LOGIC INTERFACE EN
VIH High-level input voltage VIN = 2.5 V to 6.0 V 1.0 V
VIL Low-level input voltage VIN = 2.5 V to 6.0 V 0.4 V
IEN,LKG Input leakage current into EN pin EN = High 0.01 0.16 µA
RPD Pulldown resistance at EN pin EN = Low 400 kΩ
SOFT START, POWER GOOD
tSS Soft-start time Time from EN high to 95% of VOUT nominal 0.8 ms
VPG Power good threshold VOUT rising, referenced to VOUT nominal 93% 95% 98%
VOUT falling, referenced to VOUT nominal 88% 90% 93%
1000
10k
100k
1M
10M
0.001 0.010 0.100 1.000
Switching Frequency (Hz)
Iout (A)
Vin = 2.5 V
Vin = 3.6 V
Vin = 6.0 V
C007
Vout = 1.2 V
5
TPS62085
,
TPS62086
,
TPS62087
www.ti.com
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation FeedbackCopyright © 2013–2018, Texas Instruments Incorporated
Electrical Characteristics (continued)
TJ= –40 °C to 125 °C, and VIN = 3.6 V. Typical values are at TJ= 25 °C, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
(1) For more information, see Power Save Mode.
(2) Conditions: L = 0.47 μH, COUT = 22 μF
VPG,OL Low-level output voltage Isink = 1 mA 0.4 V
IPG,LKG Input leakage current into PG pin VPG = 5.0 V 0.01 0.16 µA
OUTPUT
VOUT
Output voltage range, TPS62085 0.8 VIN V
Output voltage accuracy,
TPS62086, TPS62087(1) IOUT = 1 A, VIN ≥VOUT + 1 V, PWM mode –1.0% 1.0%
IOUT = 0 A, VIN ≥VOUT + 1 V, PSM mode –1.0% 2.1%
VFB Feedback regulation voltage(1)(2) IOUT = 1A , VIN ≥VOUT + 1 V, PWM mode 792 800 808 mV
IOUT = 0 A, VIN ≥VOUT + 1 V, PSM mode 792 800 817
IFB,LKG Feedback input leakage current VFB = 1 V 0.01 0.1 µA
RDIS Output discharge resistor EN = LOW, VOUT = 1.8 V 260 Ω
Line regulation IOUT = 1 A, VIN = 2.5 V to 6.0 V 0.02 %/V
Load regulation IOUT = 0.5 A to 3 A 0.16 %/A
POWER SWITCH
RDS(on) High-side FET ON-resistance ISW = 500 mA 31 56 mΩ
Low-side FET ON-resistance ISW = 500 mA 23 45 mΩ
ILIM High-side FET switch current limit 3.7 4.6 5.5 A
fSW PWM switching frequency IOUT = 1 A 2.4 MHz
8.6 Typical Characteristics
Figure 1. Switching Frequency
VOS
FB
GND
Output Discharge
Logic
260 Ω
R2(1)
R1(1)
Direct Control
and
Compensation
Timer
ton
Comparator
Ramp
Error Amplifier
DCS - Control TM
MOSFET Driver
Control Logic
High Side
Current Sense
Hiccup
Counter
SW
VIN
EN
Bandgap
Undervoltage Lockout
Thermal Shutdown
EN
PG
VFB
VREF
VREF
400 kΩ(2)
Note:
(1) R1, R2 are implemented in the fixed output voltage versions only.
(2) When the device is enabled, the 400 k resistor is disconnected.Ω
6
TPS62085
,
TPS62086
,
TPS62087
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
www.ti.com
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated
9 Detailed Description
9.1 Overview
The TPS62085, TPS62086, and TPS62087 synchronous step-down converters are based on the DCS-Control
(Direct Control with Seamless transition into Power Save Mode) topology. This is an advanced regulation
topology that combines the advantages of hysteretic, voltage, and current mode control schemes.
The DCS-Control topology operates in PWM (pulse width modulation) mode for medium to heavy load conditions
and in Power Save Mode at light load currents. In PWM mode, the converter operates with its nominal switching
frequency of 2.4 MHz, having a controlled frequency variation over the input voltage range. As the load current
decreases, the converter enters Power Save Mode, reducing the switching frequency and minimizing the IC
quiescent current to achieve high efficiency over the entire load current range. Because DCS-Control supports
both operation modes (PWM and PSM) within a single building block, the transition from PWM mode to Power
Save Mode is seamless and without effects on the output voltage. Fixed output voltage version provides smallest
solution size combined with lowest no load current. The devices offer both excellent DC voltage and superior
load transient regulation, combined with very low output voltage ripple, minimizing interference with RF circuits.
9.2 Functional Block Diagram
IN,MIN OUT OUT,MAX DS(on) L
V V I (R + R )= + ´
tON
IINDUCTOR
VOUT tPAUSE
= ´
´
=
-
´ ´
OUT
ON
IN
OUT
PSM
IN IN OUT
2
ON
OUT
V
t 420 ns
V
2 I
fV V V
t
V L
7
TPS62085
,
TPS62086
,
TPS62087
www.ti.com
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation FeedbackCopyright © 2013–2018, Texas Instruments Incorporated
9.3 Feature Description
9.3.1 Power Save Mode
As the load current decreases, the TPS62085, TPS62086, and TPS62087 enter Power Save Mode (PSM)
operation. During Power Save Mode, the converter operates with reduced switching frequency and with a
minimum quiescent current maintaining high efficiency. The power save mode occurs when the inductor current
becomes discontinuous. Power Save Mode is based on a fixed on-time architecture, as related in Equation 1.
The switching frequency over the whole load current range is also shown in Figure 1 for a typical application.
(1)
In Power Save Mode, the output voltage rises slightly above the nominal output voltage, as shown in Figure 9.
This effect is minimized by increasing the output capacitor or inductor value. The output voltage accuracy in PSM
operation is reflected in the electrical specification table and given for a 22-μF output capacitor.
During PAUSE period in PSM (shown in Figure 2 ), the device does not change the PG pin state nor does it
detect an UVLO event, in order to achieve a minimum quiescent current and maintain high efficiency at light
loads.
Figure 2. Power Save Mode Waveform Diagram
9.3.2 100% Duty Cycle Low Dropout Operation
The devices offer low input-to-output voltage difference by entering 100% duty cycle mode. In this mode, the
high-side MOSFET switch is constantly turned on and the low-side MOSFET is switched off. This is particularly
useful in battery powered applications to achieve the longest operation time by taking full advantage of the whole
battery voltage range. The minimum input voltage to maintain output regulation, depending on the load current
and output voltage can be calculated as:
with • VIN,MIN = Minimum input voltage to maintain an output voltage
• IOUT,MAX = Maximum output current
• RDS(on) = High-side FET ON-resistance
• RL= Inductor ohmic resistance (DCR) (2)
9.3.3 Soft Start
The TPS62085, TPS62086, and TPS62087 have an internal soft-start circuitry which monotonically ramps up the
output voltage and reaches the nominal output voltage during a soft-start time of typically 0.8 ms. This avoids
excessive inrush current and creates a smooth output voltage slope. It also prevents excessive voltage drops of
primary cells and rechargeable batteries with high internal impedance. The device is able to start into a
prebiased output capacitor. The device starts with the applied bias voltage and ramps the output voltage to its
nominal value.
8
TPS62085
,
TPS62086
,
TPS62087
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
www.ti.com
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated
Feature Description (continued)
9.3.4 Switch Current Limit and Hiccup Short-Circuit Protection
The switch current limit prevents the devices from high inductor current and from drawing excessive current from
the battery or input voltage rail. Excessive current might occur with a shorted or saturated inductor or a heavy
load or shorted output circuit condition. If the inductor current reaches the threshold ILIM, the high-side MOSFET
is turned off and the low-side MOSFET is turned on to ramp down the inductor current. When this switch current
limits is triggered 32 times, the devices stop switching and enable the output discharge. The devices then
automatically start a new start-up after a typical delay time of 66 µs has passed. This is named HICCUP short-
circuit protection. The devices repeat this mode until the high load condition disappears.
9.3.5 Undervoltage Lockout
To avoid misoperation of the device at low input voltages, an undervoltage lockout (UVLO) is implemented,
which shuts down the devices at voltages lower than VUVLO with a hysteresis of 200 mV.
9.3.6 Thermal Shutdown
The device goes into thermal shutdown and stops switching when the junction temperature exceeds TJSD. When
the device temperature falls below the threshold by 20°C, the device returns to normal operation automatically.
9.4 Device Functional Modes
9.4.1 Enable and Disable
The devices are enabled by setting the EN pin to a logic HIGH. Accordingly, shutdown mode is forced if the EN
pin is pulled LOW with a shutdown current of typically 0.7 μA.
In shutdown mode, the internal power switches as well as the entire control circuitry are turned off. An internal
resistor of 260 Ωdischarges the output through the VOS pin smoothly. The output discharge function also works
when thermal shutdown, UVLO, or short-circuit protection are triggered.
An internal pulldown resistor of 400 kΩis connected to the EN pin when the EN pin is LOW. The pulldown
resistor is disconnected when the EN pin is HIGH.
9.4.2 Power Good
The TPS62085, TPS62086, and TPS62087 have a power good output. The power good goes high impedance
once the output is above 95% of the nominal voltage, and is driven low once the output voltage falls below
typically 90% of the nominal voltage. The PG pin is an open-drain output and is specified to sink up to 1 mA. The
power good output requires a pullup resistor connecting to any voltage rail less than 6 V. The PG signal can be
used for sequencing of multiple rails by connecting it to the EN pin of other converters. Leave the PG pin
unconnected when not used. Table 1 shows the PG pin logic.
Table 1. PG Pin Logic
DEVICE CONDITIONS LOGIC STATUS
HIGH Z LOW
Enable EN = High, VFB ≥VPG √
EN = High, VFB < VPG √
Shutdown EN = Low √
Thermal Shutdown TJ> TJSD √
UVLO 0.5 V < VIN < VUVLO √
Power Supply
Removal VIN ≤0.5 V √
TPS62085
2.5V to 6V
R1
80.6k
R2
162k
VIN
POWER GOOD
VOS
FB
VIN
GND
EN
SW
PG
C2
22µF
R3
1M
VOUT
1.2V/3A
L1
0.47µH
C1
10µF
9
TPS62085
,
TPS62086
,
TPS62087
www.ti.com
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation FeedbackCopyright © 2013–2018, Texas Instruments Incorporated
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The TPS62085 is a synchronous step-down converter in which output voltage is adjusted by component
selection. The following section discusses the design of the external components to complete the power supply
design for several input and output voltage options by using typical applications as a reference. The TPS62086
and TPS62087 devices provide a fixed output voltage which does not need an external resistor divider.
10.2 Typical Application
Figure 3. 1.2-V Output Voltage Application
10.2.1 Design Requirements
For this design example, use the parameters listed in Table 2 as the input parameters.
Table 2. Design Parameters
DESIGN PARAMETER EXAMPLE VALUE
Input voltage 2.5 V to 6 V
Output voltage 1.2 V
Output ripple voltage <20 mV
Maximum output current 3 A
Table 3 lists the components used for the example.
Table 3. List of Components
REFERENCE DESCRIPTION MANUFACTURER
C1 10 µF, Ceramic capacitor, 6.3 V, X7R, size 0805, GRM21BR71A106ME51L Murata
C2 22 µF, Ceramic capacitor, 6.3 V, X5R, size 0805, GRM21BR60J226ME39L Murata
L1 0.47 µH, Power Inductor, size 4 mm × 4 mm × 1.5 mm, XFL4015-471ME Coilcraft
R1 Depending on the output voltage, 1%, size 0603; 0 Ωfor TPS62086, TPS62087 Std
R2 162 kΩ, Chip resistor, 1/16 W, 1%, size 0603; open for TPS62086, TPS62087 Std
R3 1 MΩ, Chip resistor, 1/16 W, 1%, size 0603 Std
10.2.2 Detailed Design Procedure
10.2.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TPS62085 device with the WEBENCH® Power Designer.
Click here to create a custom design using the TPS62086 device with the WEBENCH® Power Designer.
Click here to create a custom design using the TPS62087 device with the WEBENCH® Power Designer.
SW
IN
OUT
OUTL
L
MAX,OUTMAX,L
fL
V
V
1
VI
2
I
II
´
-
´=D
D
+=
OUT FB
R1 R1
V V 1 0.8 V 1
R2 R2
æ ö æ ö
= ´ + = ´ +
ç ÷ ç ÷
è ø è ø
10
TPS62085
,
TPS62086
,
TPS62087
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
www.ti.com
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
• Export customized schematic and layout into popular CAD formats
• Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
10.2.2.2 Setting The Output Voltage
The output voltage is set by an external resistor divider according to Equation 3:
(3)
R2 must not be higher than 180 kΩto achieve high efficiency at light load while providing acceptable noise
sensitivity. Lowest operating quiescent current and best output voltage accuracy are achieved with the fixed
output voltage versions. For the fixed output voltage versions, the FB pin must be connected to the output.
10.2.2.3 Output Filter Design
The inductor and the output capacitor together provide a low-pass filter. To simplify the selection process,
Table 4 outlines possible inductor and capacitor value combinations for most applications.
(1) Inductor tolerance and current derating is anticipated. The effective inductance can vary by 20% and
–30%.
(2) Capacitance tolerance and bias voltage derating is anticipated. The effective capacitance can vary by
20% and –50%.
(3) Typical application configuration. Other '+' mark indicates recommended filter combinations.
Table 4. Matrix of Output Capacitor and Inductor Combinations
NOMINAL L [µH](1) NOMINAL COUT [µF](2)
10 22 47 100 150
0.47 +(3) +++
1+++++
2.2
10.2.2.4 Inductor Selection
The main parameter for the inductor selection is the inductor value and then the saturation current of the
inductor. To calculate the maximum inductor current under static load conditions, Equation 4 is given.
where
• IOUT,MAX = Maximum output current
•ΔIL= Inductor current ripple
• fSW = Switching frequency
• L = Inductor value (4)
11
TPS62085
,
TPS62086
,
TPS62087
www.ti.com
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation FeedbackCopyright © 2013–2018, Texas Instruments Incorporated
TI recommends choosing the saturation current for the inductor 20% to 30% higher than the IL,MAX, out of
Equation 4. A higher inductor value is also useful to lower ripple current but increases the transient response
time as well. The following inductors are recommended to be used in designs.
Table 5. List of Recommended Inductors
INDUCTANCE
[µH] CURRENT RATING
[A] DIMENSIONS
L × W × H [mm3]DC RESISTANCE
[mΩtypical] PART NUMBER
0.47 6.6 4 × 4 × 1.5 7.6 Coilcraft XFL4015-471
0.47 6.7 3.2 × 2.5 × 1.2 23 Murata DFE322512F-R47N
1 5.1 4 × 4 × 2 10.8 Coilcraft XFL4020-102
10.2.2.5 Capacitor Selection
The input capacitor is the low-impedance energy source for the converters which helps to provide stable
operation. A low ESR multilayer ceramic capacitor is recommended for best filtering and must be placed between
VIN and GND as close as possible to those pins. For most applications, 10 μF is sufficient, though a larger value
reduces input current ripple.
The architecture of the TPS62085, TPS62086, and TPS62087 allows the use of tiny ceramic output capacitors
with low equivalent series resistance (ESR). These capacitors provide low output voltage ripple and are
recommended. To keep its low resistance up to high frequencies and to get narrow capacitance variation with
temperature, TI recommends using X7R or X5R dielectrics. The recommended typical output capacitor value is
22 μF; this capacitance can vary over a wide range as outline in the output filter selection table. Output
capacitors above 150 µF may be used with a reduced load current during startup to avoid triggering the short
circuit protection.
A feed-forward capacitor is not required for device proper operation.
10.2.3 Application Curves
VIN = 3.6 V, VOUT = 1.2 V, TA= 25 ºC, unless otherwise noted
Table 6. Table of Graphs
FIGURE
Efficiency
TPS62085, VOUT = 0.95 V Figure 4
TPS62085, VOUT = 1.2 V Figure 5
TPS62086, VOUT = 3.3 V Figure 6
TPS62087, VOUT = 1.8 V Figure 7
Line Regulation TPS62085 Figure 8
Load Regulation TPS62085 Figure 9
Switching Frequency TPS62085 Figure 1
Waveforms
TPS62085, PWM Operation (Load = 3 A) Figure 10
TPS62085, PSM Operation (Load = 100 mA) Figure 11
TPS62085, Load Sweep (Load = Open to 3 A) Figure 12
TPS62085, Start-Up (Load = 0.47 Ω)Figure 13
TPS62085, Start-Up (Load = Open) Figure 14
TPS62085, Shutdown (Load = 0.47 Ω)Figure 15
TPS62085, Shutdown (Load = Open) Figure 16
TPS62085, Load Transient (Load = 0.5 A to 3 A) Figure 17
TPS62085, Load Transient (Load = 50 mA to 3 A) Figure 18
TPS62085, Output Short-Circuit Protection (Load = 0.47 Ω, Entry) Figure 19
TPS62085, Output Short-Circuit Protection (Load = 0.47 Ω, Recovery) Figure 20
TPS62085, Output Short-Circuit Protection (Load = 0.47 Ω, HICCUP Zoom In) Figure 21
1.188
1.194
1.200
1.206
1.212
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Vout (V)
Vin (V)
TA = -40 °C
TA = 25 °C
TA = 85 °C
C005
Vout = 1.2 V, Iout = 1 A
1.188
1.194
1.200
1.206
1.212
0.001 0.010 0.100 1.000
Vout (V)
Iout (A)
TA = -40 °C
TA = 25 °C
TA = 85 °C
C006
Vout = 1.2 V, Vin = 3.6 V
50
60
70
80
90
100
0.001 0.010 0.100 1.000
Efficiency (%)
Iout (A)
Vin = 3.6 V
Vin = 4.2 V
Vin = 5.0 V
C003
Vout = 3.3 V
50
60
70
80
90
100
0.001 0.010 0.100 1.000
Efficiency (%)
Iout (A)
Vin = 2.5V
Vin = 3.3V
Vin = 4.2V
Vin = 5.0V
C004
Vout = 1.8 V
50
60
70
80
90
100
0.001 0.010 0.100 1.000
Efficiency (%)
Iout (A)
Vin = 2.5 V
Vin = 3.3 V
Vin = 4.2 V
Vin = 5.0 V
C001
Vout = 0.95 V
50
60
70
80
90
100
0.001 0.010 0.100 1.000
Efficiency (%)
Iout (A)
Vin = 2.5 V
Vin = 3.3 V
Vin = 4.2 V
Vin = 5.0 V
C002
Vout = 1.2 V
12
TPS62085
,
TPS62086
,
TPS62087
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
www.ti.com
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated
Figure 4. Efficiency Figure 5. Efficiency
Figure 6. Efficiency Figure 7. Efficiency
Figure 8. Line Regulation Figure 9. Load Regulation
EN (DC, 5V/div)
Vout (DC, 0.5V/div)
Icoil (DC, 0.5A/div)
t -- 200 s/divμ
PG (DC, 5V/div)
EN (DC, 5V/div)
Vout (DC, 0.5V/div)
Icoil (DC, 2A/div)
t -- 5 s/divμ
PG (DC, 5V/div)
Load (DC, 2A/div)
Vout (AC, 50mV/div)
Icoil (DC, 2A/div)
t -- 200 s/divμ
EN (DC, 5V/div)
Vout (DC, 0.5V/div)
Icoil (DC, 2A/div)
t -- 200 s/divμ
PG (DC, 5V/div)
Vout (AC, 20mV/div)
Icoil (DC, 1A/div)
SW (DC, 5V/div)
t -- 300ns/div
Vout (AC, 20mV/div)
Icoil (DC, 1A/div)
SW (DC, 5V/div)
t -- 500ns/div
13
TPS62085
,
TPS62086
,
TPS62087
www.ti.com
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation FeedbackCopyright © 2013–2018, Texas Instruments Incorporated
Figure 10. PWM Operation, Load = 3 A Figure 11. PSM Operation, Load = 100 mA
Figure 12. Load Sweep, Load = Open to 3 A Figure 13. Start-Up, Load = 0.47 Ω
Figure 14. Start-Up, Load = Open Figure 15. Shutdown, Load = 0.47 Ω
Vout (DC, 0.5V/div)
Icoil (DC, 2A/div)
t -- 200 s/divμ
PG (DC, 5V/div)
Vout (DC, 0.5V/div)
Icoil (DC, 2A/div)
t -- 5 s/divμ
PG (DC, 5V/div)
Load (DC, 2A/div)
Vout (DC, 0.1V/div)
Icoil (DC, 2A/div)
t -- 3 s/divμ
PG (DC, 5V/div)
Vout (DC, 0.5V/div)
Icoil (DC, 2A/div)
t -- 200 s/divμ
PG (DC, 5V/div)
EN (DC, 5V/div)
Vout (DC, 0.5V/div)
Icoil (DC, 0.5A/div)
t -- 5ms/div
PG (DC, 5V/div)
Load (DC, 2A/div)
Vout (DC, 0.1V/div)
Icoil (DC, 2A/div)
t -- 2 s/divμ
PG (DC, 5V/div)
14
TPS62085
,
TPS62086
,
TPS62087
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
www.ti.com
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated
Figure 16. Shutdown, Load = Open Figure 17. Load Transient, Load = 0.5 A to 3 A
Figure 18. Load Transient, Load = 50 mA to 3 A Figure 19. Output Short-Circuit Protection, Load = 0.47 Ω,
Entry
Figure 20. Output Short-Circuit Protection, Load = 0.47 Ω,
Recovery Figure 21. Output Short-Circuit Protection, Load = 0.47 Ω,
HICCUP Zoom In
L1
C1 C2
R1
R2
VIN
GND
VOUT
Solution Size
62 mm2
VIN
SW
GND
EN
PG
FB
VOS
15
TPS62085
,
TPS62086
,
TPS62087
www.ti.com
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation FeedbackCopyright © 2013–2018, Texas Instruments Incorporated
11 Power Supply Recommendations
The device is designed to operate from an input voltage supply range from 2.5 V to 6 V. Ensure that the input
power supply has a sufficient current rating for the application.
12 Layout
12.1 Layout Guidelines
The printed-circuit-board (PCB) layout is an important step to maintain the high performance of the TPS62085,
TPS62086, and TPS62087 devices.
The input and output capacitors and the inductor must be placed as close as possible to the IC. This keeps the
traces short. Routing these traces direct and wide results in low trace resistance and low parasitic inductance.
The low side of the input and output capacitors must be connected directly to the GND pin to avoid a ground
potential shift. The sense traces connected to FB and VOS pins are signal traces. Special care must be taken to
avoid noise being induced. By a direct routing, parasitic inductance can be kept small. GND layers might be used
for shielding. Keep these traces away from SW nodes. See Figure 22 for the recommended PCB layout.
12.2 Layout Example
Figure 22. PCB Layout Recommendation
12.3 Thermal Considerations
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the power
dissipation limits of a given component.
Two basic approaches for enhancing thermal performance are:
• Improving the power dissipation capability of the PCB design
• Introducing airflow in the system
The Thermal Data section in the TPS62085EVM-169 Evaluation Module User's Guide (SLVU809) provides the
thermal metric of the device on the EVM after considering the PCB design of real applications. The big copper
planes connecting to the pads of the IC on the PCB improve the thermal performance of the device. For more
details on how to use the thermal parameters, see the Thermal Characteristics Application Notes,SZZA017 and
SPRA953.
16
TPS62085
,
TPS62086
,
TPS62087
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
www.ti.com
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation Feedback Copyright © 2013–2018, Texas Instruments Incorporated
13 Device and Documentation Support
13.1 Device Support
13.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
13.1.2 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TPS62085 device with the WEBENCH® Power Designer.
Click here to create a custom design using the TPS62086 device with the WEBENCH® Power Designer.
Click here to create a custom design using the TPS62087 device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
• Export customized schematic and layout into popular CAD formats
• Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
13.2 Documentation Support
13.2.1 Related Documentation
For related documentation, see the following:
•TPS62085EVM-169 Evaluation Module User's Guide,SLVU809
•Thermal Characteristics Application Note,SZZA017
•Thermal Characteristics Application Note,SPRA953
13.3 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 7. Related Links
PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL
DOCUMENTS TOOLS &
SOFTWARE SUPPORT &
COMMUNITY
TPS62085 Click here Click here Click here Click here Click here
TPS62086 Click here Click here Click here Click here Click here
TPS62087 Click here Click here Click here Click here Click here
13.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
17
TPS62085
,
TPS62086
,
TPS62087
www.ti.com
SLVSB70B –OCTOBER 2013–REVISED JULY 2018
Product Folder Links: TPS62085 TPS62086 TPS62087
Submit Documentation FeedbackCopyright © 2013–2018, Texas Instruments Incorporated
Community Resources (continued)
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.5 Trademarks
DCS-Control, E2E are trademarks of Texas Instruments.
WEBENCH is a registered trademark of Texas Instruments.
13.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.7 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Jul-2018
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS62085RLTR ACTIVE VSON-HR RLT 7 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PD5Q
TPS62085RLTT ACTIVE VSON-HR RLT 7 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PD5Q
TPS62086RLTR ACTIVE VSON-HR RLT 7 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PD4Q
TPS62086RLTT ACTIVE VSON-HR RLT 7 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PD4Q
TPS62087RLTR ACTIVE VSON-HR RLT 7 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PD3Q
TPS62087RLTT ACTIVE VSON-HR RLT 7 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PD3Q
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Jul-2018
Addendum-Page 2
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS62085RLTR VSON-
HR RLT 7 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS62085RLTT VSON-
HR RLT 7 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS62086RLTR VSON-
HR RLT 7 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS62086RLTT VSON-
HR RLT 7 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS62086RLTT VSON-
HR RLT 7 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS62087RLTR VSON-
HR RLT 7 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS62087RLTT VSON-
HR RLT 7 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 18-Jul-2018
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS62085RLTR VSON-HR RLT 7 3000 210.0 185.0 35.0
TPS62085RLTT VSON-HR RLT 7 250 210.0 185.0 35.0
TPS62086RLTR VSON-HR RLT 7 3000 210.0 185.0 35.0
TPS62086RLTT VSON-HR RLT 7 250 210.0 185.0 35.0
TPS62086RLTT VSON-HR RLT 7 250 203.0 203.0 35.0
TPS62087RLTR VSON-HR RLT 7 3000 210.0 185.0 35.0
TPS62087RLTT VSON-HR RLT 7 250 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 18-Jul-2018
Pack Materials-Page 2
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
PACKAGE OUTLINE
www.ti.com
4220429/A 09/2014
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
RLT0007A
2.1
1.9
2.1
1.9
(0.2) TYP
BA
SEATING PLANE
C
1 MAX
0.05
0.00
0.08
PIN 1
INDEX AREA
2X 0.6
3X 0.35
0.25
0.1 C A B
0.05 C
3X 1.4
1.2
1.5
PIN 1 ID
1
4
7
5
3X 0.5
0.3
1.2
4X 0.3
0.2
0.1 C A B
0.05 C
3X 0.5
1
0.5
0.3
(0.2) TYP
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
4. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
5. Vias should not be placed on soldering pads unless they are plugged or plated shut.
EXAMPLE BOARD LAYOUT
4220429/A 09/2014
www.ti.com
VSON - 1 mm max height
RLT0007A
PLASTIC SMALL OUTLINE - NO LEAD
PKG
℄
PKG
℄
3X (0.6)
3X (0.25)
(0.6)
(0.25)
3X (1.5)
3X (0.3)
2X (0.6)
3X (0.5)
(0.45)(0.9)
1
45
7
NON SOLDER MASK
DEFINED
PADS 1 - 4
SOLDER MASK
DEFINED
PADS 5 - 7
SOLDER MASK DETAILS
0.07 MAX
ALL AROUND 0.07 MIN
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
LAND PATTERN EXAMPLE
SCALE: 30X
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
EXAMPLE STENCIL DESIGN
4220429/A 09/2014
www.ti.com
VSON - 1 mm max height
RLT0007A
PLASTIC SMALL OUTLINE - NO LEAD
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
FOR ALL EXPOSED PADS
85% PRINTED SOLDER COVERAGE BY AREA
SCALE: 40X
PKG
℄
PKG
℄
3X (0.6)
3X (0.21)
(0.6)
(0.21) 6X (0.65)
6X (0.3)
2X (0.6)
3X (0.5)
3X (0.025)
(0.9)
1
45
7
3X
EXPOSED METAL
METAL UNDER
SOLDER MASK
TYP
(0.875)
EXPOSED METAL
TYP
SOLDER MASK EDGE
TYP
IMPORTANT NOTICE
Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its
semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers
should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated
circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and
services.
Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced
documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements
different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the
associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers
remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have
full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products
used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with
respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous
consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and
take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will
thoroughly test such applications and the functionality of such TI products as used in such applications.
TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information,
including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to
assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any
way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource
solely for this purpose and subject to the terms of this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically
described in the published documentation for a particular TI Resource.
Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that
include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE
TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM,
INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF
PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL,
DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN
CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949
and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.
Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such
products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards
and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must
ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in
life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.
Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all
medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).
Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-
compliance with the terms and provisions of this Notice.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2018, Texas Instruments Incorporated
