ASDL-3023-008 - Lite-On Electronics, Inc.

ASDL-3023

IrDA Data Compliant Low Power 4Mbit/s

with Remote Control Infrared Transceiver

Data Sheet

Features

General Features

• Operating temperature from -25° C ~ 85°C

- Critical parameters are guaranteed over

temperature and supply voltage

• Vcc Supply 2.4 to 3.6 V

• Interface to Various Super I/O and Controller Devices

- Input/Output Interface Voltage of 1.5 V

• Miniature Package Miniature Package (shielded)

Height : 1.75 mm Height : 1.95 mm

Width : 7.5 mm Width : 8.0 mm

Depth : 2.75 mm Depth : 3.00 mm

• Moisture Level 3

• Power Saving using 3 ILED range (SIR, MIR/FIR, RC

mode)

• LED stuck high protection

• High EMI Performance

• High ESD Performance

• Designed to Accommodate Light Loss with Cosmetic

Windows

• IEC 825-Class 1 Eye Safe

IrDA Features

• Fully Compliant to IrDA 1.4 Physical Layer Low Power

Specications from 9.6 kbit/s to 4.0 Mb/s

- Link distance up to 30cm (minimum)

• Complete shutdown

• Low Power Consumption

- Low shutdown current

- Low idle current

Remote Control Features

• Wide angle and high radiant intensity

• Spectrally suited to remote control transmission

function

• Minimum peak wavelength of 880nm

• 2 RC Transmission Mode

- Single TXD (Programmable Mode)

- Dual TXD (Direct)

Description

The ASDL-3023 is a new generation low prole high

speed enhanced infrared (IR) transceiver module that

provides the capability of (1) interface between logic

and IR signals for through-air, serial, half-duplex IR data

link, and (2) IR remote control transmission for universal

remote control applications. The ASDL-3023 can be used

for IrDA as well as remote control application without the

need of any additional external components for multi-

plexing.

The ASDL-3023 is fully compliant to IrDA Physical Layer

specication version 1.4 low power from 9.6 kbit/s to 4.0

Mbit/s (FIR) and IEC825 Class 1 eye safety standards.

The ASDL-3023 can be shutdown completely to achieve

very low power consumption. In the shutdown mode, the

PIN diode will be inactive and thus producing very little

photocurrent even under very bright ambient light. It is

also designed to interface to input/output logic circuits as

low as 1.5V. These features are ideal for battery operated

mobile devices such as PDAs and mobile phones that

require low power consumption.

Applications

Mobile data communication and universal remote control

• Mobile Phones

• PDAs

• Digital Still Camera

• Printer

• Handy Terminal

• Industrial and Medical Instrument

Application Support Information

The Application Engineering Group is available to assist

you with the application design associated with ASDL-

3023 infrared transceiver module. You can contact them

through your local sales representatives for additional

details.

Figure 1a. Functional Block Diagram of ASDL-3023

ASDL-3023 TRANSCEIVER

MODULE

TRANSCEIVER

LEDA (1)

Vdd

(7)

RXD(3)

Output�

Buffer

RC_Buffer

Eye

Safety-IR

GND

RECEIVER

Photodetector

Amplifier

Low Pass

Filter

Regulated

Voltage &

Current

Source

TRANSMIT

TER

TRANSMITTER

GND (8)

CX1

CX2

Vdd

TXD_IR

Input

Eye

Safety-RC

TXD_RC

Input

IR_Buffer

Switched

Current

Source

IOVCC(5)

SD(4)

LED

TxD_IR(2)

AGC & Signal

Reference

Processor

TxD_RC(6)

VLED

CX5

CX4CX3

Figure 1b. Functional Block Diagram of ASDL-3023-S21

ASDL-3023 TRANSCEIVER

MODULE

TRANSCEIVER

LEDA (1)

Vdd

(7)

RXD(3)

Output

Buffer

RC_Buffer

Eye

Safety-IR

GND

RECEIVER

Photodetector

Amplifier

Low Pass

Filter

Regulated

Voltage &

Current

Source

TRANSMIT

TER

TRANSMITTER

GND (8)

CX1

CX2

Vdd

TXD_IR

Input

Eye

Safety-RC

TXD_RC

Input

IR_Buffer

Switched

Current

Source

IOVCC(5)

SD(4)

LED

TxD_IR(2)

AGC & Signal

Reference

Processor

TxD_RC(6)

VLED

CX5

CX4CX3

SHIELD

Notes:

1. Tied through external resistor, R2, to Vled. Refer to the table below for recommended series resistor value.

2. This pin is used to transmit serial data when SD pin is low. If held high for longer than 50 ms, the LED is turned o. Do NOT oat this pin.

3. This pin is capable of driving a standard CMOS or TTL load. No external pull-up or pull-down resistor is required. The pin is in tri-state when the

transceiver is in shutdown mode

4. Complete shutdown of IC and PIN diode. The pin is used for setting IR receiver bandwidth, range of IR LED current and RC drive programming

mode. Refer to section on “Bandwidth Selection Timing” and “Remote Control Drive Modes” for more information. Do NOT oat this pin. ***

5. Connect to ASIC logic controller supply voltage or Vcc. The voltage at this pin should be equal to or less than Vcc.

6. Logic high turns on the RC LED. If held high longer than 50 ms, the RC LED is turned o. Do NOT oat the pin.

7. (i) Regulated, 2.4V to 3.6V

(ii) This pin recommended to turn on before other pin.

8. Connect to system ground.

Marking Information

The unit is marked with ‘XYWLL’ on the shield

Y = year

W = work week

LL = lot number

Order Information

Part Number Packaging Type Package Quantity

ASDL-3023-021 Tape and Reel Front Option 2500

ASDL-3023-008 Tape and Reel Top Option 2500

ASDL-3023–S21 (Shielded) Tape and Reel Front Option 2500

I/O Pins Conguration Table

Pin Symbol Description I/O Type Notes

1 LEDA LED Anode Note 1

2 TxD_IR IrDA transmitter data input. Input.

Active High

Note 2

3 RxD IrDA receive data Output.

Active Low

Note 3

4 SD Shutdown Input.

Active High

Note 4

5 IOVCC Input/Output ASIC voltage Note 5

6 TxD_RC RC transmitter data input. Input.

Active High

Note 6

7 VCC Supply Voltage Note 7

8 GND Ground Note 8

ASDL-3023-021, ASDL-3023-008 and ASDL-3023-S21

Pinout, Rear View

Figure 2a. Pin out for ASDL-3023-021 and ASDL-3023-008,

Figure 2b. Pin out for ASDL-3023-S21

8 6 47 5 23 1

Rear View

8 6 47 5 23 1

Rear View

(Shielded)

Recommended Application Circuit Components

Component Recommended Value Note

R1 4.7W,±5%, 0.25 watt for Vcc ≤ 3.0V

R2 2.7W, for 2.4 ≤ VLED ≤ 2.7V;

3.3W, for 2.7 <VLED ≤ 3.0V

3.9W, for 3.0 <VLED ≤ 3.3V

4.7W, for 3.3 <VLED ≤ 3.6V

5.6W, for 3.6 <VLED ≤ 4.2V

10W, for 4.2 <VLED ≤ 5V

CX1, CX3, CX5 100 nF, ± 20%, X7R Ceramic 1

CX2, CX4 4.7mF, ± 20%, Tantalum 1

Notes: CX1, CX2, CX3 & CX4 must be placed within 0.7cm of ASDL-3023

to obtain optimum noise immunity

Absolute Maximum Ratings

For implementations where case to ambient thermal resistance is ± 50°C/W.

Parameter Symbol Min. Max. Units Conditions Ref

Storage Temperature TS-40 +100 °C

Operating Temperature TA-25 +85 °C

LED Anode Voltage VLEDA -0.3 6.5 V

Supply Voltage VCC -0.3 6 V

Input Voltage : TXD, SD/Mode VI-0.3 5.5 V

Output Voltage : RXD VO-0.3 5.5 V

Peak IR LED Current IIRLED (PK) 200 mA ≤ 25% duty cycle, ≤ 90 ms pulse width Fig 3

Peak RC LED Current IRCLED(PK) 300 mA ≤ 10% duty cycle, ≤ 90 ms pulse width Fig 4

CAUTION: The CMOS INhereNT TO The deSIgN Of ThIS COMpONeNT INCreASeS The COMpONeNT’S SUSCepTIbIlITy TO

dAMAge frOM eleCTrOSTATIC dISChArge (eSd). IT IS AdvISed ThAT NOrMAl STATIC preCAUTIONS be TAkeN IN hANdlINg

ANd ASSeMbly Of ThIS COMpONeNT TO preveNT dAMAge ANd/Or degrAdATION whICh MAy be INdUCed by eSd

Recommended Operating Conditions

Parameter Symbol Min. Typ. Max. Units Conditions

Operating Temperature TA-25 +85 °C

Supply Voltage VCC 2.4 3.6 V

Input/Output Voltage IOVCC 1.5 3.6 V

Logic Input Voltage for TXD,

SD/Mode

Logic High VIH IOVcc-0.5 IOVcc V

Logic Low VIL 0 0.4 V

Receiver Input Irradiance Logic High EIH0.0090

0.0225

500

mW/cm2For in-band signals ≤

115.2kbit/s [3]

0.576 Mbit/s ≤ in-band

signals ≤ 4.0 Mbit/s [3]

Logic Low EIL0.3 mW/cm2For in-band signals [3]

IR LED (Logic High) Current

Pulse Amplitude – SIR Mode

ILEDA 65 mA

IR LED (Logic High) Current

Pulse Amplitude – MIR/FIR

Mode

ILEDA

150

RC LED (Logic High) Current

Pulse Amplitude

ILEDA 250 mA

Receiver Data Rate 0.0096 4.0 Mbit/s

Ambient Light See IrDA Serial Infrared

Physical Layer Link

Specication, Appendix A

for ambient levels

Note :

3. An in-band optical signal is a pulse/sequence where the peak wavelength, lp, is dened as 850 ≤ lp ≤ 900 nm, and the pulse characteristics are

compliant with the IrDA Serial Infrared Physical Layer Link Specication v1.4.

Electrical and Optical Specications

Specications (Min. & Max. values) hold over the recommended operating conditions unless otherwise noted. Unspeci-

ed test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25°C, Vcc set to 3.0V and

IOVcc set to 1.5V unless otherwise noted.

Receiver

Parameter Symbol Min. Typ. Max. Units Conditions

Viewing Angle 2q1/2 30 °

Peak Sensitivity Wavelength lP875 nm

RxD_IrDA Output Voltage Logic High VOH IOVcc

– 0.5

IOVCC V IOH = -200 mA, EI ≤ 0.3 mW/cm2

Logic Low VOL 0 0.4 V

RxD_IrDA Pulse Width (SIR)

[4, 5]

tRPW(SIR) 1 4 msq1/2 ≤ 15°, CL=9pF

RxD_IrDA Pulse Width (MIR)

[4, 6]

tRPW(MIR) 100 500 ns q1/2 ≤ 15°, CL=9pF

RxD_IrDA Pulse Width (Single) (FIR) [4, 7] tRPW(FIR) 80 175 ns q1/2 ≤ 15°, CL=9pF

RxD_IrDA Pulse Width (Double) (FIR) [4, 7] tRPW(FIR) 200 290 ns q1/2 ≤ 15°, CL=9pF

RxD_IrDA Rise & Fall Times tr, tf60 ns CL=9pF

Receiver Latency Time [8] tL100 ms EI = 9.0 mW/cm2

Receiver Wake Up Time [9] tRW 200 ms EI = 10 mW/cm2

Infrared (IR) Transmitter

Parameter Symbol Min. Typ. Max. Units Conditions

IR Radiant Intensity

(SIR Mode)

IEH 4 20 mW/sr IR_ILEDA = 65mA,

q1/2 ≤ 15°, TxD_IR ≥ VIH, TA = 25°C

IR Radiant Intensity (MIR/FIR

Mode)

IEH 10 50 mW/sr IR_ILEDA = 150mA,

q1/2 ≤ 15°, TxD_IR ≥ VIH, TA = 25°C

IR Viewing Angle 2q1/2 30 60 °

IR Peak Wavelength lP850 885 900 nm

TxD_IrDA Logic Levels High VIH IOVcc-0.5 IOVCC V

Low VIL 0 0.5 V

TxD_IrDA Input Current High IH0.02 mA VI ≥ VIH

Low IL-0.02 mA 0 ≤ VI ≤ VIL

Wake Up Time [10] tTW 180 ns

Maximum Optical Pulse

Width [11]

tPW(Max) 25 120 ms

TXD Pulse Width (SIR) tPW(SIR) 1.6 ms tPW(TXD_IR)=1.6ms at 115.2

kbit/s

TXD Pulse Width (MIR) tPW(MIR) 217 ns tPW(TXD_IR)=217ns at 1.152

Mbit/s

TXD Pulse Width (FIR) tPW(FIR) 125 ns tPW(TXD_IR)=125ns at 4.0 Mbit/s

TxD Rise & Fall Times (Optical) tr, tf600

tPW(TXD_IR)=1.6ms at 115.2

kbit/s

tPW(TXD_IR)=125ns at 4.0 Mbit/s

IR LED Anode On-State

Voltage

(SIR Mode)

VON

(IR_LEDA)

2.2 V IR_ILEDA=65mA,

IR VLED = 3.6V,

R = 4.7W, VI(TxD) ≥ VIH

IR LED Anode On-State

Voltage (MIR/FIR Mode)

VON

(IR_LEDA)

2.1 V IR_ILEDA=150mA,

IR VLED = 3.6V,

R = 4.7W,

VI(TxD_IR) ≥ VIH

Remote Control (RC) Transmitter

Parameter Symbol Min. Typ. Max. Units Conditions

RC Radiant Intensity IEH 80 mW/sr RC_ILEDA = 250mA,

q1/2 ≤ 15°, TxD_RC ≥ VIH, TA = 25 °C

RC Viewing Angle 2q1/2 30 60 °

RC Peak Wavelength lP880 885 900 nm

TxD_RC Logic Levels High VIH IOVcc-0.5 IOVCC V

Low VIL 0 0.5 V

TxD_RC Input Current High IH0.02 1 mA VI ≥ VIH

Low IL-0.02 1 mA 0 ≤ VI ≤ VIL

RC LED Anode On-State

Voltage

VON

(RC_LEDA)

2 V RC_ILEDA=250mA, RC VLED = 3.6V,

R = 4.7W, VI(TxD_RC) ≥ VIH

Transceiver

Parameters Symbol Min. Typ. Max. Units Conditions

Input Current High IH0.01 1 mA VI ≥ VIH

Low IL-1 -0.02 1 mA 0 ≤ VI ≤ VIL

Supply Current Shutdown ICC1 1 mA VSD ≥ IOVCC-0.5, TA=25°C

Idle

(Standby)

ICC2 2.0 2.9 mA VI(TxD) ≤ VIL, EI=0

Active ICC3 3.5 mA VI(TxD) ≥ VIL, EI=10mW/cm2

Note:

[4] An in-band optical signal is a pulse/sequence where the peak wavelength, lP

, is dened as 850 nm ≤ lP ≤ 900 nm, and the pulse characteristics

are compliant with the IrDA Serial Infrared Physical Layer Link Specication version 1.4.

[5] For in-band signals 115.2 kbit/s where 9 mW/cm2 ≤ EI ≤ 500 mW/cm2.

[6] For in-band signals 1.152 Mbit/s where 22 mW/cm2 ≤ EI ≤ 500 mW/cm2.

[7] For in-band signals 4 Mbit/s where 22 mW/cm2 ≤ EI ≤ 500 mW/cm2.

[8] Latency is dened as the time from the last TxD_IrDA light output pulse until the receiver has recovered full sensitivity.

[9] Receiver Wake Up Time is measured from Vcc power ON to valid RxD_IrDA output.

[10] Transmitter Wake Up Time is measured from Vcc power ON to valid light output in response to a TxD_IrDA pulse.

[11] The Max Optical PW is dened as the maximum time which the IR LED will turn on, this, is to prevent the long Turn On time for the IR LED.

Figure 3. Maximum Peak IR LED current vs. ambient temperature. Derated

based on TJMAX = 100°C.

Figure 4. Maximum Peak RC LED current vs. ambient temperature. Derated

based on TJMAX = 100°C.

Max. Permissible Peak LED Current

100

150

200

250

300

350

-40 -20 0 20 40 60 80 100

- Ambient Temperature - oC

ILED(PK) Maximum Peak LED Current - mA

Max. Permissible DC LED Current

-40 -20 0 20 40 60 80 100

TA- Ambient Temperature - oC

ILED(DC)

, Maximum DC LED Current - mA

Rθja = 400degC/W

Figure 5a. Timing Waveform - RXD Output Waveform Figure 5b. Timing Waveform - LED Optical Waveform

Figure 5c. Timing Waveform – TXD “Stuck-on” Protection Waveform Figure 5d. Timing Waveform – Receiver Wakeup Time Waveform

Figure 5e. Timing Waveform – TXD Wakeup Time Waveform

Package Dimension: ASDL-3023-021 (Shieldless, Front) and ASDL-3023-008 (Shieldless, Top)

Package Dimension: ASDL-3023-S21 (Shielded, Front)

Tape & Reel Dimensions

ASDL-3023-021 (Shieldless, Front)

ASDL-3023-008 (Shieldless, Top)

ASDL-3023-S21 (Shielded, Front)

Unit: mm

LABEL

Detail A

Option # "B"

330 80

Quantity

2500021

"C"

∅ 13.0 ± 0.5

2.0 ± 0.5

21 ± 0.8

R1.0

Detail A

2.0 ± 0.5

16.4 +2

B C

Progressive Direction

Empty

(40mm min)

Parts Mounted Leader

(400mm min)

Empty

(40mm min)

S21

008

330

2500

ASDL-3023 Moisture Proof Packaging

All ASDL-3023 options are shipped in moisture proof package. Once opened, moisture absorption begins.

This part is compliant to JEDEC Level 3.

Figure 6. Baking Conditions Chart

Recommended Storage Conditions

Storage Temperature 10°C to 30°C

Relative Humidity below 60% RH

Time from unsealing to soldering

After removal from the bag, the parts should be soldered

within 7 days if stored at the recommended storage con-

ditions. When MBB (Moisture Barrier Bag) is opened and

the parts are exposed to the recommended storage con-

ditions more than 7 days but less than 15 days the parts

must be baked before reow to prevent damage to the

parts.

Note: To use the parts that exposed for more than 15 days is not

recommended.

Baking Conditions

Package Temp Time

In reels 60 °C ≥ 48hours

In bulk 100 °C ≥ 4hours

Baking should only be done once.

UNITS IN A SEALED

MOISTURE-PROOF

PACKAGE

ENVIRONMENT

LESS THAN 30 oC

AND LESS THAN

60% RH

PACKAGE IS OPENED

(UNSEALED)

PACKAGE IS

OPENED LESS

THAN 168

HOURS

NO BAKING IS

NECESSARY

YES

PARTS ARE NOT

RECOMMENDED TO

BE USED

RECOMMENDED

BAKING CONDITIONS

PACKAGE IS

OPENED LESS

THAN 15 DAYS

YES

PERFORM

Recommended Reow Prole

Process Zone Symbol DT

Maximum DT/Dtime

or Duration

Heat Up P1, R1 25°C to 150°C 3°C/s

Solder Paste Dry P2, R2 150°C to 200°C 100s to 180s

Solder Reow P3, R3

P3, R4

200°C to 260°C

260°C to 200°C

3°C/s

-6°C/s

Cool Down P4, R5 200°C to 25°C -6°C/s

Time maintained above liquidus point , 217°C > 217°C 60s to 90s

Peak Temperature 260°C -

Time within 5°C of actual Peak Temperature - 20s to 40s

Time 25°C to Peak Temperature 25°C to 260°C 8mins

The reow prole is a straight-line representation of

a nominal temperature prole for a convective reow

solder process. The temperature prole is divided into

four process zones, each with dierent DT/Dtime tem-

perature change rates or duration. The DT/Dtime rates or

duration are detailed in the above table. The tempera-

tures are measured at the component to printed circuit

board connections.

In process zone P1, the PC board and ASDL-3023 pins

are heated to a temperature of 150°C to activate the ux

in the solder paste. The temperature ramp up rate, R1,

is limited to 3°C per second to allow for even heating of

both the PC board and ASDL-3023 pins.

Process zone P2 should be of sucient time duration

(100 to 180 seconds) to dry the solder paste. The temper-

ature is raised to a level just below the liquidus point of

the solder.

50 100 150 200 250 300

t-TIME

(SECONDS)

120

150

180

200

230

255

T - TEMPERATURE (°C)

R3 R4

217

MAX 260°C

60 sec to 90 sec

Above 217°C

HEAT

SOLDER PASTE DRY

SOLDER

REFLOW

COOL DOWN

Process zone P3 is the solder reow zone. In zone P3,

the temperature is quickly raised above the liquidus

point of solder to 260°C (500°F) for optimum results. The

dwell time above the liquidus point of solder should be

between 60 and 90 seconds. This is to assure proper co-

alescing of the solder paste into liquid solder and the

formation of good solder connections. Beyond the rec-

ommended dwell time the intermetallic growth within

the solder connections becomes excessive, resulting in

the formation of weak and unreliable connections. The

temperature is then rapidly reduced to a point below

the solidus temperature of the solder to allow the solder

within the connections to freeze solid.

Process zone P4 is the cool down after solder freeze.

The cool down rate, R5, from the liquidus point of the

solder to 25°C (77°F) should not exceed 6°C per second

maximum. This limitation is necessary to allow the PC

board and ASDL-3023 pins to change dimensions evenly,

putting minimal stresses on the ASDL-3023.

It is recommended to perform reow soldering no more

than twice.

Appendix A: ASDL-3023 SMT Assembly Application Note

Solder Pad, Mask and Metal Stencil

Recommended land pattern for ASDL-3023- S21

UNIT: mm

Figure A2b. Recommended land pattern, ASDL-3023-S21

Recommended land pattern for ASDL-3023- 008

UNIT: mm

Figure A2c. Recommended land pattern, ASDL-3023-008

Figure A1. Stencil and PCBA

Recommended land pattern for ASDL-3023-021

UNIT: mm

Figure A2a. Recommended land pattern, ASDL-3023-021

0.55

1.05

3.75

1.75

1.35

1.55

7.5

0.775

Mounting

Centre

FIDUCIAL

0.1

0.55

1.05

3.75

1.75

1.35

1.55

7.5

0.775

1.3

0.3

0.1

Mounting

Centre

1.5

0.55

1.05

3.75

1.60

1.05

1.35

1.74

7.5

0.7

0.4

0.44

Mounting

Centre

0.17

Recommended Metal solder Stencil Aperture

It is recommended that only a 0.11 mm (0.004 inch) or

a 0.127 mm (0.005 inch) thick stencil be used for solder

paste printing. This is to ensure adequate printed solder

paste volume and no shorting. See the Table 1 below the

drawing for combinations of metal stencil aperture and

metal stencil thickness that should be used. Aperture

opening for shield pad is 2.6 mm x 1.5 mm(for ASDL-

3023-S1) as per land pattern. Compared to 0.127mm

stencil thickness 0.11mm stencil thickness has longer

length in land pattern. It is extended outwardly from

transceiver to capture more solder paste volume.

Figure A3. Solder stencil aperture

Table 1.

Stencil thickness,

t(mm)

Aperture size(mm)

Length,l Width,w

0.127mm 1.75+/-0.05 0.55+/-0.05

0.11mm 2.4+/-0.05 0.55+/-0.05

Solder Mask

Adjacent Land Keepout and Solder Mask Areas

Adjacent land keepout is the maximum space occupied

by the unit relative to the land pattern. There should be

no other SMD components within this area. The minimum

solder resist strip width required to avoid solder bridging

adjacent pads is 0.2mm.It is recommended that two du-

cially crosses be placed at mid length of the pads for unit

alignment.

Note: Wet/Liquid Photo-imaginable solder resist/mask is recommended

Dimension mm

h 0.2

l 3.0

k 3.85

j 10.1

Appendix B: PCB Layout Suggestion

The eects of EMI and power supply noise can potentially

reduce the sensitivity of the receiver, resulting in reduced

link distance. The PCB layout played an important role to

obtain a good PSRR and EM immunity resulting in good

electrical performance. Things to note:

1. The ground plane should be continuous under the

part, but should not extend under the shield trace.

2. The shield trace is a wide, low inductance trace back

to the system ground. CX1, CX2, CX3, CX4 and CX5 are

optional supply lter capacitors; they may be left out if

a clean power supply is used.

3. VLED can be connected to either unltered or

unregulated power supply. The bypass capacitors

should be connection before the current limiting

resistor R2 respectively. In a noisy environment,

including capacitor CX3and CX4 can enhance supply

rejection. CX3 that is generally a ceramic capacitor of

low inductance providing a wide frequency response

while CX4 is tantalum capacitor of big volume and fast

frequency response. The use of a tantalum capacitor

is more critical on the VLED line, which carries a high

current.

4. VCC pin can be connected to either unltered or

unregulated power supply. The Resistor, R1 together

with the capacitors, CX 1and CX2 acts as the low pass

lter.

5. IOVCC is connected to the ASIC voltage supply or

the VCC supply. The capacitor, CX5 acts as the bypass

capacitor.

6. Preferably a multi-layered board should be used

to provide sucient ground plane. Use the layer

underneath and near the transceiver module as Vcc,

and sandwich that layer between ground connected

board layers. The diagram below demonstrate an

example of a 4 layer board :

• Top Layer: Connect the metal shield and

module ground pin to bottom

ground layer;

Place the bypass capacitors within

0.5cm from the VCC and ground

pin of the module.

• Layer 2: Critical ground plane zone. 3

cm in all direction around the

module. Connect to a clean,

noiseless ground node (eg

bottom layer).

• Layer 3: Keep data bus away from critical

ground plane zone.

• Bottom layer: Ground layer. Ground noise <75

mVp-p. Should be separated from

ground used by noisy sources.

The area underneath the module at the second layer, and

3cm in all direction around the module is dened as the

critical ground plane zone. The ground plane should be

maximized in this zone. Refer to application note AN1114

or the Avago Technologies IrDA Data Link Design Guide

for details. The layout below is based on a 2-layer PCB.

Top Layer Bottom Layer

Layer 3

Top Layer

Layer 2

Bottom Layer (GND)

Noise sources to be placed as far away from the transceiver as possible

Legend: ground via

CX3

CX4

CX1

CX2

CX5

Appendix C: General Application Guide for the ASDL-3023 infrared IrDA Compliant 4 Mb/s Transceiver.

Description

The ASDL-3023, a wide-voltage operating range infrared

transceiver is a low-cost and small form factor device

that is designed to address the mobile computing

market such as PDAs, as well as small embedded mobile

products such as digital cameras and cellular phones. It is

spectrally suited to universal remote control transmission

function at 940 nm typically. It is fully compliant to IrDA

1.4 low power specication

up 4Mb/s and support most remote control codes The

design of ASDL-3023 also includes the following unique

features :

• Spectrally suited to universal remote control

transmission function at 940nm typically;

• Low passive component count;

• Shutdown mode for low power consumption

requirement;

• Direct interface with I/O logic circuit.

Selection of Resistor R2

Resistor R2 should be selected to provide the appropriate

peak pulse IR and RC LED current respectively at dierent

ranges of Vcc as shown on page 3 under “Recommended

Application circuit components”.

Interface to the Recommended I/O chip

The ASDL-3023’s TXD data input is buered to allow

for CMOS drive levels. No peaking circuit or capacitor is

required. Data rate from 9.6kb/s to 4Mb/s is available at

RXD pin. The TXD_RC, pin6 together with LEDA, pin1 is

used to selected the remote control transmit mode. Al-

ternatively, the TXD_IR, pin2 together with LEDA, pin1 is

used for infrared transmit selection.

Following shows the hardware reference design with

ASDL-3023

*Detail conguration of ASDL-3023 with the controller

chip is shown in Figure 3.

The use of the infrared techniques for data communica-

tion has increase rapidly lately and almost all mobile ap-

plication processors have built in the IR port. This does

away with the external Endec and simplies the interfac-

ing to a direct connection between the processor and the

transceiver. The next section discusses interfacing cong-

uration with a general processor.

Figure 2. Mobile Application Platform

STN/TFT LCD Panel

Logic Bus Driver

Memory Expansion

Power Management

Touch Panel

LCD Backlight Contrast

PCM Sound

Audio Input

Key Pad

Antenna

Mobile Application

chipset

*ASDL-3023

ROM

FLASH

SDRAM

LCD Control

A/D

Memory I/F

Baseband

controller

Peripherial

interface PWM

AC97

sound

I2S

IrDA

interface

General mobile application processor

The transceiver is directly interface with the micropro-

cessor provided its support infrared communication

commonly known as Infrared Communications Port

(ICP). The ICP supports both SIR data rates up to 115.2kps

and sometimes FIR data with data rates up to 4Mbps.

The remote control commands can be sent one of the

available General Purpose IO pins or the UART block

with IrDA functionality. It should be should be observed

that although both IrDA data transmission and Remote

control transmission is possible simultaneously by the

hardware, hence the software is required to resolve this

issue to prevent the mixing and corruption of data while

being transmitted over the free air. The above Figure 3

illustrates a reference interfacing to implement both IR

and RC functionality with ASDL-3023.

Remote Control Operation

The ASDL-3023 is spectrally suited to universal remote

control transmission function at 940nm typically. Remote

control applications are not governed by any standards,

owing to which there are numerous remote codes

in market. Each of those standards results in receiver

modules with dierent sensitivities, depending on the

carries frequencies and responsively to the incident light

wavelength. Remote control carrier frequencies are in

the range of 30KHz to 60KHz (for details of some the fre-

quently used carrier frequencies, please refer to AN1314).

Some common carrier frequencies and the correspond-

ing SA-1110 UART frequency and baud rate divisor are

shown in Table 3.

Table 3.

Remote Control Carrier

Frequency (KHz)

SA-1110 UART

Frequency (KHz)

Baud Rate

Divisor

30 28.8 8

32,33 32.9 7

36,36.7,38,39.2,40 38.4 6

56 57.6 4

Figure 3. ASDL-3023 conguration with general mobile architecture processor

GND GND

HSDL3021

GPIO TXD_RC

RXD

IR_RXD

GPIO

IOVCC

GND

IOVCC

IR_TXD

100Kohm

TXD_IR

VLED

CX4CX3

VLEDA

IOVCC

CX5

100Kohm

GND

CX1

CX2

VCC GND

VCC

Appendix E: Window Design for ASDL-3023

Optical Port Dimensions for ASDL-3023

To ensure IrDA compliance, some constraints on the height and width of the window exist. The minimum dimensions

ensure that the IrDA cone angles are met without vignetting. The maximum dimensions minimize the eects of stray

light. The minimum size corresponds to a cone angle of 30° and the maximum size corresponds to a cone angle of 60°.

OPAQUE MATERIAL

IR TRANSPARENT

WINDOW

IR TRANSPARENT

WINDOW

IR TRANSPARENT

WINDOW

Aperture Width (X) vs Module Depth (Z)

0.00

2.00

4.00

6.00

8.00

10.00

12.00

14.00

16.00

18.00

20.00

22.00

0 1 2 3 4 5 6 7 8 9

Module Depth (Z) mm

Aperture Width (X) mm

Xmin

Xmax

Aperture Height (Y) vs Module Depth (Z)

0.00

2.00

4.00

6.00

8.00

10.00

12.00

14.00

16.00

0123456789

Module Depth (Z) mm

Aperture Height (Y) mm

Ymin

Ymax

Module Depth

(Z) mm

Aperture Width (X, mm) Aperture height (Y, mm)

Min Max Min Max

0 7.20 + W1 9.16 + W2 1.70 + W1 3.66 + W2

1 7.73 + W1 10.32 + W2 2.23 + W1 4.82 + W2

2 8.27 + W1 11.47 + W2 2.77 + W1 5.97 + W2

3 8.81 + W1 12.62 + W2 3.31 + W1 7.12 + W2

4 9.34 + W1 13.78 + W2 3.84 + W1 8.28 + W2

5 9.88 + W1 14.93 + W2 4.38 + W1 9.43 + W2

6 10.41 + W1 16.09 + W2 4.91 + W1 10.59 + W2

7 10.95 + W1 17.24 + W2 5.45 + W1 11.74 + W2

8 11.49 + W1 18.40 + W2 5.99 + W1 12.90 + W2

9 12.02 + W1 19.55 + W2 6.52 + W1 14.05 + W2

It is recommended that the tolerance for assembly be considered as well. The recommended minimum window size

which will take into account of the assembly tolerance is dened as:

Xmin + assembly tolerance = Xmin + 2*(assembly tolerance) (Dimensions are in mm)

Ymin + assembly tolerance = Ymin + 2*(assembly tolerance) (Dimensions are in mm)

In the gure above, X is the width of the window, Y is the height of the window and Z is the distance from the ASDL-

3023 to the back of the window. The distance from the center of the LED lens to the center of the photodiode lens, K, is

5.5mm. The equations for computing the window dimensions are as follows:

X = K + 2*(Z+D)*tanA

Y = 2*(Z+D)*tanA

The above equations assume that the thickness of the window is negligible compared to the distance of the module

from the back of the window (Z). If they are comparable,

W1 = 0.33*T,

W2 = 0.66*T,

where T is the window thickness and the refractive index of the window material is 1.586.

The depth of the LED image inside the ASDL-3023, D, is 3.17mm. ‘A’ is the required half angle for viewing. For IrDA

compliance, the minimum is 15° and the maximum is 30°. The equations result in the following tables and graphs. The

graphs are plotted assuming that the thickness of the window is negligible.

Window Material

Almost any plastic material will work as a window

material. Polycarbonate is recommended. The surface

nish of the plastic should be smooth, without any

texture. An IR lter dye may be used in the window to

make it look black to the eye, but the total optical loss

of the window should be 10% or less for best optical

performance. Light loss should be measured at 875 nm.

The recommended plastic materials for use as a cosmetic

window are available from General Electric Plastics.

Recommended Plastic Materials:

Material # Light Transmission Haze Refractive Index

Lexan 141 88% 1% 1.586

Lexan 920A 85% 1% 1.586

Lexan 940A 85% 1% 1.586

Note: 920A and 940A are more ame retardant than 141.

Recommended Dye: Violet #21051

(IR transmissant above 625mm)

Shape of the Window

From an optics standpoint, the window should be at.

This ensures that the window will not alter either the

radiation pattern of the LED, or the receive pattern of the

photodiode. If the window must be curved for mechani-

cal or industrial design reasons, place the same curve on

the backside of the window that has an identical radius as

the front side. While this will not completely eliminate the

lens eect of the front curved surface, it will signicantly

reduce the eects. The amount of change in the radiation

pattern is dependent upon the material chosen for the

window, the radius of the front and back curves, and the

distance from the back surface to the transceiver. Once

these items are known, a lens design can be made which

will eliminate the eect of the front surface curve. The

following drawings show the eects of a curved window

on the radiation pattern. In all cases, the center thickness

of the window is 1.5 mm, the window is made of polycar-

bonate plastic, and the distance from the transceiver to

the back surface of the window is 3 mm.

Flat Window, (First Choice) Curved Front and Back, (Second Choice) Curved Front, Flat Back, (Do not use)

Appendix F: General Application Guide for the ASDL-3023

Remote Control Drive Modes

The ASDL-3023 can operate in the single-TxD program-

mable mode or the two-TxD direct transmission mode.

Single-TxD Programmable Mode

In the single-TxD programmable mode, only one input

pin (TxD_IR input pin) is used to drive the LED in both

IrDA mode as well as Remote Control mode of operation.

This mode can be used when the external controller uses

only one transmit pin for both IrDA as well RC mode of

operation.

transceiver is in default mode (IrDA-SIR) when powered

up. The user needs to apply the following programming

sequence to both the TxD_IR and SD inputs to enable the

transceiver to operate in either the IrDA or remote control

mode.

Mode Programming Timing Table

The following timings describe input constraints required using the active serial interface for mode programming with

pins SD, TxIR, and TxRC:

Parameter Symbol Min Typ Max Unit Notes

Shutdown input pulse width, at pin SD tSDPW 30 - ∞µs Will activate

complete shutdown

SD mode setup time tA200 - - Ns Setup for mode

programming

TxIR pulse width for RC mode tB200 - - Ns RC drive enabled

with pin TxIR

SD programming pulse width

Note: ( tA + tB ) < tC < tSDPW

tC- - 5.0 µs Pulse width mode

programming

TxIR setup time for

SIR or MIR/FIR mode

tS50 - - Ns Setup time for IrDA

bandwidth selection

TxIR or SD hold time to latch

SIR, MIR/FIR or RC mode

tH50 - - Ns Hold time for IrDA or RC

modes

Two-TxD Direct Transmission Mode

In the two-TxD direct transmission mode, the LED can

be driven separately for IrDA and RC mode of operation

through the TxD_IR and TxD_RC pins respectively. This

mode can be used when the external controller utilizes

separate transmit pins for IrDA and RC operation modes,

thereby eliminating the need for external multiplexing.

Please refer to the Transceiver I/O truth table for more

detail.

Transceiver Control I/O Truth Table for Two-TxD Direct

Transmission Mode

SD TxIR TxRC LED Remarks

0 0 0 OFF IR Rx enabled. Idle mode

0 0 1 ON Remote control operation

0 1 0 ON IrDA Tx operation

0 1 1 - Not recommended

(Both Transmitters o)

1 0 0 OFF Shutdown mode*

* The shutdown condition will set the transceiver to the default mode

(IrDA-SIR)

tTL tC

SHUTDOWN DRIVE

IrDA LED

DRIVE

RC LED

MODE RESET DRIVE

IrDA LED

SHUTDOWN

(ACTIVE HIGH)

TxIR

(ACTIVE HIGH)

TxRC

(GND)

tH tH

Bandwidth Selection Timing

The power on state should be the IrDA SIR mode.

The data transfer rate must be set by a programming

sequence using the TxD_IR and SD inputs as described

below.

Note: SD should not exceed the maximum, tC ≤ 5µs, to

prevent shutdown.

Setting to the High Bandwidth MIR/FIR Mode

(0.576Mbits/s to 4Mbits/s)

1. Set SD input to logic “HIGH”. Wait tA ≥ 200ns

2. Set TxD_IR input to logic “HIGH”. Wait tS ≥ 50ns.

3. Set SD to logic “LOW” (this negative edge latches state

of TxD_IR, which determines speed setting).

4. After waiting tH ≥ 50ns TxD_IR can be set to logic

“LOW”. TxD_IR is now re-enabled as normal IrDA

transmit input for the High Bandwidth MIR/FIR mode.

Setting to the LOW Bandwidth SIR Mode

(2.4kbits/s to 115.2kbits/s)

1. Set SD input to logic “HIGH”.

2. Set TxIR input to logic “LOW”. Wait tS ≥ 50ns.

3. Set SD to logic “LOW” (this negative edge latches state

of TxIR, which determines speed setting).

4. TxIR must be held for tS ≥ 50ns. TxIR is now re-enabled

as normal IrDA transmit input for the Low Bandwidth

SIR mode.

High: MIR/FIR

tStH

Low: SIR

TxI R

50% 50%

50%

Power-Up Sequencing

To have a proper operation for ASDL-3023, the following power-up sequencing must be followed.

(a) It’s strongly recommended that Vcc must come prior to IOVcc.

(b) It is not recommended to turn on IOVcc before Vcc while SD is low.

However, for application that IOVcc come prior to Vcc while SD is low, SD pin has to set high to assure proper function-

ality.

tIOVccDL 0us

VCC

IOV CC

tSDDL 30us

tSDPW 30us

−

IOV

SDDL

> 30us

SDPW

30us

−

VCC

IOVCC

Note:

tIOVccDL : IOVcc delay time

tSDDL : SD delay time

tSDPW : Shutdown Input Pulse Width

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AV02-0054EN - October 30, 2007