© Semiconductor Components Industries, LLC, 2012
November, 2012 − Rev. 1
1Publication Order Number:
NTNS3A91PZ/D
NTNS3A91PZ
Small Signal MOSFET
−20 V, −223 mA, Single P−Channel,
0.62 x 0.62 x 0.4 mm XLLGA3 Package
Features
•Single P−Channel MOSFET
•Ultra Small and Thin Package (0.62 x 0.62 x 0.4 mm)
•Low RDS(on) Solution in 0.62 x 0.62 mm Package
•1.5 V Gate Voltage Rating
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
•Small Signal Load Switch
•Analog Switch
•High Speed Interfacing
•Optimized for Power Management in Ultra Portable Products
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter Symbol Value Units
Drain-to-Source Voltage VDSS −20 V
Gate-to-Source Voltage VGS ±8.0 V
Continuous Drain
Current (Note 1)
Steady
State
TA = 25°CID−223 mA
TA = 85°C−161
t ≤ 5 s TA = 25°C−240
Power Dissipa-
tion (Note 1)
Steady
State
TA = 25°CPD121 mW
t ≤ 5 s TA = 25°C 140
Pulsed Drain Current tp = 10 msIDM −669 mA
Operating Junction and Storage
Temperature
TJ,
TSTG
-55 to
150
°C
Source Current (Body Diode) IS−121 mA
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE RATINGS
Parameter Symbol Max Units
Junction-to-Ambient – Steady State (Note 1) RθJA 1035 °C/W
Junction-to-Ambient – t ≤ 5 s (Note 1) RθJA 895
1. Surface Mounted on FR4 Board using the minimum recommended pad size,
(or 2 mm2), 1 oz Cu.
2. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
http://onsemi.com
G (1)
S (2)
P−Channel MOSFET
D (3)
−20 V 2.4 W @ −2.5 V
1.6 W @ −4.5 V
RDS(on) MAX ID MAXV(BR)DSS
MOSFET
XLLGA3
CASE 713AB
D = Specific Device Code
M = Date Code
D M
1
3.3 W @ −1.8 V
MARKING
DIAGRAM
4.5 W @ −1.5 V
−223 mA
Device Package Shipping†
ORDERING INFORMATION
NTNS3A91PZT5G XLLGA3
(Pb−Free)
8000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
1
2
3
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2
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter Symbol Test Condition Min Typ Max Units
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = −250 mA−20 V
Drain-to-Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJID = −250 mA, ref to 25°C11 mV/°C
Zero Gate Voltage Drain Current IDSS VGS = 0 V,
VDS = −20 V
TJ = 25°C−1.0 mA
Gate-to-Source Leakage Current IGSS VDS = 0 V, VGS = ±8.0 V ±2.0 mA
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = −250 mA−0.4 −1.0 V
Negative Threshold Temperature
Coefficient
VGS(TH)/TJ2.1 mV/°C
Drain-to-Source On Resistance RDS(on) VGS = −4.5 V, ID = −100 mA 1.1 1.6 W
VGS = −2.5 V, ID = −50 mA 1.5 2.4
VGS = −1.8 V, ID = −20 mA 2.0 3.3
VGS = −1.5 V, ID = −10 mA 2.5 4.5
Forward Transconductance gFS VDS = −5 V, ID = −100 mA 0.41 S
Source−Drain Diode Voltage VSD VGS = 0 V, IS = −10 mA −0.6 −1.0 V
CHARGES & CAPACITANCES
Input Capacitance CISS
VGS = 0 V, f = 10 kHz,
VDS = −15 V
41 pF
Output Capacitance COSS 4.6
Reverse Transfer Capacitance CRSS 4.1
Total Gate Charge QG(TOT)
VGS = −4.5 V, VDS = −15 V,
ID = −200 mA
1.1 nC
Threshold Gate Charge QG(TH) 0.1
Gate−to−Source Charge QGS 0.2
Gate−to−Drain Charge QGD 0.23
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 3)
Turn-On Delay Time td(ON)
VGS = −4.5 V, VDD = −15 V,
ID = −200 mA, RG = 2 W
41 ns
Rise Time tr97
Turn-Off Delay Time td(OFF) 571
Fall Time tf286
3. Switching characteristics are independent of operating junction temperatures.
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3
TYPICAL CHARACTERISTICS
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
−VDS, DRAIN−TO−SOURCE VOLTAGE (V) −VGS, GATE−TO−SOURCE VOLTAGE (V)
4.03.02.52.01.51.00.50
0
0.1
0.3
0.4
0.6
0.7
0.9
1.0
3.02.52.01.51.00.50
0
0.1
0.3
0.4
0.6
0.7
0.9
1.0
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
−VGS, GATE VOLTAGE (V) −ID, DRAIN CURRENT (A)
4.03.5 4.53.02.52.01.51.0
0.5
1.0
2.0
2.5
3.0
4.0
4.5
5.0
1.00.70.60.50.30.20.10
0
0.5
1.5
2.0
3.0
3.5
4.5
5.0
Figure 5. On Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1816141210642
1
10
100
1000
−ID, DRAIN CURRENT (A)
−ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−IDSS, LEAKAGE (nA)
RDS(on), NORMALIZED DRAIN−TO−SOURCE
RESISTANCE
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
−50 −25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
VGS = −4.5 V
ID = −100 mA
VGS = −1.8 V
ID = −20 mA
3.5
0.2
0.5
0.8
VGS = −4.5 V
−4.0 V
−3.5 V
−3.0 V
−2.5 V
−2.0 V
−1.5 V
−1.8 V
−1.2 V
0.2
0.5
0.8
VDS = −5 V
TJ = 25°C
TJ = 125°C
TJ = −55°C
1.5
3.5
TJ = 25°C
ID = −0.1 A
0.4 0.8 0.9
1.0
2.5
4.0
VGS = −4.5 V
TJ = 25°C
VGS = −2.5 V
VGS = −1.8 V
VGS =
−1.5 V
820
TJ = 85°C
TJ = 125°C
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4
TYPICAL CHARACTERISTICS
Figure 7. Capacitance Variation Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
−VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)
181612106420
0
10
20
40
50
60
70
80
1.00.90.70.60.30.20.10
0
1
2
3
4
5
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
RG, GATE RESISTANCE (W)−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
100101
10
100
1000
1.21.11.00.80.70.60.50.4
0.01
0.1
1
10
Figure 11. Threshold Voltage Figure 12. Maximum Rated Forward Biased
Safe Operating Area
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1001010.1
0.001
0.01
0.1
1
C, CAPACITANCE (pF)
−VGS, GATE−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
−IS, SOURCE CURRENT (A)−ID, DRAIN CURRENT (A)
TJ, TEMPERATURE JUNCTION (°C)
−VGS(th), GATE−TO−SOURCE THRESHOLD
VOLTAGE (V)
0.85
−50 −25 0 25 50 75 100 125 150
ID = −250 mA
0.75
0.65
0.55
0.45
0.35
81420
30
VGS = 0 V
TJ = 25°C
f = 10 kHz
Ciss
Coss
Crss
VGS = −4.5 V
VDD = −15 V
ID = −0.2 A
td(off)
td(on)
tr
tf
0
3
6
12
15
18
9
0.4 0.5 0.8 1.1 1.2
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VDS = −15 V
TJ = 25°C
ID = −0.2 A
0.9 1.3
TJ = 25°CTJ = 125°C
TJ = −55°C
VGS ≤ −8 V
Single Pulse
TC = 25°C
RDS(on) Limit
Thermal Limit
Package Limit
dc
10 ms
100 ms
1 ms
10 ms
QT
VDS VGS
QGS QGD
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TYPICAL CHARACTERISTICS
Figure 13. FET Thermal Response
t, TIME (s)
1E−02 1E−011E−06
0
200
400
600
800
900
1100
1200
R(t), EFFECTIVE TRANSIENT THERMAL RESPONSE
(°C/W)
1000
700
500
300
100
1E−05 1E−04 1E−03 1E+00 1E+01 1E+02 1E+03
RqJA Steady State = 1035°C/W
Duty Cycle = 0.5
Single Pulse
0.20
0.10
0.05 0.02 0.01
SOLDER FOOTPRINT*
DIMENSIONS: MILLIMETERS
0.62
0.35
0.20
*Dependent upon end user capabilities, this footprint could be used as a minimum.
0.20
MINIMUM RECOMMENDED
PITCH
2X
2X
0.28
0.60
1
2
3
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6
PACKAGE DIMENSIONS
ÉÉ
ÉÉ
XLLGA3, 0.62x0.62, 0.35P
CASE 713AB
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
AB
E
D
BOTTOM VIEW
b
TOP VIEW
0.10 C
A
A1
0.10 C
0.10 C
CSEATING
PLANE
SIDE VIEW
DIM MIN MAX
MILLIMETERS
A0.340 0.440
A1 0.000 0.030
b0.100 0.200
D0.620 BSC
E0.620 BSC
L0.090 0.210
SOLDER FOOTPRINT*
DIMENSIONS: MILLIMETERS
0.760
0.350
0.200
1
L2 0.110 0.310
L
L2
0.280
RECOMMENDED
PITCH
E2 0.400 0.600
D2 0.175 BSC
D3 0.205 BSC
e0.350 BSC
K0.200 REF
0.10 C
A
M
0.10 BC
M
0.05 C
2X
e
e/2 D3
E2
K
A
M
0.10 BC
M
0.05 C
2X
2X
2X
0.350
0.600
1
PIN ONE
REFERENCE
3X
D2
2
3
2
3
PACKAGE
OUTLINE
*Additional information concerning board mounting for this
package may be found in Document AND9099/D, “Board Level
Application Note for XLLGA 3-Lead 0.62x0.62 Package”.
For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
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