Am26LS32/Am26LS33 Quad Differential Line Receivers al Advanced Micro Devices DISTINCTIVE CHARACTERISTICS @ Input voltage range of 15 V (differential or common mode) on Am26LS33; 7 V (differential or common mode) on Am26LS32 200 mV sensitivity over the input voltage range on Am26LS32; 500 mV sensitivity on AM26LS33 @ 6k minimum input impedance with 30 mV input hysteresis @ The Am26LS32 meets all the requirements of RS-422 and RS-423 @ Operation from single +5 V supply @ Fail safe input-output relationship. Output always high when inputs are open Three-state drive, with choice of complementary output enables, for receiving directly onto a data bus GENERAL DESCRIPTION The Am26LS32 is a quad line receiver designed to meet the requirements of RS-422 and RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission. The Am26LS32 features an input sensitivity of 200 mV over the input voltage range of +7 V. The Am26LS$33 features an input sensitivity of 500 mV over the input voltage range of +15 V. The Am26LS32 and Am26LS33 provide an enable and disable function common to all four receivers. Both parts feature 3-state outputs with B mA sink capability and in- corporate a fail safe input-output relationship which keeps the outputs high when the inputs are open. The Am26LS32 and Am26LS33 are constructed using Advanced Low-Power Schottky processing. BLOCK DIAGRAM ENABLE ENABLE INDs IND- INcs INc- INB+ INB- INas INA- + 5 3 4 9 GND Vcc Output D Output C Output B Output A 05393-001B RELATED AMD PRODUCTS Part No. Description 26LS29 Quad Three-State Single Ended RS-423 Line Driver 26LS30 Dual Differential RS-422 Party Line/Quad Single Ended RS-423 Line Driver 26LS31 Quad High Speed Differential Line Driver Publication# 05393 Rev. B Amendment/0 4-39 issue Date: May 1991AMD cl CONNECTION DIAGRAMS Top View DIP e bh Inputs A {A LE Vee U 5} Inputs B Output A oO a Enable Co 1 Output B Output C Cl ] Enable O |] Output D Inputs C o } Inputs D end O 05393-002B Lcoc aid ch 35 o 3 feos: OO a2 4 Output A Input B+ ENABLE Output B NC NC Output C ENABLE Input C+ Output D 9 2 AAA 4 + v 3 2 o06 05393-003B 2 32 35 Be Note: Pin 1 is marked for orientation. Am26LS32/Am26LS33AMD al ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: AM26LS32 AM26LS33 P Cc B L_ OPTIONAL PROCESSING Blank = Standard processing B = Burn-in TEMPERATURE RANGE C = Commercial (0 to +70C} PACKAGE TYPE P = 16-Pin Plastic DIP (PD 016) D = 16-Pin Ceramic DIP (CD 016) S = 16-Pin Small Outline (SO 016) SPEEDO OPTION Not Applicable DEVICE NUMBER/DESCRIPTION Am26LS32/Am26LS33 Quad Differential Line Receivers Valid Combinations Valid Combinations AM26LS32 Valid Combinations list configurations planned to be OCB Se 0G, supported in volume for this device. Consult the lo- AM26LS33 cal AMD sales office to confirm availability of specific valid combinations or to check on newly released cambinations, and to obtain additional data on AMD's standard military grade products. Am26LS32/Am26LS33 , 441AMD cl MILITARY ORDERING INFORMATION Standard Military Drawing (SMD)/DESC Products AMD products for Aerospace and Defense applications are available in several packages and operating ranges. Standard Military Drawin (SMD)/DESC products are fully compliant with MIL-STD-883C requirements. The order number (Valid Combi- nation) for SMD/DESC products is formed by a combination of: 78020 on E _OT A L LEAD FINISH A = Solder CASE OUTLINE E = 16-Pin Ceramic DIP (CD 016) F = 16-Pin Ceramic Flatpack (CF 016) 20-Pin Leadless Chip Carrier (CL 020) MILTARY DEVICE TYPE 01= Am26LS32 02= Am26LS33 MILTARY DRAWING PART NUMBER/DESCRIPTION 5962-7802001/02 Valid Combinations Valid Combinations Valid Combinations list configurations planned 5962-7802001 MEA, MFA, to be supported in volume for this device. Con- 5962-7802002 M2A sult the local AMD sales office to confirm avail- ability of specific valid combinations, or to check on newly released combinations. Group A Tests Group A tests consist of Subgroups 1, 2, 3, 7, 8, 9, 10, 11. 4-42 Am26LS32/Am26LS33AMD cl MILITARY ORDERING INFORMATION APL Products AMD products for Aerospace and Defense applications are available in several packages and operating ranges. APL (Approved Products List) products are fully compliant with MIL-STD-883C requirements. The order number (Valid Combination) is formed by a combination of: AM26LS32 AM26LS33 _ /B E A Lo LEAD FINISH A = Hot Solder Dip PACKAGE TYPE E = 16-Pin Ceramic DIP (CD 016) F = 16-Pin Ceramic Flatpack (CF 016) 2 = 20-Pin Leadless Chip Carrier (CL 020) DEVICE CLASS /B = Class B SPEED OPTION Not Applicable DEVICE NUMBER/DESCRIPTION Am26LS32/Am26LS33 Quad Differential Line Receivers Valid Combinations Valid Combinations Valid Combinations list configurations planned AM26LS32 /BEA, /BFA, /B2A to be supported in volume for this device. Con- AM26LS33 sult the local AMD sales office to confirm avail- ability of specific valid combinations, or to check on newly released combinations. Group A Tests Group A tests consist of Subgroups 1, 2,3, 7, 8,9, 10, 11. Am26LS32/Am26LS33 4-43AMD cl ABSOLUTE MAXIMUM RATINGS Supply Voltage 7.0V Common Mode Range +25 V Differential Input Voltage +25 V Enable Voltage 7.0V Output Sink Current 50 mA Storage Temperature Range 65 to +165C Stresses above those listed under Absolute Maximum Rat- ings may cause permanent device failure, Functionality at or above these limits is not implied. Exposure to absolute maxi- mum ratings for extended periods may affect device reliability. OPERATING RANGES Commercial (C) Devices Temperature 0 to +70C Supply Voltage +4.75 Vito +5.25V Military (M) Devices Temperature 55 to +125C Supply Voltage +45 Vt0+5.5V Operating ranges define those limits between which the func- tionality of the device is guaranteed. DC CHARACTERISTICS over operating ranges unless otherwise specified Parameter Typ. Symbol | Parameter Description Test Conditions Min. |(Note 1)| Max. | Unit Am26LS32, -7 V< -0.2 | +0.06 | +0.2 VTH Differential Input Voltage we Von Voll Vow $47 V Vv (Note 5) Am26LS33, -15 V < ~0.5 | +0.12 | +0.5 Vom $< +15 V Rin Input Resistance -15VsVems+15V 6.0 9.8 kQ (One input AC ground) (Note 4) \IN Input Current (Under Test) wy V, Other Input -15 V < Vins 2.3 | mA +1 lin input Current (Under Test) | Vin =15 V, Other Input 15 V < Vins ~2.8 | mA +15V Vou Output HIGH Voltage Vcc = Min., AVin = +1.0 V COM'L | 2.7 3.4 Vv VENABLE = 0.8 V, lod = 440 WA] MIL 2.5 3.4 VoL Output LOW Voltage Vcc = Min., AVin=-1.0V [lol = 4.0 mA 0.4 VENABLE = 0.8 V. fo. = 8.0 mA 0.45 V Vit Enable LOW Voltage (Note 2} 08 | Vv Vin Enable HIGH Voltage (Note 2) 2.0 Vv Vic Enable Clamp Voltage Vcc = Min., lin =18 MA -15{ V lo Off-state (High Impedance) | Vcc = Max. Vo=2.4V 20 nA Output Current Vo=04V -20 I Enable LOW Current Vin = 0.4 V, Voc = Max. -0.2 |-0.36} mA iH Enable HIGH Current Vin = 2.7 V, Voc = Max. 20 | WA ly Enabie Input High Current | Vin = 5.5 V, Vcc = Max. 100 | WA Isc Output Short Circuit Current] Vo = 0 V, Vcc = Max., AVIN= 41.0 V -15 -50 -85 | mA (Note 3) lec Power Supply Current Vcc = Max., All Vin = GND, 52 70 | mA Outputs Disabled VHYST input Hysteresis Ta = 25C, Vec = 5.0 V, Veom=0V 30 mV Notes: 1. Alltypical values are Vcc = 5.0 V, Ta = 25C. vr on Rin is not directly tested but is correlated. (See Attachment }) Input voltage is not tested directly due to tester accuracy limitation but is threshold correlated. (See Attachment It) Input thresholds are tested during DC tests and may be done in combination with testing of other DC parameters. Not more than one output should be shorted at a time. Duration of short circuit test should not exceed one second. Am26LS32/Am26LS33AMD cl SWITCHING CHARACTERISTICS Parameter Typ. Symbol | Parameter Description Test Conditions Min. | (Note 1}] Max.| Unit AC Parameters (Ta = +25C) tPLH Propagation Delay From Cr 15 pF, Ris = 5 kQ, Rie = 2kQ, 17 25 | ns Input to Output Vcc = 5.0 {PHL Propagation Delay From Cx 15 pF, Rui = 5 kQ, Ri2 = 2kQ, 17 25 | ns Input to Output Vcc = 5.0 tiz Enable to Output Vee = 5.0, CL 5 pF, Rui = 5 kQ, 20 30 | ns Ri2 = 2 kQ tuz Enable to Output Vcc = 5.0, Cc 5 pF, Ru = 5 kQQ, 15 22 | ns Ri2 = 2 kQ tz. Enable to Output Vec = 5.0, C. 15 pF, Rui = 5 kQ, 15 22 | ns Ri2 = 2kQ tz Enable to Output Vcc = 5.0, Cr 15 pF, Riri = 5 kQ, 15 22 | ns Ri2 = 2kQ AC Parameters (55C to +125C) tPLH Propagation Delay From Cu 15 pF, Ru: = 5 kQ, 23 38 } ns Input to Output Ri2 = 2 kQ, {PHL Propagation Delay From Cx 15 pF, Rui = 6 kQ, 22 38 | ns Input to Output Ri2 = 2kQ tpzH Propagation Delay From Cr 15 pF, Rui = kQ, 17 33 | ns Enable to Output Ri2 = 2kQ tpzi Propagation Delay From Cu 15 pF, Ris = 5 kQ, 25 33 | ns Enable to Output Riz = 2 kQ teHz Propagation Delay From Ci 5 pF, Rui = 5 kQ, 18 33 | ns Enabie to Output Ri2 = 2kQ tpiz Propagation Delay From CL 5 pF, Rui = 5 kQ, 24 45 | ns Enable to Output Riz = 2 kO Tristate Delays for Enable (Ta = +25C) tezH Propagation Delay From Ci 15 pF, Rit = 5 kQ, 16 32 | ns Enable to Output Ri2 = 2 kQ {pz Propagation Delay From Ci 15 pF, Rui = kQ, 23 33 | ns Enable to Output Ri2 = 2 kQ tPHz Propagation Delay From Ci 5 pF, Rui =5kQ, 14 24 | ns Enable to Output Ri2 = 2 kQ teiz Propagation Delay From CL5 pF, Ru = 5 kQ, 14 32 | ns Enable to Output Ri2 = 2 kQ Tristate Delays for Enable (-55C to +125C) tpzH Propagation Delay From Ci 15 pF, Ru = 5 kQ, 23 48 | ns Enable to Output Ri2 = 2 kQ {pz Propagation Delay From Ci 15 pF, Ru: = 5 kQ, 35. 50 | ns Enable to Output Ri2 = 2 kQ tPHz Propagation Delay From C5 pF, Ris = 5 kQ, 20 36 | ns Enable to Output Ri2 = 2 kQ tPLz Propagation Delay From Ci 5 pF, Rui = 5 kQ, 22 48 | ns Enable to Output Ri2 = 2 kQ Note: 1. All typical values are Voc = 5.0 V, Ta = 25C. Am26LS32/Am26LS33 445AMD cl KEY TO SWITCHING WAVEFORMS WAVEFORM INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from HtoL from HtoL May Will Be Change Changing from LtoH from L to H Dont Care, Changing, Any Change State Permitted Unknown Does Not Center Apply Line is High Impedance Off State KS000010 SWITCHING WAVEFORMS VoH Output # OO \ 13V VoL poh tPLH Roe tPHL Opposite Phase +1.0V Input Transition OV _ -1.0V Propagation Delay (Notes 1 and 3) 05393-004B $5 3.0V Enable 13V Input , OV ~4.5V 0.5V Output 13V ~15V N II ome S2 Open {+ VoL |. tHz | Output av 4 N co N | Vou ~1.5V t ZH Normall 1.3V Hig S1 Open _ osv Enable and Disable Times (Notes 2 and 3) Notes: 05393-005B 1. Diagram shown for ENABLE LOW. 2. S1 and S2 of Load Circuit are closed except where shown. 3. Pulse Generator for All Pulses: Rate < 1.0 MHz; Zo = 50 ; tr< 15 ns; t}< 6.0 ns. 4-46 Am26LS32/Am26LS33AMD at SWITCHING TEST CIRCUIT FOR THREE-STATE OUTPUTS Vcc 2kQ | Test Point From Output Under Test Ct Includes Mviodes Probe and Jig iN3064 Capacitance o O No Se | 05393-006B Am26LS32/Am26LS33 4-47AMD cl Am26LS$32/32B/33/34 Input Resistance and Input Current (Attachment 1) input resistance measurement for differential inputs on line receivers are generally not measured directly. In- stead they are correlated to an input current measure- ment and to the process resistor temperature coefficient. The assumptions made include 1) Process resistor temperature coefficient is known and 2) The open input bias voltage for the input is known or measured within the same test sequence. Under the above assumptions Rin can be correlated to the input current measured. The expression (Vicm Vin) (Rt) (lin) (R25) where Vicn is the open input bias voltage of the Line Re- ceiver. When applying this correlation to the 26LS32 die, the following criteria have been set. 1) Vicm and Iin are the values screened at wafer sort. 2) Temperature coefficients are for 800 ohm/square which gives 0.96 at 0C and 0.93 at -55C. When setting limits, characterized values for Vicw have been used instead of the test programmed limit value. Rin (dif) is Rin (dif) = 2 Rin. For the Am26LS32/32B/33/34 (2.56 -15) 0.96 lin (Max.) Rin Min. = = 16.8/lin (Max.) Comm., and Rin Min, = 16.3/lin (Max.) Mil. Worst Case Measurement for Input Current Two considerations have been used to determine the test condition for input current of the data path for the Am26LS32 Line Receiver. 1) Input current is tested on the 26LS32 with the pin un- der test at one end of the range (+15 V for example) and the untested pin at the opposite extreme of the input range under test. If both pins were at the same test voltage the internal bias generator would have a lower output voltage for tests at -15 V Vin and a higher output voltage at +15 V Vin. This would pro- duce test currents less than maximum. 2) For the 26LS32, breakdown of the differential inputs is the primary failure to the data sheet specification. Hence, both breakdown voltage and input current are tested during the input current tests. 4-48 Am26LS32/Am26LS33AMD cl Test Documentation For Am26LS32/32B/34 V14 (Attachment fl) Input threshold (Vtu) for the Am26LS32/32B/34 is de- scribed by the equation, Vr = (N+1) (14R1/R) K*T/Q ((1+Rh/(m (Re+Rh))) /(1-Rh/ (M(Re+Rh))). Where N-+1 is the attenuator ratio, R1/R is the attenuator ratio mismatch, M is the ratio of the input stage currentto hysteresis stage current, and Rh and Rc are input stage loads. For AM26LS32 34 devices which pass function tests, VoH and Vor tests, thresholds for all inputs within the operating range of the circuit. The Test system is unable to force input thresholds within the accuracy required for the Am26LS32 34 specifications. Figure 1 plots the expected values for Vtn, the worst case values at 25C and 155C. Also shown are the test values for VTu at the -1.5 V input (Vin). In addition, the test voltage at -7 V Vin is shown. For the figure it is seen that the worst case value for the test limit shown would be +/-165 mV, where +/- 102 mV is expected for process parameters and the equation for Vin. Further the 25 mV negative guardband used for -7V testing is less than half the machine uncertainty of 60 mv. When OA testing for Am26LS32/32B/34 is done, thresh- olds are screened for Vcm other than -1.5 V. These ad- ditional tests are considered functional tests only, and the precision threshold tests which insure compliance with data sheet limits are those tests performed where the inputs are tested near 1.5 V. The actual threshold tests are done as a sequence where a setup is performed which preconditions the DUT to a logic one state, then the threshold correlation for a logic zero is tested followed by a threshold correla- tion for logic one to complete the sequence. The limit values for the setup (Vt SET), logic zero test (Vt "), and logic one test (Vt +) are listed under VrH for supply value of 5.0 V. Am26LS32/Am26L333 4-49AMD cl 26LS32 Vt + Limit +200 +100 OJ +t, = 25C @J +t; 155C +7 VIN Expected Vr Process Worst Case Vr V1 - 1) = 25C -100 -130 mV Limit Vr - tj = 155C -102 mV Actual Worst Case Worst Case 2 165 mV = Test V 60 mV machine uncertainty 26LS32 Vr + Limit ~200 mV: -15V |0V : +7V -7 V Test Figure 1. 26LS32 Input Threshold Vr vs. Input Voltage Vin 4-50 Am26LS32/Am26LS$33