LMH6655MANOPB - NATIONAL SEMICONDUCTOR

LMH6654,LMH6655

LMH6654/LMH6655 Single/Dual Low Power, 250 MHz, Low Noise Amplifiers

Literature Number: SNOS956C

LMH6654/LMH6655

June 24, 2009

Single/Dual Low Power, 250 MHz, Low Noise Amplifiers

General Description

The LMH6654/LMH6655 single and dual high speed, voltage

feedback amplifiers are designed to have unity-gain stable

operation with a bandwidth of 250 MHz. They operate from

±2.5V to ±6V and each channel consumes only 4.5 mA. The

amplifiers feature very low voltage noise and wide output

swing to maximize signal-to-noise ratio.

The LMH6654/LMH6655 have a true single supply capability

with input common mode voltage range extending 150 mV

below negative rail and within 1.3V of the positive rail.

LMH6654/LMH6655 high speed and low power combination

make these products an ideal choice for many portable, high

speed application where power is at a premium.

The LMH6654 is packaged in 5-Pin SOT-23 and 8-Pin SOIC.

The LMH6655 is packaged in 8-Pin MSOP and 8-Pin SOIC.

The LMH6654/LMH6655 are built on National’s Advance

VIP10™ (Vertically Integrated PNP) complementary bipolar

process.

Features

(VS = ±5V, TJ = 25°C, Typical values unless specified).

■Voltage feedback architecture

■Unity gain bandwidth 250 MHz

■Supply voltage range ±2.5V to ±6V

■Slew rate 200 V/µsec

■Supply current 4.5 mA/channel

■Input common mode voltage −5.15V to +3.7V

■Output voltage swing (RL = 100Ω) −3.6V to 3.4V

■Input voltage noise 4.5 nV/√Hz

■Input current noise 1.7 pA/√Hz

■Settling Time to 0.01% 25 ns

Applications

■ADC drivers

■Consumer video

■Active filters

■Pulse delay circuits

■xDSL receiver

■Pre-amps

Typical Performance Characteristics

Input Voltage Noise vs. Frequency

20016560

Closed Loop Gain vs. Frequency

20016558

VIP10™ is a trademark of National Semiconductor Corporation.

LMH6654/LMH6655 Single/Dual Low Power, 250 MHz, Low Noise Amplifiers

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

ESD Tolerance (Note 2)

Human Body Model 2 kV

Machine Model 200V

VIN Differential ±1.2V

Output Short Circuit Duration (Note 3)

Supply Voltage (V+ − V−)13.2V

Voltage at Input pins V+ +0.5V, V− −0.5V

Storage Temperature Range −65°C to +150°C

Junction Temperature (Note 4) +150°C

Soldering Information

Infrared or Convection (20 sec.) 235°C

Wave Soldering (10 sec.) 260°C

Operating Ratings (Note 1)

Supply Voltage (V+ - V−)±2.5V to ±6.0V

Junction Temperature Range −40°C to +85°C

Thermal Resistance (θJA)

8-Pin SOIC 172°C/W

8-Pin MSOP 235°C/W

5-Pin SOT-23 265°C/W

±5V Electrical Characteristics

Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = +5V, V− = −5V, VCM = 0V, AV = +1, RF = 25Ω for gain = +1,

RF = 402Ω for gain = ≥ +2, and RL = 100Ω. Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

Dynamic Performance

fCL Close Loop Bandwidth

AV = +1 250

MHz

AV = +2 130

AV = +5 52

AV = +10 26

GBWP Gain Bandwidth Product AV ≥ +5 260 MHz

Bandwidth for 0.1 dB Flatness AV +1 18 MHz

φmPhase Margin 50 deg

SR Slew Rate (Note 8) AV = +1, VIN = 2 VPP 200 V/µs

Settling Time

0.01% AV = +1, 2V Step

25 ns

0.1% 15 ns

trRise Time AV = +1, 0.2V Step 1.4 ns

tfFall Time AV = +1, 0.2V Step 1.2 ns

Distortion and Noise Response

enInput Referred Voltage Noise f ≥ 0.1 MHz 4.5 nV/

inInput-Referred Current Noise f ≥ 0.1 MHz 1.7 pA/

Second Harmonic Distortion AV = +1, f = 5 MHz −80 dBc

Third Harmonic Distortion VO = 2 VPP, RL = 100Ω −85

XtCrosstalk (for LMH6655 only) Input Referred, 5 MHz,

Channel-to-Channel

−80 dB

DG Differential Gain AV = +2, NTSC, RL = 150Ω 0.01 %

DP Differential Phase AV = +2, NTSC, RL = 150Ω 0.025 deg

Input Characteristics

VOS Input Offset Voltage VCM = 0V −3

−4

±1 3

4mV

TC VOS Input Offset Average Drift VCM = 0V (Note 7) 6 µV/°C

IBInput Bias Current VCM = 0V 5 12

18 µA

IOS Input Offset Current VCM = 0V −1

−2

0.3 1

2µA

RIN Input Resistance Common Mode 4 MΩ

Differential Mode 20 kΩ

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LMH6654/LMH6655

Symbol Parameter Conditions Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

CIN Input Capacitance Common Mode 1.8 pF

Differential Mode 1

CMRR Common Mode Rejection Ration Input Referred,

VCM = 0V to −5V

90 dB

CMVR Input Common- Mode Voltage Range CMRR ≥ 50 dB −5.15 −5.0 V

3.5 3.7

Transfer Characteristics

AVOL Large Signal Voltage Gain VO = 4 VPP, RL = 100Ω 60

67 dB

Output Characteristics

Output Swing High No Load 3.4

3.2

3.6

Output Swing Low No Load −3.9 −3.7

−3.5

Output Swing High RL = 100Ω 3.2

3.0

3.4

Output Swing Low RL = 100Ω −3.6 −3.4

−3.2

ISC Short Circuit Current (Note 3)

Sourcing, VO = 0V

ΔVIN = 200 mV

145

130

280

Sinking, VO = 0V

ΔVIN = 200 mV

100

185

IOUT Output Current Sourcing, VO = +3V 80 mA

Sinking, VO = −3V 120

ROOutput Resistance AV = +1, f <100 kHz 0.08 Ω

Power Supply

PSRR Power Supply Rejection Ratio Input Referred,

VS = ±5V to ±6V

60 76 dB

ISSupply Current (per channel) 4.5 6

7mA

5V Electrical Characteristics

Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = +5V, V− = −0V, VCM = 2.5V, AV = +1, RF = 25Ω for

gain = +1, RF = 402Ω for gain = ≥ +2, and RL = 100Ω to V+/2. Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

Dynamic Performance

fCL Close Loop Bandwidth

AV = +1 230

MHz

AV = +2 120

AV = +5 50

AV = +10 25

GBWP Gain Bandwidth Product AV ≥ +5 250 MHz

Bandwidth for 0.1 dB Flatness AV = +1 17 MHz

φmPhase Margin 48 deg

SR Slew Rate (Note 8) AV = +1, VIN = 2 VPP 190 V/µs

Settling Time

0.01% AV = +1, 2V Step

30 ns

0.1% 20 ns

trRise Time AV = +1, 0.2V Step 1.5 ns

tfFall Time AV = +1, 0.2V Step 1.35 ns

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LMH6654/LMH6655

Symbol Parameter Conditions Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

Distortion and Noise Response

enInput Referred Voltage Noise f ≥ 0.1 MHz 4.5 nV/

inInput Referred Current Noise f ≥ 0.1 MHz 1.7 pA/

Second Harmonic Distortion AV = +1, f = 5 MHz −65 dBc

Third Harmonic Distortion VO = 2 VPP, RL = 100Ω −70

XtCrosstalk (for LMH6655 only) Input Referred, 5 MHz −78 dB

Input Characteristics

VOS Input Offset Voltage VCM = 2.5V −5

−6.5

±2 5

6.5 mV

TC VOS Input Offset Average Drift VCM = 2.5V (Note 7) 6 µV/°C

IBInput Bias Current VCM = 2.5V 6 12

18 µA

IOS Input Offset Current VCM = 2.5V −2

−3

0.5 2

3µA

RIN Input Resistance Common Mode 4 MΩ

Differential Mode 20 kΩ

CIN Input Capacitance Common Mode 1.8 pF

Differential Mode 1

CMRR Common Mode Rejection Ration Input Referred,

VCM = 0V to −2.5V

90 dB

CMVR Input Common Mode Voltage Range CMRR ≥ 50 dB −0.15 0 V

3.5 3.7

Transfer Characteristics

AVOL Large Signal Voltage Gain VO = 1.6 VPP, RL = 100Ω 58

64 dB

Output Characteristics

Output Swing High No Load 3.6

3.4

3.75

Output Swing Low No Load 0.9 1.1

1.3

Output Swing High RL = 100Ω 3.5

3.35

3.70

Output Swing Low RL = 100Ω 1 1.3

1.45

ISC Short Circuit Current (Note 3)

Sourcing , VO = 2.5V

ΔVIN = 200 mV

170

Sinking, VO = 2.5V

ΔVIN = 200 mV

140

IOUT Output Current Sourcing, VO = +3.5V 30 mA

Sinking, VO = 1.5V 60

ROOutput Resistance AV = +1, f <100 kHz .08 Ω

Power Supply

PSRR Power Supply Rejection Ratio Input Referred ,

VS = ± 2.5V to ± 3V

60 75 dB

ISSupply Current (per channel) 4.5 6

7mA

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LMH6654/LMH6655

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics

Table.

Note 2: Human body model, 1.5 kΩ in series with 100 pF. Machine model: 0Ω in series with 100 pF.

Note 3: Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature at 150°C.

Note 4: The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ

(MAX) − TA)/θJA. All numbers apply for packages soldered directly onto a PC board.

Note 5: Typical Values represent the most likely parametric norm.

Note 6: All limits are guaranteed by testing or statistical analysis.

Note 7: Offset voltage average drift is determined by dividing the change in VOS at temperature extremes into the total temperature change.

Note 8: Slew rate is the slower of the rising and falling slew rates. Slew rate is rate of change from 10% to 90% of output voltage step.

Connection Diagrams

8-Pin SOIC (LMH6654)

20016521

Top View

5-Pin SOT-23 (LMH6654)

20016520

Top View

8-Pin SOIC and MSOP (LMH6655)

20016519

Top View

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing

8-Pin SOIC

LMH6654MA LMH6654MA 95 Units Rails

M08A

LMH6654MAX 2.5k Units Tape and Reel

LMH6655MA LMH6655MA 95 Units Rails

LMH6655MAX 2.5k Units Tape and Reel

5-Pin SOT-23 LMH6654MF A66A 1k Units Tape and Reel MF05A

LMH6654MFX 3K Units Tape and Reel

8-Pin MSOP LMH6655MM A67A 1k Units Tape and Reel MUA08A

LMH6655MMX 3.5k Units Tape and Reel

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LMH6654/LMH6655

Typical Performance Characteristics TJ = 25°C, V+ = ±5V, V− = −5, RF = 25Ω for gain = +1,

RF = 402Ω and for gain ≥ +2, and RL = 100Ω, unless otherwise specified.

Closed Loop Bandwidth (G = +1)

20016509

Closed Loop Bandwidth (G = +2)

20016510

Closed Loop Bandwidth (G = +5)

20016511

Closed Loop Bandwidth (G = +10)

20016512

Supply Current per Channel vs. Supply Voltage

20016535

Supply Current per Channel vs. Temperature

20016548

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LMH6654/LMH6655

Offset Voltage vs. Supply Voltage (VCM = 0V)

20016549

Offset Voltage vs. Common Mode

20016532

Offset Voltage vs. Common Mode

20016539

Bias Current and Offset Voltage vs. Temperature

20016551

Bias Current vs. Common Mode Voltage

20016537

Bias Current vs. Common Mode Voltage

20016565

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LMH6654/LMH6655

AOL, PSRR and CMRR vs. Temperature

20016550

Inverting Large Signal Pulse Response (VS = 5V)

20016502

Inverting Large Signal Pulse Response (VS = ±5V)

20016504

Non-Inverting Large Signal Pulse Response (VS = 5V)

20016506

Non-Inverting Large Signal Pulse Response (VS = ±5V)

20016508

Non-Inverting Small Signal Pulse Response (VS = 5V)

20016505

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LMH6654/LMH6655

Non-Inverting Small Signal Pulse Response (VS = ±5V)

20016507

Inverting Small Signal Pulse Response (VS = 5V)

20016501

Inverting Small Signal Pulse Response (VS = ±5V)

20016503

Input Voltage and Current Noise vs. Frequency (VS = 5V)

20016513

Input Voltage and Current Noise vs. Frequency

(VS = ±5V)

20016514

Harmonic Distortion vs. Frequency

G = +1, VO = 2 VPP, VS = 5V

20016517

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LMH6654/LMH6655

Harmonic Distortion vs. Frequency

G = +1, VO = 2 VPP, VS = ±5V

20016518

Harmonic Distortion vs. Temperature

VS = 5V, f = 5 MHz, VO = 2 VPP

20016529

Harmonic Distortion vs. Temperature

VS = ±5V, f = 5 MHz, VO = 2 VPP

20016528

Harmonic Distortion vs. Gain

VS = 5V, f = 5 MHz, VO = 2 VPP

20016531

Harmonic Distortion vs. Gain

VS = ±5V, f = 5 MHz, VO = 2 VPP

20016530

Harmonic Distortion vs. Output Swing

(G = +2, VS = 5V, f = 5 MHz)

20016559

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LMH6654/LMH6655

Harmonic Distortion vs. Output Swing

(G = +2, VS = ±5V, f = 5 MHz)

20016522

PSRR vs. Frequency

20016516

CMRR vs. Frequency

20016564

Output Sinking Current

20016546

Output Sourcing Current

20016547

CrossTalk vs. Frequency (LMH6655 only)

20016561

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LMH6654/LMH6655

CrossTalk vs. Frequency (LMH6655 only)

20016562

Isolation Resistance vs. Capacitive Load

20016563

Open Loop Gain and Phase vs. Frequency

20016527

Application Information

GENERAL INFORMATION

The LMH6654 single and LMH6655 dual high speed, voltage

feedback amplifiers are manufactured on National

Semiconductor’s new VIP10 (Vertically Integrated PNP) com-

plementary bipolar process. These amplifiers can operate

from ±2.5V to ±6V power supply. They offer low supply cur-

rent, wide bandwidth, very low voltage noise and large output

swing. Many of the typical performance plots found in the

datasheet can be reproduced if 50Ω coax and 50Ω RIN/ROUT

resistors are used.

CIRCUIT LAYOUT CONSIDERATION

With all high frequency devices, board layouts with stray ca-

pacitance have a strong influence on the AC performance.

The LMH6654/LMH6655 are not exception and the inverting

input and output pins are particularly sensitive to the coupling

of parasitic capacitance to AC ground. Parasitic capacitances

on the inverting input and output nodes to ground could cause

frequency response peaking and possible circuit oscillation.

Therefore, the power supply, ground traces and ground plan

should be placed away from the inverting input and output

pins. Also, it is very important to keep the parasitic capaci-

tance across the feedback to an absolute minimum.

The PCB should have a ground plane covering all unused

portion of the component side of the board to provide a low

impedance path. All trace lengths should be minimized to re-

duce series inductance.

Supply bypassing is required for the amplifiers performance.

The bypass capacitors provide a low impedance return cur-

rent path at the supply pins. They also provide high frequency

filtering on the power supply traces. It is recommended that a

ceramic decoupling capacitor 0.1 µF chip should be placed

with one end connected to the ground plane and the other

side as close as possible to the power pins. An additional 10

µF tantalum electrolytic capacitor should be connected in par-

allel, to supply current for fast large signal changes at the

output.

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LMH6654/LMH6655

20016541

FIGURE 1.

EVALUATION BOARDS

National provides the following evaluation boards as a guide

for high frequency layout and as an aid in device testing and

characterization.

Device Package Evalulation

Board PN

LMH6654MF 5-Pin SOT-23 CLC730068

LMH6654MA 8-Pin SOIC CLC730027

LMH6655MA 8-Pin SOIC CLC730036

LMH6655MM 8-Pin MSOP CLC730123

The free evaluation board are shipped automatically when a

device sample request is placed with National Semiconduc-

tor.

The CLC730027 datasheet also contains tables of recom-

mended components to evaluate several of National’s high

speed amplifiers. This table for the LMH6654 is illustrated

below. Refer to the evaluation board datasheet for schemat-

ics and further information.

Components Needed to Evaluate the LMH6654 on the Eval-

uation Board:

•RfRg use the datasheet to select values.

•RIN, ROUT typically 50Ω (Refer to the Basic Operation

section of the evaluation board datasheet for details)

•Rf is an optional resistor for inverting again configurations

(select Rf to yield desired input impedance = Rg||Rf)

•C1, C2 use 0.1 µF ceramic capacitors

•C3, C4 use 10 µF tantalum capacitors

Components not used:

1. C5, C6, C7, C8

2. R1 thru R8

The evaluation boards are designed to accommodate dual

supplies. The board can be modified to provide single oper-

ation. For best performance;

1) do not connect the unused supply.

2) ground the unused supply pin.

POWER DISSIPATION

The package power dissipation should be taken into account

when operating at high ambient temperature and/or high pow-

er dissipative conditions. In determining maximum operable

temperature of the device, make sure the total power dissi-

pation of the device is considered; this power dissipated in the

device with a load connected to the output as well as the

nominal dissipation of the op amp.

DRIVING CAPACITIVE LOADS

Capacitive loads decrease the phase margin of all op amps.

The output impedance of a feedback amplifier becomes in-

ductive at high frequencies, creating a resonant circuit when

the load is capacitive. This can lead to overshoot, ringing and

oscillation. To eliminate oscillation or reduce ringing, an iso-

lation resistor can be placed as shown in Figure 2 below. At

frequencies above

the load impedance of the Amplifier approaches RISO. The

desired performance depends on the value of the isolation

resistor. The isolation resistance vs. capacitance load graph

in the typical performance characteristics provides the means

for selection of the value of RS that provides ≤ 3 dB peaking

in closed loop AV = 1 response. In general, the bigger the

isolation resistor, the more damped the pulse response be-

comes. For initial evaluation, a 50Ω isolation resistor is rec-

ommended.

20016540

FIGURE 2.

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LMH6654/LMH6655

COMPONENTS SELECTION AND FEEDBACK RESISTOR

It is important in high-speed applications to keep all compo-

nent leads short since wires are inductive at high frequency.

For discrete components, choose carbon composition axially

leaded resistors and micro type capacitors. Surface mount

components are preferred over discrete components for min-

imum inductive effect. Never use wire wound type resistors in

high frequency applications.

Large values of feedback resistors can couple with parasitic

capacitance and cause undesired effects such as ringing or

oscillation in high-speed amplifiers. Keep resistors as low as

possible consistent with output loading consideration. For a

gain of 2 and higher, 402Ω feedback resistor used for the typ-

ical performance plots gives optimal performance. For unity

gain follower, a 25Ω feedback resistor is recommended rather

than a direct short. This effectively reduces the Q of what

would otherwise be a parasitic inductance (the feedback wire)

into the parasitic capacitance at the inverting input.

BIAS CURRENT CANCELLATION

In order to cancel the bias current errors of the non-inverting

configuration, the parallel combination of the gain setting Rg

and feedback Rf resistors should equal the equivalent source

resistance Rseq as defined in Figure 3. Combining this con-

straint with the non-inverting gain equation, allows both Rf and

Rg to be determined explicitly from the following equations:

Rf = AVRseq and Rg = Rf/(AV−1)

For inverting configuration, bias current cancellation is ac-

complished by placing a resistor Rb on the non-inverting input

equal in value to the resistance seen by the inverting input

(Rf//(Rg+Rs). The additional noise contribution of Rb can be

minimized through the use of a shunt capacitor.

20016542

FIGURE 3. Non-Inverting Amplifier Configuration

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LMH6654/LMH6655

20016543

FIGURE 4. Inverting Amplifier Configuration

TOTAL INPUT NOISE VS. SOURCE RESISTANCE

The noise model for the non-inverting amplifier configuration

showing all noise sources is described in Figure 5. In addition

to the intrinsic input voltage noise (en) and current

noise (in = in+ = in−) sources, there also exits thermal

voltage noise associated with each of the external

resistors. Equation 1 provides the general form for total equiv-

alent input voltage noise density (eni). Equation 2 is a simpli-

fication of Equation 1 that assumes

20016544

FIGURE 5. Non-Inverting Amplifier Noise Model

(1)

Rf||Rg=Rseq for bias current cancellation. Figure 6 illustrates

the equivalent noise model using this assumption. The total

equivalent output voltage noise (eno) is eni * AV.

20016545

FIGURE 6. Noise Model with Rf||Rg = Rseq

(2)

If bias current cancellation is not a requirement, then Rf||Rg

does not need to equal Rseq. In this case, according to Equa-

tion 1, RfRg should be as low as possible in order to minimize

noise. Results similar to Equation 1 are obtained for the in-

verting configuration on Figure 2 if Rseq is replaced by Rb and

Rg is replaced by Rg + Rs. With these substitutions, Equation

1 will yield an eni referred to the non-inverting input. Referring

to eni to the inverting input is easily accomplished by multi-

plying eni by the ration of non-inverting to inverting gains.

Noise Figure

Noise Figure (NF) is a measure of the noise degradation

caused by an amplifier.

(3)

The noise figure formula is shown is Equation 3. The addition

of a terminating resistor RT, reduces the external thermal

noise but increases the resulting NF.

The NF is increased because the RT reduces the input signal

amplitude thus reducing the input SNR.

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LMH6654/LMH6655

(4)

The noise figure is related to the equivalent source resistance

(Rseq) and the parallel combination of Rf and Rg. To minimize

noise figure, the following steps are recommended:

1. Minimize Rf||Rg

2. Choose the Optimum Rs (ROPT)

ROPT is the point at which the NF curve reaches a minimum

and is approximated by:

ROPT ≈ (en/in)

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LMH6654/LMH6655

Physical Dimensions inches (millimeters) unless otherwise noted

8-Pin SOIC

NS Package Number M08A

5-Pin SOT-23

NS Package Number MF05A

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LMH6654/LMH6655

8-Pin MSOP

NS Package Number MUA08A

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LMH6654/LMH6655

Notes

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LMH6654/LMH6655

Notes

LMH6654/LMH6655 Single/Dual Low Power, 250 MHz, Low Noise Amplifiers

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