LT8302
1
8302fa
For more information www.linear.com/LT8302
Typical applicaTion
FeaTures DescripTion
42VIN Micropower No-Opto
Isolated Flyback Converter
with 65V/3.6A Switch
The LT
®
8302 is a monolithic micropower isolated flyback
converter. By sampling the isolated output voltage directly
from the primary-side flyback waveform, the part requires
no third winding or opto-isolator for regulation. The output
voltage is programmed with two external resistors and a
third optional temperature compensation resistor. Bound-
ary mode operation provides a small magnetic solution with
excellent load regulation. Low ripple Burst Mode operation
maintains high efficiency at light load while minimizing the
output voltage ripple. A 3.6A, 65V DMOS power switch
is integrated along with all the high voltage circuitry and
control logic into a thermally enhanced 8-lead SO package.
The LT8302 operates from an input voltage range of 2.8V
to 42V and delivers up to 18W of isolated output power.
The high level of integration and the use of boundary
and low ripple burst modes result in a simple to use, low
component count, and high efficiency application solution
for isolated power delivery.
2.8V to 32VIN/5VOUT Isolated Flyback Converter
applicaTions
n 2.8V to 42V Input Voltage Range
n 3.6A, 65V Internal DMOS Power Switch
n Low Quiescent Current:
106µA in Sleep Mode
380µA in Active Mode
n Quasi-Resonant Boundary Mode Operation at
Heavy Load
n Low Ripple Burst Mode
®
Operation at Light Load
n Minimum Load < 0.5% (Typ) of Full Output
n No Transformer Third Winding or Opto-Isolator
Required for Output Voltage Regulation
n Accurate EN/UVLO Threshold and Hysteresis
n Internal Compensation and Soft-Start
n Temperature Compensation for Output Diode
n Output Short-Circuit Protection
n Thermally Enhanced 8-Lead SO Package
n Isolated Automotive, Industrial, Medical Power
Supplies
n Isolated Auxiliary/Housekeeping Power Supplies
L, LT, LTC , LT M, Linear Technology, the Linear logo and Burst Mode are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners. Protected by U.S. Patents, including 5438499, 7463497, 7471522.
Efficiency vs Load Current
VIN
LT8302
SW
9µH
VIN
2.8V TO 32V 3:1
H
RFB
RREF
EN/UVLO
470pF
10µF
F
220µF
10mA TO 1.1A (VIN = 5V)
10mA TO 2.0A (VIN = 12V)
10mA TO 2.9A (VIN = 24V)
VOUT
39Ω
154k
115k 10k
8302 TA01a
GND
INTVCC
TC
VOUT+
5V
LOAD CURRENT (A)
0
EFFICIENCY (%)
80
85
90
1.5 2.5
8302 TA01b
75
70
0.5 1.0 2.0 3.0
65
60
VIN = 5V
VIN = 12V
VIN = 24V
FRONT PAGE APPLICATION
LT8302
2
8302fa
For more information www.linear.com/LT8302
pin conFiguraTionabsoluTe MaxiMuM raTings
SW (Note 2) ..............................................................65V
VIN ............................................................................42V
EN/UVLO ....................................................................VIN
RFB ........................................................VIN – 0.5V to VIN
Current Into RFB ....................................................200µA
INTVCC, RREF, TC .........................................................4V
Operating Junction Temperature Range (Notes 3, 4)
LT8302E, LT8302I.............................. 40°C to 125°C
LT8302H ............................................40°C to 150°C
LT8302MP ......................................... 5C to 150°C
Storage Temperature Range .................. 6C to 150°C
Lead Temperature (Soldering, 10 sec) ...................300°C
(Note 1)
1
2
3
4
8
7
6
5
TOP VIEW
TC
RREF
RFB
SW
EN/UVLO
INTVCC
VIN
GND
S8E PACKAGE
8-LEAD PLASTIC SO
9
GND
θJA = 33°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LT8302ES8E#PBF LT8302ES8E#TRPBF 8302 8-Lead Plastic SO –40°C to 125°C
LT8302IS8E#PBF LT8302IS8E#TRPBF 8302 8-Lead Plastic SO –40°C to 125°C
LT8302HS8E#PBF LT8302HS8E#TRPBF 8302 8-Lead Plastic SO –40°C to 150°C
LT8302MPS8E#PBF LT8302MPS8E#TRPBF 8302 8-Lead Plastic SO –55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
LT8302
3
8302fa
For more information www.linear.com/LT8302
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VEN/UVLO = VIN, CINTVCC = 1µF to GND, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
VIN VIN Voltage Range l2.8 42 V
IQVIN Quiescent Current VEN/UVLO = 0.3V
VEN/UVLO = 1.1V
Sleep Mode (Switch Off)
Active Mode (Switch On)
0.5
53
106
380
2 µA
µA
µA
µA
EN/UVLO Shutdown Threshold For Lowest Off IQl0.3 0.75 V
EN/UVLO Enable Threshold Falling l1.178 1.214 1.250 V
EN/UVLO Enable Hysteresis 14 mV
IHYS EN/UVLO Hysteresis Current VEN/UVLO = 0.3V
VEN/UVLO = 1.1V
VEN/UVLO = 1.3V
–0.1
2.3
–0.1
0
2.5
0
0.1
2.7
0.1
µA
µA
µA
VINTVCC INTVCC Regulation Voltage IINTVCC = 0mA to 10mA 2.85 3 3.1 V
IINTVCC INTVCC Current Limit VINTVCC = 2.8V 10 13 16 mA
INTVCC UVLO Threshold Falling 2.39 2.47 2.55 V
INTVCC UVLO Hysteresis 105 mV
(RFB – VIN) Voltage IRFB = 75µA to 125µA –50 50 mV
RREF Regulation Voltage l0.98 1.00 1.02 V
RREF Regulation Voltage Line Regulation 2.8V ≤ VIN ≤ 42V –0.01 0 0.01 %/V
VTC TC Pin Voltage 1.00 V
ITC TC Pin Current VTC = 1.2V
VTC = 0.8V 12 15
–200 18 µA
µA
fMIN Minimum Switching Frequency 11.3 12 12.7 kHz
tON(MIN) Minimum Switch-On Time 160 ns
tOFF(MAX) Maximum Switch-Off Time Backup Timer 170 µs
ISW(MAX) Maximum Switch Current Limit 3.6 4.5 5.4 A
ISW(MIN) Minimum Switch Current Limit 0.78 0.87 0.96 A
RDS(ON) Switch On-Resistance ISW = 1.5A 80
ILKG Switch Leakage Current VSW = 65V 0.1 0.5 µA
tSS Soft-Start Timer 11 ms
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The SW pin is rated to 65V for transients. Depending on the
leakage inductance voltage spike, operating waveforms of the SW pin
should be derated to keep the flyback voltage spike below 65V as shown
in Figure 5.
Note 3: The LT8302E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT8302I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT8302H is guaranteed over the full –40°C to
150°C operating junction temperature range. The LT8302MP is guaranteed
over the full –55°C to 150°C operating junction temperature range. High
junction temperatures degrade operating lifetimes. Operating lifetime is
derated at junction temperature greater than 125°C.
Note 4: The LT8302 includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 150°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
LT8302
4
8302fa
For more information www.linear.com/LT8302
Typical perForMance characTerisTics
Boundary Mode Waveforms Discontinuous Mode Waveforms Burst Mode Waveforms
VIN Shutdown Current
VIN Quiescent Current,
Sleep Mode
VIN Quiescent Current,
Active Mode
Output Load and Line Regulation Output Temperature Variation
Switching Frequency
vs Load Current
TA = 25°C, unless otherwise noted.
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
5.1
5.2
5.3
25 75
8302 G02
5.0
4.9
–25 0 50 100 150125
4.8
4.7
FRONT PAGE APPLICATION
VIN = 12V
IOUT = 1A
RTC = 115k
RTC = OPEN
VSW
20V/DIV
VOUT
50mV/DIV
2µs/DIV
FRONT PAGE APPLICATION
VIN = 12V
IOUT = 2A
8302 G04
VSW
20V/DIV
VOUT
50mV/DIV
2µs/DIV
FRONT PAGE APPLICATION
VIN = 12V
IOUT = 0.5A
8302 G05
VSW
20V/DIV
VOUT
50mV/DIV
20µs/DIV
FRONT PAGE APPLICATION
VIN = 12V
IOUT = 10mA
8302 G06
VIN (V)
0
IQ (µA)
6
8
10
40
8302 G07
4
2
010 20 30 50
TJ = 150°C
TJ = 25°C
TJ = –55°C
VIN (V)
0
80
IQ (µA)
90
100
110
120
130
140
10 20 30 40
8302 G08
50
TJ = 150°C
TJ = –55°C
TJ = 25°C
VIN (V)
0
IQ (µA)
380
400
420
40
8302 G09
360
340
320 10 20 30 50
TJ = 150°C
TJ = –55°C
TJ = 25°C
LOAD CURRENT (A)
0 0.5
0
FREQUENCY (kHz)
200
500
1.0 2.0 2.5
8302 G03
100
400
300
1.5 3.0
VIN = 5V
VIN = 12V
VIN = 24V
FRONT PAGE APPLICATION
LOAD CURRENT (A)
0
OUTPUT VOLTAGE (V)
5.15
1.5
8302 G01
5.00
4.90
0.5 1.0 2.0
4.85
4.80
5.20
5.10
5.05
4.95
2.5 3.0
VIN = 5V
VIN = 12V
VIN = 24V
LT8302
5
8302fa
For more information www.linear.com/LT8302
Typical perForMance characTerisTics
INTVCC Voltage vs VIN INTVCC UVLO Threshold (RFB-VIN) Voltage
RREF Regulation Voltage RREF Line Regulation TC Pin Voltage
EN/UVLO Enable Threshold EN/UVLO Hysteresis Current INTVCC Voltage vs Temperature
TA = 25°C, unless otherwise noted.
TEMPERATURE (°C)
–50
VEN/UVLO (V)
1.220
1.230
150
8302 G10
1.210
1.200 050 100
–25 25 75 125
1.240
1.215
1.225
1.205
1.235 RISING
FALLING
TEMPERATURE (°C)
–50
IHYST (µA)
3
4
5
25 75 150
8302 G11
2
1
0–25 0 50 100 125
TEMPERATURE (°C)
50
2.80
VINTVCC (V)
2.85
2.90
2.95
3.00
0 50 100 150
8302 G12
3.05
3.10
25 25 75 125
IINTVCC = 0mA
IINTVCC = 10mA
VIN (V)
5
VINTVCC (V)
2.95
3.00
3.05
35 4020 25 30
8302 G13
2.90
2.85
10 15 45
2.80
3.10
IINTVCC = 0mA
IINTVCC = 10mA
TEMPERATURE (°C)
50
2.2
VINTVCC (V)
2.3
2.4
2.5
2.6
0 50 100 150
8302 G14
2.7
2.8
25 25 75 125
FALLING
RISING
TEMPERATURE (°C)
–50
VOLTAGE (mV)
0
20
150
8302 G15
–20
–40 050 100
–25 25 75 125
40
–10
10
–30
30 IRFB = 125µA
IRFB = 100µA
IRFB = 75µA
TEMPERATURE (°C)
50
0.990
VRREF (V)
0.992
0.996
0.998
1.000
1.010
1.004
050 75
8302 G16
0.994
1.006
1.008
1.002
25 25 100 125 150
VIN (V)
0
VRREF (V)
1.002
1.006
1.010
40
8302 G17
0.998
0.994
1.000
1.004
1.008
0.996
0.992
0.990 10 20 30 50
TEMPERATURE (°C)
–50
VTC (V)
1.1
1.3
150
8302 G18
0.9
0.7 050 100
–25 25 75 125
1.5
1.0
1.2
0.8
1.4
LT8302
6
8302fa
For more information www.linear.com/LT8302
Minimum Switching Frequency Minimum Switch-On Time Minimum Switch-Off Time
RDS(ON) Switch Current Limit Maximum Switching Frequency
Typical perForMance characTerisTics
TA = 25°C, unless otherwise noted.
TEMPERATURE (°C)
–50
RESISTANCE (mΩ)
120
160
200
25 75 150
8302 G19
80
40
0–25 0 50 100 125
TEMPERATURE (°C)
–50
ISW (A)
3
4
5
25 75 150
8302 G20
2
1
0–25 0 50 100 125
MAXIMUM CURRENT LIMIT
MINIMUM CURRENT LIMIT
TEMPERATURE (°C)
–50
FREQUENCY (kHz)
300
400
500
25 75 150
8302 G21
200
100
0–25 0 50 100 125
TEMPERATURE (°C)
–50
FREQUENCY (kHz)
12
16
20
25 75 150
8302 G22
8
4
0–25 0 50 100 125
TEMPERATURE (°C)
–50
0
TIME (ns)
100
200
300
400
–25 0 25 50
8302 G23
75 100 125 150
TEMPERATURE (°C)
–50
0
TIME (ns)
100
200
300
400
–25 0 25 50
8302 G24
75 100 125 150
LT8302
7
8302fa
For more information www.linear.com/LT8302
pin FuncTions
EN/UVLO (Pin 1): Enable/Undervoltage Lockout. The
EN/UVLO pin is used to enable the LT8302. Pull the pin
below 0.3V to shut down the LT8302. This pin has an ac-
curate 1.214V threshold and can be used to program a VIN
undervoltage lockout (UVLO) threshold using a resistor
divider from VIN to ground. A 2.5µA current hysteresis
allows the programming of VIN UVLO hysteresis. If neither
function is used, tie this pin directly to VIN.
INTVCC (Pin 2): Internal 3V Linear Regulator Output. The
INTVCC pin is supplied from VIN and powers the internal
control circuitry and gate driver. Do not overdrive the
INTVCC pin with any external supply, such as a third winding
supply. Locally bypass this pin to ground with a minimum
1µF ceramic capacitor.
VIN (Pin 3): Input Supply. The VIN pin supplies current to
the internal circuitry and serves as a reference voltage for
the feedback circuitry connected to the RFB pin. Locally
bypass this pin to ground with a capacitor.
GND (Pin 4, Exposed Pad Pin 9): Ground. The exposed
pad provides both electrical contact to ground and good
thermal contact to the printed circuit board. Solder the
exposed pad directly to the ground plane.
SW (Pin 5): Drain of the Internal DMOS Power Switch.
Minimize trace area at this pin to reduce EMI and voltage
spikes.
RFB (Pin 6): Input Pin for External Feedback Resistor.
Connect a resistor from this pin to the transformer primary
SW pin. The ratio of the RFB resistor to the RREF resistor,
times the internal voltage reference, determines the output
voltage (plus the effect of any non-unity transformer turns
ratio). Minimize trace area at this pin.
RREF (Pin 7): Input Pin for External Ground Referred Ref-
erence Resistor. The resistor at this pin should be in the
range of 10k, but for convenience in selecting a resistor
divider ratio, the value may range from 9.09k to 11.0k.
TC (Pin 8): Output Voltage Temperature Compensation. The
voltage at this pin is proportional to absolute temperature
(PTAT) with temperature coefficient equal to 3.35mV/°K,
i.e., equal to 1V at room temperature 25°C. The TC pin
voltage can be used to estimate the LT8302 junction tem-
perature. Connect a resistor from this pin to the RREF pin
to compensate the output diode temperature coefficient.
LT8302
8
8302fa
For more information www.linear.com/LT8302
block DiagraM
+
+
3
2
8
DRIVER
INTVCC
VIN
T1
N:1
A2 RSENSE
A3
TC
8302 BD
RREF
RREF
REN2
REN1
RTC
RFB
+
gm
1.214V
1V
M4
OSCILLATOR
LDO
BOUNDARY
DETECTOR
START-UP,
REFERENCE,
CONTROL
PTAT
VOLTAGE
R M1
GND
4, EXPOSED PAD PIN 9
Q
S
M2
VIN
VIN
CIN
6
RFB
5
SW
L1A L1B COUT
DOUT
VOUT+
VOUT
M3
25µA
INTVCC
1EN/UVLO
CINTVCC
2.5µA
1:4
7
+
A1
LT8302
9
8302fa
For more information www.linear.com/LT8302
operaTion
The LT8302 is a current mode switching regulator IC
designed specially for the isolated flyback topology. The
key problem in isolated topologies is how to communicate
the output voltage information from the isolated secondary
side of the transformer to the primary side for regulation.
Historically, opto-isolators or extra transformer windings
communicate this information across the isolation bound-
ary. Opto-isolator circuits waste output power, and the
extra components increase the cost and physical size of
the power supply. Opto-isolators can also cause system
issues due to limited dynamic response, nonlinearity, unit-
to-unit variation and aging over lifetime. Circuits employing
extra transformer windings also exhibit deficiencies, as
using an extra winding adds to the transformer’s physical
size and cost, and dynamic response is often mediocre.
The LT8302 samples the isolated output voltage through
the primary-side flyback pulse waveform. In this manner,
neither opto-isolator nor extra transformer winding is re-
quired for regulation. Since the LT8302 operates in either
boundary conduction mode or discontinuous conduction
mode, the output voltage is always sampled on the SW
pin when the secondary current is zero. This method im-
proves load regulation without the need of external load
compensation components.
The LT8302 is a simple to use micropower isolated fly-
back converter housed in a thermally enhanced 8-lead
SO package. The output voltage is programmed with two
external resistors. An optional TC resistor provides easy
output diode temperature compensation. By integrating
the loop compensation and soft-start inside, the part
reduces the number of external components. As shown
in the Block Diagram, many of the blocks are similar to
those found in traditional switching regulators including
reference, regulators, oscillator, logic, current amplifier,
current comparator, driver, and power switch. The novel
sections include a flyback pulse sense circuit, a sample-
and-hold error amplifier, and a boundary mode detector,
as well as the additional logic for boundary conduction
mode, discontinuous conduction mode, and low ripple
Burst Mode operation.
Quasi-Resonant Boundary Mode Operation
The LT8302 features quasi-resonant boundary conduction
mode operation at heavy load, where the chip turns on the
primary power switch when the secondary current is zero
and the SW rings to its valley. Boundary conduction mode
is a variable frequency, variable peak-current switching
scheme. The power switch turns on and the transformer
primary current increases until an internally controlled peak
current limit. After the power switch turns off, the voltage
on the SW pin rises to the output voltage multiplied by
the primary-to-secondary transformer turns ratio plus the
input voltage. When the secondary current through the
output diode falls to zero, the SW pin voltage collapses
and rings around VIN. A boundary mode detector senses
this event and turns the power switch back on at its valley.
LT8302
10
8302fa
For more information www.linear.com/LT8302
operaTion
Boundary conduction mode returns the secondary current
to zero every cycle, so parasitic resistive voltage drops
do not cause load regulation errors. Boundary conduc-
tion mode also allows the use of smaller transformers
compared to continuous conduction mode and does not
exhibit subharmonic oscillation.
Discontinuous Conduction Mode Operation
As the load gets lighter, boundary conduction mode in-
creases the switching frequency and decreases the switch
peak current at the same ratio. Running at a higher switching
frequency up to several MHz increases switching and gate
charge losses. To avoid this scenario, the LT8302 has an
additional internal oscillator, which clamps the maximum
switching frequency to be less than 380kHz. Once the
switching frequency hits the internal frequency clamp,
the part starts to delay the switch turn-on and operates
in discontinuous conduction mode.
Low Ripple Burst Mode Operation
Unlike traditional flyback converters, the LT8302 has to
turn on and off at least for a minimum amount of time
and with a minimum frequency to allow accurate sampling
of the output voltage. The inherent minimum switch cur-
rent limit and minimum switch-off time are necessary to
guarantee the correct operation of specific applications.
As the load gets very light, the LT8302 starts to fold back
the switching frequency while keeping the minimum switch
current limit. So the load current is able to decrease while
still allowing minimum switch-off time for the sample-and-
hold error amplifier. Meanwhile, the part switches between
sleep mode and active mode, thereby reducing the effec-
tive quiescent current to improve light load efficiency. In
this condition, the LT8302 runs in low ripple Burst Mode
operation. The typical 12kHz minimum switching frequency
determines how often the output voltage is sampled and
also the minimum load requirement.
LT8302
11
8302fa
For more information www.linear.com/LT8302
applicaTions inForMaTion
Output Voltage
The RFB and RREF resistors as depicted in the Block Diagram
are external resistors used to program the output voltage.
The LT8302 operates similar to traditional current mode
switchers, except in the use of a unique flyback pulse
sense circuit and a sample-and-hold error amplifier, which
sample and therefore regulate the isolated output voltage
from the flyback pulse.
Operation is as follows: when the power switch M1 turns
off, the SW pin voltage rises above the VIN supply. The
amplitude of the flyback pulse, i.e., the difference between
the SW pin voltage and VIN supply, is given as:
VFLBK = (VOUT + VF + ISECESR) • NPS
VF = Output diode forward voltage
ISEC = Transformer secondary current
ESR = Total impedance of secondary circuit
NPS = Transformer effective primary-to-secondary
turns ratio
The flyback voltage is then converted to a current, IRFB,
by the RFB resistor and the flyback pulse sense circuit
(M2 and M3). This current, IRFB, also flows through the
RREF resistor to generate a ground-referred voltage. The
resulting voltage feeds to the inverting input of the sample-
and-hold error amplifier. Since the sample-and-hold error
amplifier samples the voltage when the secondary current
is zero, the (ISEC ESR) term in the VFLBK equation can be
assumed to be zero.
The internal reference voltage, VREF, 1.00V, feeds to the
noninverting input of the sample-and-hold error ampli-
fier. The relatively high gain in the overall loop causes the
voltage at the RREF pin to be nearly equal to the internal
reference voltage VREF. The resulting relationship between
VFLBK and VREF can be expressed as:
VFLBK
RFB
RREF =VREF or
VFLBK =VREF RFB
RREF
VREF = Internal reference voltage 1.00V
Combination with the previous VFLBK equation yields an
equation for VOUT, in terms of the RFB and RREF resistors,
transformer turns ratio, and diode forward voltage:
VOUT =VREF RFB
RREF
1
NPS
VF
Output Temperature Compensation
The first term in the VOUT equation does not have tempera-
ture dependence, but the output diode forward voltage, VF,
has a significant negative temperature coefficient (–1mV/°C
to –2mV/°C). Such a negative temperature coefficient pro-
duces approximately 200mV to 300mV voltage variation
on the output voltage across temperature.
For higher voltage outputs, such as 12V and 24V, the
output diode temperature coefficient has a negligible ef-
fect on the output voltage regulation. For lower voltage
outputs, such as 3.3V and 5V, however, the output diode
temperature coefficient does count for an extra 2% to 5%
output voltage regulation.
The LT8302 junction temperature usually tracks the output
diode junction temperature to the first order. To compensate
the negative temperature coefficient of the output diode,
a resistor, RTC, connected between the TC and RREF pins
generates a proportional-to-absolute-temperature (PTAT)
current. The PTAT current is zero at 25°C, flows into the
RREF pin at hot temperature, and flows out of the RREF pin
at cold temperature. With the RTC resistor in place, the
output voltage equation is revised as follows:
VOUT =VREF RFB
RREF
1
NPS
VFTO
( )
VTC / T
( )
T TO
( )
RFB
RTC
1
NPS
VF/ T
( )
TTO
( )
TO=Room temperature 25°
°
C
VF/ T
( )
=Output diode forward voltage
temperature coefficient
V
TC
/ T
( )
=3.35mV/ C
LT8302
12
8302fa
For more information www.linear.com/LT8302
applicaTions inForMaTion
To cancel the output diode temperature coefficient, the
following two equations should be satisfied:
VOUT =VREF RFB
RREF
1
NPS
VFTO
( )
VTC/ T
( )
RFB
RTC
1
NPS
= VF/ T
( )
Selecting Actual RREF, RFB, RTC Resistor Values
The LT8302 uses a unique sampling scheme to regulate
the isolated output voltage. Due to the sampling nature,
the scheme contains repeatable delays and error sources,
which will affect the output voltage and force a re-evaluation
of the RFB and RTC resistor values. Therefore, a simple
2-step sequential process is recommended for selecting
resistor values.
Rearrangement of the expression for VOUT in the previous
sections yields the starting value for RFB:
RFB =RREF NPS VOUT +VFTO
V
VOUT = Output voltage
VF (TO) = Output diode forward voltage at 25°C = ~0.3V
NPS = Transformer effective primary-to-secondary
turns ratio
The equation shows that the RFB resistor value is indepen-
dent of the RTC resistor value. Any RTC resistor connected
between the TC and RREF pins has no effect on the output
voltage setting at 25°C because the TC pin voltage is equal
to the RREF regulation voltage at 25°C.
The RREF resistor value should be approximately 10k
because the LT8302 is trimmed and specified using this
value. If the RREF resistor value varies considerably from
10k, additional errors will result. However, a variation in
RREF up to 10% is acceptable. This yields a bit of freedom
in selecting standard 1% resistor values to yield nominal
RFB/RREF ratios.
First, build and power up the application with the starting
RREF, RFB values (no RTC resistor yet) and other compo-
nents connected, and measure the regulated output volt-
age, VOUT(MEAS). The new RFB value can be adjusted to:
RFB(NEW) =
V
OUT
VOUT(MEAS)
RFB
Second, with a new RFB resistor value selected, the output
diode temperature coefficient in the application can be
tested to determine the RTC value. Still without the RTC
resistor, the VOUT should be measured over temperature
at a desired target output load. It is very important for
this evaluation that uniform temperature be applied to
both the output diode and the LT8302. If freeze spray or
a heat gun is used, there can be a significant mismatch
in temperature between the two devices that causes sig-
nificant error. Attempting to extrapolate the data from a
diode data sheet is another option if there is no method
to apply uniform heating or cooling such as an oven. With
at least two data points spreading across the operating
temperature range, the output diode temperature coef-
ficient can be determined by:
δVF/δT
( )
=
OUT
OUT
Using the measured output diode temperature coefficient,
an exact RTC value can be selected with the following
equation:
RTC =δVTC/δT
( )
δVF/δT
( )
RFB
NPS
Once the RREF, RFB, and RTC values are selected, the regula-
tion accuracy from board to board for a given application
will be very consistent, typically under ±5% when includ-
ing device variation of all the components in the system
(assuming resistor tolerances and transformer windings
matching within ±1%). However, if the transformer or
the output diode is changed, or the layout is dramatically
altered, there may be some change in VOUT.
LT8302
13
8302fa
For more information www.linear.com/LT8302
applicaTions inForMaTion
Output Power
A flyback converter has a complicated relationship between
the input and output currents compared to a buck or a
boost converter. A boost converter has a relatively constant
maximum input current regardless of input voltage and a
buck converter has a relatively constant maximum output
current regardless of input voltage. This is due to the
continuous non-switching behavior of the two currents. A
flyback converter has both discontinuous input and output
currents which make it similar to a nonisolated buck-boost
converter. The duty cycle will affect the input and output
currents, making it hard to predict output power. In ad-
dition, the winding ratio can be changed to multiply the
output current at the expense of a higher switch voltage.
The graphs in Figures 1 to 4 show the typical maximum
output power possible for the output voltages 3.3V, 5V,
12V, and 24V. The maximum output power curve is the
calculated output power if the switch voltage is 50V dur-
ing the switch-off time. 15V of margin is left for leakage
inductance voltage spike. To achieve this power level at
a given input, a winding ratio value must be calculated
to stress the switch to 50V, resulting in some odd ratio
values. The curves below the maximum output power
curve are examples of common winding ratio values and
the amount of output power at given input voltages.
One design example would be a 5V output converter with
a minimum input voltage of 8V and a maximum input volt-
age of 32V. A three-to-one winding ratio fits this design
example perfectly and outputs equal to 15.3W at 32V but
lowers to 7.7W at 8V.
Figure 1. Output Power for 3.3V Output
Figure 2. Output Power for 5V Output
Figure 3. Output Power for 12V Output
Figure 4. Output Power for 24V Output
INPUT VOLTAGE (V)
0
OUTPUT POWER (W)
10
15
40
8302 F02
5
010 20 30
MAXIMUM
OUTPUT POWER
20
N = 3:1
N = 1:1
N = 4:1
N = 2:1
INPUT VOLTAGE (V)
0
OUTPUT POWER (W)
10
15
40
8302 F03
5
010 20 30
N = 1:1
MAXIMUM
OUTPUT POWER
20
N = 3:2
N = 1:2
N = 2:1
INPUT VOLTAGE (V)
0
OUTPUT POWER (W)
10
15
40
8302 F04
5
010 20 30
N = 1:2
MAXIMUM
OUTPUT POWER
20
N = 2:3
N = 1:3
N = 1:1
INPUT VOLTAGE (V)
0
OUTPUT POWER (W)
10
15
40
8302 F01
5
010 20 30
N = 6:1
MAXIMUM
OUTPUT POWER
20
N = 4:1
N = 2:1
N = 3:1
LT8302
14
8302fa
For more information www.linear.com/LT8302
applicaTions inForMaTion
The equations below calculate output power:
POUT = ηVINDISW(MAX) • 0.5
η = Efficiency = ~85%
D=Duty Cycle =VOUT +VF
( )
NPS
VOUT +VF
( )
NPS +VIN
ISW(MAX) = Maximum switch current limit = 3.6A (MIN)
Primary Inductance Requirement
The LT8302 obtains output voltage information from the
reflected output voltage on the SW pin. The conduction
of secondary current reflects the output voltage on the
primary SW pin. The sample-and-hold error amplifier needs
a minimum 350ns to settle and sample the reflected output
voltage. In order to ensure proper sampling, the second-
ary winding needs to conduct current for a minimum of
350ns. The following equation gives the minimum value
for primary-side magnetizing inductance:
LPRI tOFF(MIN) NPS VOUT +VF
ISW(MIN)
tOFF(MIN) = Minimum switch-off time = 350ns (TYP)
ISW(MIN) = Minimum switch current limit = 0.87A (TYP)
In addition to the primary inductance requirement for
the minimum switch-off time, the LT8302 has minimum
switch-on time that prevents the chip from turning on
the power switch shorter than approximately 160ns. This
minimum switch-on time is mainly for leading-edge blank-
ing the initial switch turn-on current spike. If the inductor
current exceeds the desired current limit during that time,
oscillation may occur at the output as the current control
loop will lose its ability to regulate. Therefore, the following
equation relating to maximum input voltage must also be
followed in selecting primary-side magnetizing inductance:
LPRI
t
ON(MIN)
V
IN(MAX)
ISW(MIN)
tON(MIN) = Minimum switch-on time = 160ns (TYP)
In general, choose a transformer with its primary mag-
netizing inductance about 40% to 60% larger than the
minimum values calculated above. A transformer with
much larger inductance will have a bigger physical size
and may cause instability at light load.
Selecting a Transformer
Transformer specification and design is perhaps the most
critical part of successfully applying the LT8302. In addition
to the usual list of guidelines dealing with high frequency
isolated power supply transformer design, the following
information should be carefully considered.
Linear Technology has worked with several leading mag-
netic component manufacturers to produce pre-designed
flyback transformers for use with the LT8302. Table 1
shows the details of these transformers.
Table 1. Predesigned Transformers–Typical Specifications
TRANSFORMER
PART NUMBER
DIMENSIONS
(W × L × H) (mm)
LPRI
(µH)
LLKG
(µH) NP:NS
RPRI
(mΩ)
RSEC
(mΩ) VENDOR
TARGET APPLICATION
VIN (V) VOUT (V) IOUT (A)
750311625 17.75 × 13.46 × 12.70 9 0.35 4:1 43 6 Würth Elektronik 8 to 32 3.3 2.1
750311564 17.75 × 13.46 × 12.70 9 0.12 3:1 36 7 Würth Elektronik 8 to 32 5 1.5
750313441 15.24 × 13.34 x 11.43 9 0.6 2:1 75 18 Würth Elektronik 8 to 32 5 1.3
750311624 17.75 × 13.46 × 12.70 9 0.18 3:2 34 21 Würth Elektronik 8 to 32 8 0.9
750313443 15.24 × 13.34 × 11.43 9 0.3 1:1:1 85 100 Würth Elektronik 8 to 36 ±12 0.3
750313445 15.24 × 13.34 × 11.43 9 0.25 1:2 85 190 Würth Elektronik 8 to 36 24 0.3
750313457 15.24 × 13.34 × 11.43 9 0.25 1:4 85 770 Würth Elektronik 8 to 36 48 0.15
750313460 15.24 × 13.34 × 11.43 12 0.7 4:1 85 11 Würth Elektronik 4 to 18 5 0.9
750311342 15.24 × 13.34 × 11.43 15 0.44 2:1 85 22 Würth Elektronik 4 to 18 12 0.4
750313439 15.24 × 13.34 × 11.43 12 0.6 2:1 115 28 Würth Elektronik 18 to 42 3.3 2.1
750313442 15.24 × 13.34 × 11.43 12 0.75 3:2 150 53 Würth Elektronik 18 to 42 5 1.6
LT8302
15
8302fa
For more information www.linear.com/LT8302
applicaTions inForMaTion
Turns Ratio
Note that when choosing an RFB/RREF resistor ratio to set
output voltage, the user has relative freedom in selecting
a transformer turns ratio to suit a given application. In
contrast, the use of simple ratios of small integers, e.g.,
3:1, 2:1, 1:1, etc., provides more freedom in settling total
turns and mutual inductance.
Typically, choose the transformer turns ratio to maximize
available output power. For low output voltages (3.3V
or 5V), a N:1 turns ratio can be used with multiple pri-
mary windings relative to the secondary to maximize the
transformer’s current gain (and output power). However,
remember that the SW pin sees a voltage that is equal
to the maximum input supply voltage plus the output
voltage multiplied by the turns ratio. In addition, leakage
inductance will cause a voltage spike (VLEAKAGE) on top of
this reflected voltage. This total quantity needs to remain
below the 65V absolute maximum rating of the SW pin to
prevent breakdown of the internal power switch. Together
these conditions place an upper limit on the turns ratio,
NPS, for a given application. Choose a turns ratio low
enough to ensure
NPS <
65V V
IN(MAX)
V
LEAKAGE
V
OUT
+V
F
For larger N:1 values, choose a transformer with a larger
physical size to deliver additional current. In addition,
choose a large enough inductance value to ensure that
the switch-off time is long enough to accurately sample
the output voltage.
For lower output power levels, choose a 1:1 or 1:N trans-
former for the absolute smallest transformer size. A 1:N
transformer will minimize the magnetizing inductance
(and minimize size), but will also limit the available output
power. A higher 1:N turns ratio makes it possible to have
very high output voltages without exceeding the breakdown
voltage of the internal power switch.
The turns ratio is an important element in the isolated
feedback scheme, and directly affects the output voltage
accuracy. Make sure the transformer manufacturer speci-
fies turns ratio accuracy within ±1%.
Saturation Current
The current in the transformer windings should not exceed
its rated saturation current. Energy injected once the core is
saturated will not be transferred to the secondary and will
instead be dissipated in the core. When designing custom
transformers to be used with the LT8302, the saturation
current should always be specified by the transformer
manufacturers.
Winding Resistance
Resistance in either the primary or secondary windings
will reduce overall power efficiency. Good output voltage
regulation will be maintained independent of winding re-
sistance due to the boundary/discontinuous conduction
mode operation of the LT8302.
Leakage Inductance and Snubbers
T
ransformer leakage inductance on either the primary or
secondary causes a voltage spike to appear on the primary
after the power switch turns off. This spike is increasingly
prominent at higher load currents where more stored en-
ergy must be dissipated. It is very important to minimize
transformer leakage inductance.
When designing an application, adequate margin should
be kept for the worst-case leakage voltage spikes even
under overload conditions. In most cases shown in Fig-
ure5, the reflected output voltage on the primary plus VIN
should be kept below 50V. This leaves at least 15V margin
for the leakage spike across line and load conditions. A
larger voltage margin will be required for poorly wound
transformers or for excessive leakage inductance.
LT8302
16
8302fa
For more information www.linear.com/LT8302
applicaTions inForMaTion
tOFF > 350ns
VLEAKAGE
VSW
<65V
<50V
TIME 8302 F05
tSP < 250ns
Figure 5. Maximum Voltages for SW Pin Flyback Waveform
In addition to the voltage spikes, the leakage inductance
also causes the SW pin ringing for a while after the power
switch turns off. To prevent the voltage ringing falsely trig-
ger boundary mode detector, the LT8302 internally blanks
the boundary mode detector for approximately 250ns.
Any remaining voltage ringing after 250ns may turn the
power switch back on again before the secondary current
falls to zero. In this case, the LT8302 enters continuous
conduction mode. So the leakage inductance spike ringing
should be limited to less than 250ns.
To clamp and damp the leakage voltage spikes, a
(RC + DZ) snubber circuit in Figure6 is recommended.
The RC (resistor-capacitor) snubber quickly damps the
voltage spike ringing and provides great load regulation
and EMI performance. And the DZ (diode-Zener) ensures
well defined and consistent clamping voltage to protect
SW pin from exceeding its 65V absolute maximum rating.
Figure 6. (RC + DZ) Snubber Circuit
8302 F06
R
CZ
D
L
then add capacitance until the period of the ringing is 1.5
to 2 times longer. The change in period determines the
value of the parasitic capacitance, from which the para-
sitic inductance can be also determined from the initial
period. Once the value of the SW node capacitance and
inductance is known, a series resistor can be added to
the snubber capacitance to dissipate power and critically
damp the ringing. The equation for deriving the optimal
series resistance using the observed periods ( tPERIOD and
tPERIOD(SNUBBED)) and snubber capacitance (CSNUBBER) is:
CPAR =
C
SNUBBER
tPERIOD(SNUBBED)
tPERIOD
2
1
LPAR =tPERIOD2
CPAR 4π2
RSNUBBER =LPAR
CPAR
Note that energy absorbed by the RC snubber will be
converted to heat and will not be delivered to the load.
In high voltage or high current applications, the snubber
needs to be sized for thermal dissipation. A 470pF capaci-
tor in series with a 39Ω resistor is a good starting point.
For the DZ snubber, proper care should be taken when
choosing both the diode and the Zener diode. Schottky
diodes are typically the best choice, but some PN diodes
can be used if they turn on fast enough to limit the leak-
age inductance spike. Choose a diode that has a reverse-
voltage rating higher than the maximum SW pin voltage.
The Zener diode breakdown voltage should be chosen to
balance power loss and switch voltage protection. The best
compromise is to choose the largest voltage breakdown
with 5V margin. Use the following equation to make the
proper choice:
VZENNER(MAX) ≤ 60V – VIN(MAX)
For an application with a maximum input voltage of 32V,
choose a 24V Zener diode, the VZENER(MAX) of which is
around 26V and below the 28V maximum. The power loss
in the DZ snubber determines the power rating of the Zener
diode. A 1.5W Zener diode is typically recommended.
The recommended approach for designing an RC snub-
ber is to measure the period of the ringing on the SW pin
when the power switch turns off without the snubber and
LT8302
17
8302fa
For more information www.linear.com/LT8302
applicaTions inForMaTion
Undervoltage Lockout (UVLO)
A resistive divider from VIN to the EN/UVLO pin imple-
ments undervoltage lockout (UVLO). The EN/UVLO enable
falling threshold is set at 1.214V with 14mV hysteresis. In
addition, the EN/UVLO pin sinks 2.5µA when the voltage
on the pin is below 1.214V. This current provides user
programmable hysteresis based on the value of R1. The
programmable UVLO thresholds are:
VIN(UVLO+)=1.228V R1+R2
( )
R2 +2.5µA R
1
VIN(UVLO)=1.214V R1+R2
( )
R2
Figure 7 shows the implementation of external shutdown
control while still using the UVLO function. The NMOS
grounds the EN/UVLO pin when turned on, and puts the
LT8302 in shutdown with quiescent current less than 2µA.
LT8302
GND
EN/UVLO
R1
RUN/STOP
CONTROL
(OPTIONAL)
R2
VIN
8302 F07
Figure 7. Undervoltage Lockout (UVLO)
Minimum Load Requirement
The LT8302 samples the isolated output voltage from
the primary-side flyback pulse waveform. The flyback
pulse occurs once the primary switch turns off and the
secondary winding conducts current. In order to sample
the output voltage, the LT8302 has to turn on and off for a
minimum amount of time and with a minimum frequency.
The LT8302 delivers a minimum amount of energy even
during light load conditions to ensure accurate output volt-
age information. The minimum energy delivery creates a
minimum load requirement, which can be approximately
estimated as:
ILOAD(MIN) =
L
P
2
RI
I
SW(MIN)
f
MIN
2VOUT
LPRI = Transformer primary inductance
ISW(MIN) = Minimum switch current limit = 0.96A (MAX)
fMIN = Minimum switching frequency = 12.7kHz (MAX)
The LT8302 typically needs less than 0.5% of its full output
power as minimum load. Alternatively, a Zener diode with
its breakdown of 10% higher than the output voltage can
serve as a minimum load if pre-loading is not acceptable.
For a 5V output, use a 5.6V Zener with cathode connected
to the output.
Output Short Protection
When the output is heavily overloaded or shorted to ground,
the reflected SW pin waveform rings longer than the in-
ternal blanking time. After the 350ns minimum switch-off
time, the excessive ringing falsely triggers the boundary
mode detector and turns the power switch back on again
before the secondary current falls to zero. Under this
condition, the LT8302 runs into continuous conduction
mode at 380kHz maximum switching frequency. If the
sampled RREF voltage is still less than 0.6V after 11ms
(typ) soft-start timer, the LT8302 initiates a new soft-start
cycle. If the sampled RREF voltage is larger than 0.6V after
11ms, the switch current may run away and exceed the
4.5A maximum current limit. Once the switch current hits
7.2A over current limit, the LT8302 also initiates a new
soft-start cycle. Under either condition, the new soft-start
cycle throttles back both the switch current limit and switch
frequency. The output short-circuit protection prevents the
switch current from running away and limits the average
output diode current.
LT8302
18
8302fa
For more information www.linear.com/LT8302
applicaTions inForMaTion
Design Example
Use the following design example as a guide to designing
applications for the LT8302. The design example involves
designing a 5V output with a 1.5A load current and an
input range from 8V to 32V.
VIN(MIN) = 8V, VIN(NOM) = 12V, VIN(MAX) = 32V,
VOUT = 5V, IOUT = 1.5A
Step 1: Select the transformer turns ratio.
NPS <
65V V
IN(MAX)
V
LEAKAGE
VOUT +V
F
VLEAKAGE = Margin for transformer leakage spike = 15V
VF = Output diode forward voltage = ~0.3V
Example:
NPS <
65V 32V 15V
5V +0.3V
=3.4
The choice of transformer turns ratio is critical in determin-
ing output current capability of the converter. Table2 shows
the switch voltage stress and output current capability at
different transformer turns ratio.
Table 2. Switch Voltage Stress and Output Current Capability vs
Turns Ratio
NPS
VSW(MAX) at
VIN(MAX) (V)
IOUT(MAX) at
VIN(MIN) (A) DUTY CYCLE (%)
1:1 37.3 0.92 14-40
2:1 42.6 1.31 25-57
3:1 47.9 1.53 33-67
Clearly, only NPS = 3 can meet the 1.5A output current
requirement, so NPS = 3 is chosen as the turns ratio in
this example.
Step 2: Determine the primary inductance.
Primary inductance for the transformer must be set above
a minimum value to satisfy the minimum switch-off and
switch-on time requirements:
LPRI tOFF(MIN) NPS VOUT +V
F
( )
ISW(MIN)
LPRI tON(MIN) V
IN(MAX)
ISW(MIN)
tOFF(MIN) = 350ns
tON(MIN) = 160ns
ISW(MIN) = 0.87A
Example:
LPRI 350ns 35V +0.3V
( )
0.87A =6.4µH
LPRI 160ns 32V
0.87A
=5.9µH
Most transformers specify primary inductance with a toler-
ance of ±20%. With other component tolerance considered,
choose a transformer with its primary inductance 40% to
60% larger than the minimum values calculated above.
LPRI = 9µH is then chosen in this example.
Once the primary inductance has been determined, the
maximum load switching frequency can be calculated as:
fSW =
1
tON +tOFF
=
1
LPRI ISW
V
IN
+LPRI ISW
NPS VOUT +VF
( )
ISW =VOUT IOUT 2
ηV
IN
D
LT8302
19
8302fa
For more information www.linear.com/LT8302
applicaTions inForMaTion
Example:
D=
5V +0.3V
( )
3
5V +0.3V
( )
3+12V =0.57
ISW =5V 1.5A 2
0.8 12V 0.57
f
SW
=277kHz
The transformer also needs to be rated for the correct
saturation current level across line and load conditions.
A saturation current rating larger than 7A is necessary
to work with the LT8302. The 750311564 from Würth is
chosen as the flyback transformer.
Step 3: Choose the output diode.
Tw o main criteria for choosing the output diode include
forward current rating and reverse-voltage rating. The
maximum load requirement is a good first-order guess
at the average current requirement for the output diode.
Under output short-circuit condition, the output diode
needs to conduct much higher current. Therefore, a con-
servative metric is 60% of the maximum switch current
limit multiplied by the turns ratio:
IDIODE(MAX) = 0.6 • ISW(MAX)NPS
Example:
IDIODE(MAX) = 8.1A
Next calculate reverse voltage requirement using maxi-
mum VIN:
V
REVERSE =VOUT +
V
IN(MAX)
N
PS
Example:
V
REVERSE =5V +
32V
3
=15.7V
The PDS835L (8A, 35V diode) from Diodes Inc. is chosen.
Step 4: Choose the output capacitor.
The output capacitor should be chosen to minimize the
output voltage ripple while considering the increase in size
and cost of a larger capacitor. Use the following equation
to calculate the output capacitance:
COUT =
L
PRI
I
SW
2
2VOUT ΔVOUT
Example:
Design for output voltage ripple less than ±1% of VOUT,
i.e., 100mV.
COUT =9µH 4.5A
( )
2
25V 0.1V
=182µF
Remember ceramic capacitors lose capacitance with ap-
plied voltage. The capacitance can drop to 40% of quoted
capacitance at the maximum voltage rating. So a 220µF,
6.3V rating ceramic capacitor is chosen.
Step 5: Design snubber circuit.
The snubber circuit protects the power switch from leak-
age inductance voltage spike. A (RC + DZ) snubber is
recommended for this application. A 470pF capacitor in
series with a 39Ω resistor is chosen as the RC snubber.
The maximum Zener breakdown voltage is set according
to the maximum VIN:
VZENNER(MAX) ≤ 60V – VIN(MAX)
Example:
VZENNER(MAX) ≤ 60V – 32V = 28V
A 24V Zener with a maximum of 26V will provide optimal
protection and minimize power loss. So a 24V, 1.5W Zener
from Central Semiconductor (CMZ5934B) is chosen.
Choose a diode that is fast and has sufficient reverse
voltage breakdown:
VREVERSE > VSW(MAX)
VSW(MAX) = VIN(MAX) + VZENNER(MAX)
Example:
VREVERSE > 60V
A 100V, 1A diode from Diodes Inc. (DFLS1100) is chosen.
LT8302
20
8302fa
For more information www.linear.com/LT8302
applicaTions inForMaTion
Step 6: Select the RREF and RFB resistors.
Use the following equation to calculate the starting values
for RREF and RFB:
RFB =RREF NPS VOUT +V
FTO
( )
( )
V
REF
R
REF
=10k
Example:
RFB =
10k 35V +0.3V
( )
1.00V
=159k
For 1% standard values, a 158k resistor is chosen.
Step 7: Adjust RFB resistor based on output voltage.
Build and power up the application with application com-
ponents and measure the regulated output voltage. Adjust
RFB resistor based on the measured output voltage:
RFB(NEW) =
V
OUT
VOUT(MEASURED)
RFB
Example:
RFB =
5V
5.14V
158k =154k
Step 8: Select RTC resistor based on output voltage
temperature variation.
Measure output voltage in a controlled temperature envi-
ronment like an oven to determine the output temperature
coefficient. Measure output voltage at a consistent load
current and input voltage, across the operating tempera-
ture range.
Calculate the temperature coefficient of VF:
δV
F/δT
( )
=
V
OUT
T1
( )
V
OUT
T2
( )
T1 T2
RTC =3.35mV/°C
δV
F/δT
( )
RFB
NPS
Example:
δV
F/δT
( )
=
5.189V 5.041V
100°C 0°C
( )
=1.48mV / °C
RTC =3.35mV/°C
1.48mV/°C154
3
=115k
Step 9: Select the EN/UVLO resistors.
Determine the amount of hysteresis required and calculate
R1 resistor value:
VIN(HYS) = 2.5µAR1
Example:
Choose 2V of hysteresis, R1 = 806k
Determine the UVLO thresholds and calculate R2 resistor
value:
V
IN(UVLO+)=
1.228V R1+R2
( )
R2
+2.5µA R
1
Example:
Set VIN UVLO rising threshold to 7.5V:
R2 = 232k
VIN(UVLO+) = 7.5V
VIN(UNLO) = 5.5V
Step 10: Ensure minimum load.
The theoretical minimum load can be approximately
estimated as:
ILOAD(MIN) =9µH 0.96A
( )
212.7kHz
25V
=10.5mA
Remember to check the minimum load requirement in
real application. The minimum load occurs at the point
where the output voltage begins to climb up as the con-
verter delivers more energy than what is consumed at
the output. The real minimum load for this application is
about 10mA. In this example, a 500Ω resistor is selected
as the minimum load.
LT8302
21
8302fa
For more information www.linear.com/LT8302
Typical applicaTions
8V to 32VIN/12VOUT Isolated Flyback Converter
8V to 32VIN/3.3VOUT Isolated Flyback Converter
Efficiency vs Load Current Load and Line Regulation
AMBIENT TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
3.30
3.40
150
8302 TA03b
3.20
3.10 050 100
–25 25 75 125
3.50
3.25
3.35
3.15
3.45
RTC = 105k
RTC = OPEN
VIN = 12V
IOUT = 1A
Output Temperature Variation
LOAD CURRENT (mA)
0
65
EFFICIENCY (%)
70
75
80
85
90
95
200 400 600 800 1000
8302 TA02b
1200
VIN = 12V
VIN = 24V
LOAD CURRENT (mA)
0
11.2
OUTPUT VOLTAGE (V)
11.4
11.6
11.8
12.0
12.2
12.4
200 400 600 800 1000 1200
8302 TA02c
VIN = 12V
VIN = 24V
VIN
LT8302
SW
9µH
VIN
8V TO 32V
T1
1:1
9µH
RFB
RREF
C3
470pF
Z1
D1
D2
C1
10µF
C2
F
C4
47µF
VOUT+
12V
5mA TO 0.8A (VIN = 12V)
5mA TO 1.1A (VIN = 24V)
VOUT
R3
39Ω
R4
121k
R6
OPEN
R2
232k
R1
806k
R5
10k
D1: DIODES DFLS1100
D2: DIODES PDS540
T1: WURTH 750313443
Z1: CENTRAL CMZ5934B
8302 TA02a
TC
EN/UVLO
GND
INTVCC
VIN
LT8302
SW
9µH
VIN
8V TO 32V
T1
4:1
0.56µH
RFB
RREF
C3
470pF
Z1
D1
D2
C1
10µF
C2
F
C4
470µF
VOUT+
3.3V
20mA TO 2.7A (VIN = 12V)
20mA TO 3.8A (VIN = 24V)
VOUT
R3
39Ω
R4
140k
R6
105k
R2
232k
R1
806k
R5
10k
D1: DIODES DFLS1100
D2: DIODES PDS1040L
T1: WURTH 750311625
Z1: CENTRAL CMZ5934B
8302 TA03
TC
EN/UVLO
GND
INTVCC
LT8302
22
8302fa
For more information www.linear.com/LT8302
Typical applicaTions
8V to 36VIN/±12VOUT Isolated Flyback Converter
8V to 36VIN/24VOUT Isolated Flyback Converter
8V to 36VIN/48VOUT Isolated Flyback Converter
VIN
LT8302
SW
9µH
VIN
8V TO 36V
T1
1:1:1
9µH
RFB
RREF
C3
470pF
Z1
D1
D2
C1
10µF
C2
F
C4
22µF
VOUT1+
12V
5mA TO 0.4A (VIN = 12V)
5mA TO 0.55A (VIN = 24V)
VOUT2
R3
39Ω
R4
121k
R6
OPEN
R2
232k
R1
806k
R5
10k
D1: DIODES DFLS1100
D2, D3: DIODES PDS360
T1: WURTH 750313443
Z1: CENTRAL CMZ5934B
8302 TA04
TC
9µH
D3
C5
22µF
VOUT2+
12V
5mA TO 0.4A (VIN = 12V)
5mA TO 0.55A (VIN = 24V)
VOUT2
EN/UVLO
GND
INTVCC
VIN
LT8302
SW
9µH
VIN
8V TO 36V
T1
1:2
36µH
RFB
RREF
C3
470pF
Z1
D1
D2
C1
10µF
C2
F
C4
10µF
VOUT+
24V
2.5mA TO 0.4A (VIN = 12V)
2.5mA TO 0.55A (VIN = 24V)
VOUT
R3
39Ω
R4
121k
R6
OPEN
R2
232k
R1
806k
R5
10k
D1: DIODES DFLS1100
D2: DIODES SBR2U150SA
T1: WURTH 750313445
Z1: CENTRAL CMZ5934B
8302 TA05
TC
EN/UVLO
GND
INTVCC
VIN
LT8302
SW
9µH
VIN
8V TO 36V
T1
1:4
144µH
RFB
RREF
C3
470pF
Z1
D1
D2
C1
10µF
C2
F
C4
2.2µF
VOUT+
48V
1.2mA TO 0.2A (VIN = 12V)
1.2mA TO 0.27A (VIN = 24V)
VOUT
R3
39Ω
R4
121k
R6
OPEN
R2
232k
R1
806k
R5
10k
D1: DIODES DFLS1100
D2: DIODES SBR1U200P1
T1: WURTH 750313457
Z1: CENTRAL CMZ5934B
8302 TA06
TC
EN/UVLO
GND
INTVCC
LT8302
23
8302fa
For more information www.linear.com/LT8302
Typical applicaTions
VIN
LT8302
SW
9µH
VIN
8V TO 32V
T1
3:1
H
RFB
RREF
C3
470pF
Z1
D1 D2
C1
10µF
C2
F
C4
220µF
C4
10µF
C5
4.7µF
VOUT+
5V/1.1A (VIN = 5V)
5V/2.0A (VIN = 12V)
5V/2.9A (VIN = 24V)
VOUT
R3
39Ω R7
VCC
DRAIN
LT8309
GATE INTVCC
M1
GND
R4
154k
R6
OPEN
R2
232k
R1
806k
R8
2.1k
R5
10k
D1: DIODES DFLS1100
D2: CENTRAL CMMSH1-60
M1: INFINEON BSC059N04LS
T1: WURTH 750311564
Z1: CENTRAL CMZ5934B
8302 TA07
TC
EN/UVLO
GND
INTVCC
LOAD CURRENT (A)
0
EFFICIENCY (%)
85
90
95
1.5 2.5
8302 TA07b
80
75
0.5 1.0 2.0 3.0
70
65
8V to 32VIN/5VOUT Isolated Flyback Converter with LT8309
–4V to –42VIN/12VOUT Buck-Boost Converter
–18V to –42VIN/–12VOUT Negative Buck Converter
Efficiency vs Load Current
Efficiency vs Load Current
Efficiency vs Load Current
VIN SW
LT8302
L1
12µH D1
Z1
GND
RFB
RREF
EN/UVLO
C3
47µF
D1: DIODES PMEG6030EP
L1: WÜRTH 744770112
Z1: CENTRAL CMHZ5243B
C2
F
VIN
–4V TO –42V
C1
10µF
R5
10k
8302 TA08a
VOUT
12V/0.45A (VIN = –5V)
12V/0.8A (VIN = –12V)
12V/1.1A (VIN = –24V)
12V/1.3A (VIN = –42V)
R4
118k
INTVCC
LOAD CURRENT (mA)
0
65
EFFICIENCY (%)
70
75
80
85
90
95
200 400 800600 1000 1200 1400
8302 TA08b
VIN = –5V
VIN = –12V
VIN = –24V
VIN = –42V
VIN
LT8302
L1
12µH
VOUT
–12V
1.8A
D1 Z1
SW
RREF
EN/UVLO
RFB
EN/UVLO D1: DIODES PMEG6030EP
L1: WÜRTH 744770112
Z1: CENTRAL CMHZ5243B
C2
F
VIN
–18V TO –42V
C1
10µF
C3
47µF
R5
10k
8302 TA09a
R4
118k
R2
232k
R1
806k
INTVCC
LOAD CURRENT (mA)
0
70
EFFICIENCY (%)
75
80
85
90
95
100
500 1000 1500 2000
8302 TA09b
VIN = –18V
VIN = –24V
VIN = –42V
LT8302
24
8302fa
For more information www.linear.com/LT8302
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
S8E 1013 REV A
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.080 – .098
(2.032 – 2.489)
.118 – .138
(2.997 – 3.505)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
87
.005 (0.13) MAX
65
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.160 ±.005
(4.06 ±0.127)
.118
(2.99)
REF
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
(1.143 ±0.127)
.050
(1.27)
BSC
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
S8E Package
8-Lead Plastic SOIC (Narrow .150 Inch) Exposed Pad
(Reference LTC DWG # 05-08-1857 Rev A)
.089
(2.26)
REF
.030 ±.005
(0.76 ±0.127)
TYP
.245
(6.22)
MIN
LT8302
25
8302fa
For more information www.linear.com/LT8302
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 11/14 Modified IQ and IHYS Conditions
Modified LPRI Equation
Modified Schematic
Updated Related Parts
3
14
23
26
LT8302
26
8302fa
For more information www.linear.com/LT8302
LINEAR TECHNOLOGY CORPORATION 2013
LT 1114 REV A • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com/LT8302
relaTeD parTs
Typical applicaTion
4V to 42VIN/48VOUT Boost Converter
Efficiency vs Load Current
VIN SW
LT8302
L1
22µH D1
Z1
GND
RFB
RREF
EN/UVLO C3
10µF
D1: DIODES PDS560
L1: WÜRTH 7443551221
Z1: CENTRAL CMHZ5262B
C2
F
VIN
4V TO 42V
C1
10µF
R5
10k
8302 TA10a
VOUT
48V/1.4A (VIN = 42V)
48V/0.8A (VIN = 24V)
48V/0.4A (VIN = 12V)
48V/0.15A (VIN = 5V)
R4
464k
R3
1M
INTVCC
LOAD CURRENT (mA)
0
70
EFFICIENCY (%)
75
80
85
90
100
250 500
8302 TA10b
1500750 1000 1250
95
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 42V
PART NUMBER DESCRIPTION COMMENTS
LT8301 42VIN Micropower Isolated Flyback Converter with 65V/1.2A
Switch Low IQ Monolithic No-Opto Flyback 5-Lead TSOT-23
LT8300 100VIN Micropower Isolated Flyback Converter with
150V/260mA Switch Low IQ Monolithic No-Opto Flyback, 5-Lead TSOT-23
LT8309 Secondary-Side Synchronous Rectifier Driver 4.5V ≤ VCC ≤ 40V, Fast Turn-On and Turn-Off, 5-Lead TSOT-23
LT3573/LT3574
LT3575 40V Isolated Flyback Converters Monolithic No-Opto Flybacks with Integrated 1.25A/0.65A/2.5A
Switch
LT3511/LT3512 100V Isolated Flyback Converters Monolithic No-Opto Flybacks with Integrated 240mA/420mA
Switch, MSOP-16(12)
LT3748 100V Isolated Flyback Controller 5V ≤ VIN ≤ 100V, No-Opto Flyback, MSOP-16(12)
LT3798 Off-Line Isolated No-Opto Flyback Controller with Active PFC VIN and VOUT Limited Only by External Components
LT3757A/LT3759
LT3758 40V/100V Flyback/Boost Controllers Universal Controllers with Small Package and Powerful Gate Drive
LT3957/LT3958 40V/80V Boost/Flyback Converters Monolithic with Integrated 5A/3.3A Switch