74LVC2G07GN,132 - NXP - searchdatasheet.com

1. General description

The 74LVC2G07 provides two non-inverting buffers.

The output of this device is an open drain and can be connected to other open-drain

outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this

device in a mixed 3.3 V and 5 V environment.

Schmitt trigger action at all inputs makes the circuit toler ant for slower input rise and fall

time.

This device is fully specified for partial power-down applications using IOFF. The IOFF

circuitry disables the outpu t, preventing the damaging ba ckflow current through the device

when it is powered down.

2. Features and benefits

Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant input/output for interfacing with 5 V logic

High noise immunity

Complies with JEDEC standard:

JESD8-7 (1.65 V to 1.95 V)

JESD8-5 (2.3 V to 2.7 V)

JESD8-B/JESD36 (2.7 V to 3.6 V)

ESD protection:

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115 -A ex ce ed s 200 V

−24 mA output drive (VCC =3.0V)

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Inputs accept voltages up to 5 V

Multiple package options

Specified from −40 °C to +85 °C and −40 °C to +125 °C

74LVC2G07

Buffers with open-drain outputs

Rev. 5 — 6 August 2010 Product data sheet

Product data sheet Rev. 5 — 6 August 2010 2 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

3. Ordering information

4. Marking

[1] The pin 1 indicator is located on the lo wer left corner of the device, below the marking code.

5. Functional diagram

Table 1. Ordering information

Type number Package

Temperatur e range Name Description Version

74LVC2G07GW −40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363

74LVC2G07GV −40 °C to +125 °C TSOP6 plastic surface-mounted package (TSOP6); 6 leads SOT457

74LVC2G07GM −40 °C to +125 °C XSON6 plastic extremely thin small outline package;

no leads; 6 terminals; body 1 ×1.45 ×0.5 mm SOT886

74LVC2G07GF −40 °C to +125 °C XSON6 plastic extremely thin small outline package;

no leads; 6 terminals; body 1 ×1×0.5 mm SOT891

74LVC2G07GN −40 °C to +125 °C XSON6 extremely thin small outline package; no leads;

6 terminals; body 0.9 ×1.0 ×0.35 mm SOT1115

74LVC2G07GS −40 °C to +125 °C XSON6 extremely thin small outline package; no leads;

6 terminals; body 1.0 ×1.0 ×0.35 mm SOT1202

Table 2. Marking

Type number Marking code[1]

74LVC2G07GW V7

74LVC2G07GV V07

74LVC2G07GM V7

74LVC2G07GF V7

74LVC2G07GN V7

74LVC2G07GS V7

Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one driver)

mnb092

1A 1Y

2A 2Y

1A 1Y

mnb093

2A 2Y

mna59

GND

Product data sheet Rev. 5 — 6 August 2010 3 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

6. Pinning information

6.1 Pinning

6.2 Pin description

7. Functional description

[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.

Fig 4. Pin configuration SOT363

and SOT457 Fig 5. Pin co nfiguration SOT886 Fig 6. Pin configuration SOT891,

SOT111 5 and SOT1202

74LVC2G07

1A 1Y

GND

2A 2Y

001aab670

74LVC2G07

GND

001aab671

VCC

Transparent top view

674LVC2G07

GND

001aag423

VCC

Transparent top view

Table 3. Pin description

Symbol Pin Description

1A 1 data input

GND 2 ground (0 V)

2A 3 data input

2Y 4 data output

VCC 5 supply voltage

1Y 6 data output

Table 4. Function table[1]

Input nA Output nY

Product data sheet Rev. 5 — 6 August 2010 4 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

8. Limiting values

[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.

[3] For SC-88 and SC-74 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.

For XSON6 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.

9. Recommended operating conditions

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage −0.5 +6.5 V

IIK input clampi n g cu rre nt VI<0V −50 - mA

VIinput voltage [1] −0.5 +6.5 V

IOK output clamping current VO<0V −50 - mA

VOoutput voltage Active mode [1] −0.5 +6.5 V

Power-down mode [1][2] −0.5 +6.5 V

IOoutput current VO=0V to6.5V - 50 mA

ICC supply current - 100 mA

IGND ground current −100 - mA

Tstg storage temperature −65 +150 °C

Ptot total power dissipation Tamb =−40 °C to +125 °C[3] - 250 mW

Table 6. Recommended operating con ditions

Symbol Parameter Conditions Min Typ Max Unit

VCC supply voltage 1.65 - 5.5 V

VIinput voltage 0 - 5 .5 V

VOoutput voltage Active mode 0 - 5.5 V

Power-down mode; VCC =0V 0 - 5.5 V

Tamb ambient temperature −40 - +125 °C

Δt/ΔV input transition rise and

fall rate VCC = 1.65 V to 2.7 V - - 20 ns/V

VCC = 2.7 V to 5.5 V - - 10 ns/V

Product data sheet Rev. 5 — 6 August 2010 5 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

10. Static characteristics

Table 7. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Typ Max Unit

Tamb =−40 °C to +85 °C[1]

VIH HIGH-level input

voltage VCC = 1.65 V to 1.95 V 0.65 × VCC --V

VCC = 2.3 V to 2.7 V 1.7 - - V

VCC = 2.7 V to 3.6 V 2.0 - - V

VCC = 4.5 V to 5.5 V 0.7 × VCC --V

VIL LOW-level input

voltage VCC = 1.65 V to 1.95 V - - 0.35 × VCC V

VCC = 2.3 V to 2.7 V - - 0.7 V

VCC = 2.7 V to 3.6 V - - 0.8 V

VCC = 4.5 V to 5.5 V - - 0.3 × VCC V

VOL LOW-level output

voltage VI = VIH or VIL

IO = 100 μA; VCC = 1.65 V to 5.5 V - - 0.10 V

IO = 4 mA; VCC = 1.65 V - - 0.45 V

IO = 8 mA; VCC = 2.3 V - - 0.30 V

IO = 12 mA; VCC = 2.7 V - - 0.40 V

IO = 24 mA; VCC = 3.0 V - - 0.55 V

IO = 32 mA; VCC = 4.5 V - - 0.55 V

IIinput leakage current VI = 5.5 V or GND;

VCC =0Vto5.5V [2] -±0.1 ±5μA

IOZ OFF-state output

current VI = VIH or VIL; VO = VCC or GND;

VCC = 5.5 V -±0.1 ±10 μA

IOFF power-off leakage

current VI or VO = 5.5 V; VCC = 0 V - ±0.1 ±10 μA

ICC supply current VI = 5.5 V or GND; IO = 0 A;

VCC = 1.65 V to 5.5 V -0.110μA

ΔICC additional supply

current per pin; VI = VCC − 0.6 V; IO = 0 A;

VCC = 2.3 V to 5.5 V [2] -5500μA

CIinput capacitance - 2.5 - pF

Product data sheet Rev. 5 — 6 August 2010 6 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

[1] All typical values are measured at Tamb = 25 °C.

[2] These typical values are measured at VCC =3.3V.

Tamb =−40 °C to +125 °C

VIH HIGH-level input

voltage VCC = 1.65 V to 1.95 V 0.65 × VCC --V

VCC = 2.3 V to 2.7 V 1.7 - - V

VCC = 2.7 V to 3.6 V 2.0 - - V

VCC = 4.5 V to 5.5 V 0.7 × VCC --V

VIL LOW-level input

voltage VCC = 1.65 V to 1.95 V - - 0.35 × VCC V

VCC = 2.3 V to 2.7 V - - 0.7 V

VCC = 2.7 V to 3.6 V - - 0.8 V

VCC = 4.5 V to 5.5 V - - 0.3 × VCC V

VOL LOW-level output

voltage VI = VIH or VIL

IO = 100 μA; VCC = 1.65 V to 5.5 V - - 0.10 V

IO = 4 mA; VCC = 1.65 V - - 0.70 V

IO = 8 mA; VCC = 2.3 V - - 0.45 V

IO = 12 mA; VCC = 2.7 V - - 0.60 V

IO = 24 mA; VCC = 3.0 V - - 0.80 V

IO = 32 mA; VCC = 4.5 V - - 0.80 V

IIinput leakage current VI = 5.5 V or GND;

VCC =0Vto5.5V --±20 μA

IOZ OFF-state output

current VI = VIH or VIL; VO = VCC or GND;

VCC = 5.5 V --±10 μA

IOFF power-off leakage

current VI or VO = 5.5 V; VCC = 0 V - - ±20 μA

ICC supply current VI = 5.5 V or GND; IO = 0 A;

VCC = 1.65 V to 5.5 V --40μA

ΔICC additional supply

current per pin; VI = VCC − 0.6 V; IO = 0 A;

VCC = 2.3 V to 5.5 V --5000μA

Table 7. Static characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 5 — 6 August 2010 7 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

11. Dynamic characteristics

[1] Typical values are measured at Tamb =25°C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.

[2] tpd is the same as tPLZ and tPZL.

[3] CPD is used to determine the dynamic power dissipation (PDin μW).

PD=C

PD ×VCC2×fi×N+∑(CL×VCC2×fo) where:

fi= input frequency in MHz;

fo= output frequency in MHz;

CL= output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

∑(CL×VCC2×fo) = sum of outputs.

12. Waveforms

Table 8. Dynamic characteristics

Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8.

Symbol Parameter Conditions −40 °C to +85 °C−40 °C to +125 °CUnit

Min Typ[1] Max Min Max

tpd propagation delay nA to nY; see Figure 7 [2]

VCC = 1.65 V to 1.95 V 1.0 3.5 6.7 1.0 8.4 ns

VCC = 2.3 V to 2.7 V 0.5 2.4 4.3 0.5 5.5 ns

VCC = 2.7 V 1.0 2.3 4.2 1.0 5.3 ns

VCC = 3.0 V to 3.6 V 0.5 2.6 3.7 0.5 4.7 ns

VCC = 4.5 V to 5.5 V 0.5 1.5 2.9 0.5 3.7 ns

CPD power dissipation

capacitance VI = GND to VCC; VCC = 3.3 V [3] -6.5- - -pF

Measurement points are given in Table 9.

VOL is the typical output voltage drop that occur with the output load.

Fig 7. The input (nA) to output (nY) propagation delays

mna52

tPLZ

nY output

nA input

VCC

VMVM

VOL

GND

tPZL

Product data sheet Rev. 5 — 6 August 2010 8 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

Table 9. Measurement points

Supply voltage Input Output

VCC VMVMVX

1.65 V to 1.95 V 0.5 × VCC 0.5 × VCC VOL + 0.15 V

2.3 V to 2.7 V 0.5 × VCC 0.5 × VCC VOL + 0.15 V

2.7 V 1.5 V 1.5 V VOL + 0.3 V

3.0 V to 3.6 V 1.5 V 1.5 V VOL + 0.3 V

4.5 V to 5.5 V 0.5 × VCC 0.5 × VCC VOL + 0.3 V

Test data is given in Table 10.

Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Fig 8. Test circuit for measuring switching times

EXT

mna61

DUT

Table 10. Test data

Supply voltage Input Load VEXT

VCC VItr, tfCLRLtPZL, tPLZ

1.65 V to 1.95 V VCC ≤2.0 ns 30 pF 1 kΩ2 × VCC

2.3 V to 2.7 V VCC ≤2.0 ns 30 pF 500 Ω2 × VCC

2.7 V 2.7 V ≤2.5 ns 50 pF 500 Ω6 V

3.0 V to 3.6 V 2.7 V ≤2.5 ns 50 pF 500 Ω6 V

4.5 V to 5.5 V VCC ≤2.5 ns 50 pF 500 Ω2 × VCC

Product data sheet Rev. 5 — 6 August 2010 9 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

13. Package outline

Fig 9. Package outline SOT363 (SC-88)

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT363 SC-88

wBM

pin 1

index A

detail X

vMA

0 1 2 mm

scale

132

456

Plastic surface-mounted package; 6 leads SOT36

UNIT A1

max bpcDEe1HELpQywv

mm 0.1 0.30

0.20

2.2

1.8

0.25

0.10

1.35

1.15 0.65

1.3 2.2

2.0 0.2 0.10.2

DIMENSIONS (mm are the original dimensions)

0.45

0.15

0.25

0.15

1.1

0.8

04-11-08

06-03-16

Product data sheet Rev. 5 — 6 August 2010 10 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

Fig 10. Package outline SOT457 (TSOP6)

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT457 SC-74

wBM

pin 1

index A

detail X

vMA

scale

132

0 1 2 mm

Plastic surface-mounted package (TSOP6); 6 leads SOT45

UNIT A1bpcDEHELpQywv

mm 0.1

0.013

0.40

0.25

3.1

2.7

0.26

0.10

1.7

1.3

0.95 3.0

2.5 0.2 0.10.2

DIMENSIONS (mm are the original dimensions)

0.6

0.2

0.33

0.23

1.1

0.9

05-11-07

06-03-16

Product data sheet Rev. 5 — 6 August 2010 11 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

Fig 11. Package outline SOT886 (XSON6)

terminal 1

index area

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT886 MO-252

SOT88

04-07-15

04-07-22

DIMENSIONS (mm are the original dimensions)

XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm

0 1 2 mm

scale

Notes

1. Including plating thickness.

2. Can be visible in some manufacturing processes.

UNIT

mm 0.25

0.17

1.5

1.4

0.35

0.27

max b E

1.05

0.95

Dee

0.40

0.32

0.50.6

A(1)

max

0.5 0.04

6×

(2)

4×

(2)

Product data sheet Rev. 5 — 6 August 2010 12 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

Fig 12. Package outline SOT891 (XSON6)

terminal 1

index area

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT891

SOT89

05-04-06

07-05-15

XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm

0 1 2 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT

mm 0.20

0.12

1.05

0.95

0.35

0.27

max b E

1.05

0.95

Dee

0.40

0.32

0.350.55

max

0.5 0.04

6×

(1)

4×

(1)

Note

1. Can be visible in some manufacturing processes.

Product data sheet Rev. 5 — 6 August 2010 13 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

Fig 13. Package outline SOT1115 (XSON6)

References

Outline

version

European

projection Issue date

IEC JEDEC JEITA

SOT1115

sot1115_po

10-04-02

10-04-07

Unit

max

nom

min

0.35 0.04 0.95

0.90

0.85

1.05

1.00

0.95

0.55 0.3

0.40

0.35

0.32

A(1)

Dimensions

Note

1. Including plating thickness.

2. Visible depending upon used manufacturing technology.

SON6: extremely thin small outline package; no leads;

terminals; body 0.9 x 1.0 x 0.35 mm SOT111

A1b

0.20

0.15

0.12

DEee

0.35

0.30

0.27

0 0.5 1 mm

scale

terminal 1

index area

(4×)(2)

e1e1

321

6 5 4

(6×)(2)

A1A

Product data sheet Rev. 5 — 6 August 2010 14 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

Fig 14. Package outline SOT1202 (XSON6)

References

Outline

version

European

projection Issue date

IEC JEDEC JEITA

SOT1202

sot1202_po

10-04-02

10-04-06

Unit

max

nom

min

0.35 0.04 1.05

1.00

0.95

1.05

1.00

0.95

0.55 0.35

0.40

0.35

0.32

A(1)

Dimensions

Note

1. Including plating thickness.

2. Visible depending upon used manufacturing technology.

SON6: extremely thin small outline package; no leads;

terminals; body 1.0 x 1.0 x 0.35 mm SOT120

A1b

0.20

0.15

0.12

DEee

0.35

0.30

0.27

0 0.5 1 mm

scale

terminal 1

index area

(4×)(2)

e1e1

123

6 5 4

(6×)(2)

Product data sheet Rev. 5 — 6 August 2010 15 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

14. Abbreviations

15. Revision history

Table 11. Abbreviations

Acronym Description

CMOS Complementary Metal Oxide Semiconductor

DUT Device Under Test

ESD ElectroStatic Discharge

HBM Human Body Model

MM Machine Model

TTL Transistor-Transistor Logic

Table 12. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74LVC2 G07 v.5 20100806 Product data sheet - 74LVC2G07 v.4

Modifications: •Added type number 74LVC2G07GN (SOT1115/XSON6 package).

•Added type number 74LVC2G07GS (SOT1202/XSON6 package).

74LVC2 G07 v.4 20070521 Product data sheet - 74LVC2G07 v.3

74LVC2 G07 v.3 20040908 Product data sheet - 74LVC2G07 v.2

74LVC2 G07 v.2 20040319 Product data sheet - 74LVC2G07 v.1

74LVC2 G07 v.1 20030825 Product data sheet - -

Product data sheet Rev. 5 — 6 August 2010 16 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

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[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status

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Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contains data from the objective specification for product development.

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Product data sheet Rev. 5 — 6 August 2010 17 of 18

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from national authorities.

16.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respective ow ners.

17. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors 74LVC2G07

Buffers with open-drain outputs

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 6 August 2010

Document identifier: 74LVC2G0 7

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

18. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Functional description . . . . . . . . . . . . . . . . . . . 3

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4

9 Recommended operating conditions. . . . . . . . 4

10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5

11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7

12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9

14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 15

15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15

16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16

16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16

16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 16

16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17

17 Contact information. . . . . . . . . . . . . . . . . . . . . 17

18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18