BC213143A-ds-001Pf
Production Information
© Copyright CSR 2003
This material is subject to CSR’s non-disclosure agreement.
Device Features _äìÉ`çêÉ»OJolj
Single Chip Bluetooth® System
Production Information Data Sheet for
BC213143A
Fully qualified Bluetooth system
Low power 1.8V operation
Minimum external components
Integrated 1.8V regulator
UART Bypass mode
Available in VFBGA and CSP packages
Available in ‘RF Plug and Go’ package (see
separate data sheet)
June 2003
General Description Applications
_äìÉ`çêÉOJolj=is a single chip radio and
baseband chip for Bluetooth wireless technology
2.4GHz systems.
It is implemented in 0.18µm CMOS technology.
BlueCore2-ROM has the same pinout and
electrical characteristics as available in
BlueCore2-Flash to enable development of
custom code before committing to ROM.
The 4Mbit ROM is metal programmable, which
enables a six week turn-around from approval of
firmware to production samples.
Cellular Handsets
Personal Digital Assistants
Mice
Keyboards
High volume, cost sensitive production
BlueCore2-ROM has been designed to reduce the number
of external components required which ensures
production costs are minimised.
The device incorporates auto-calibration and built-in-self-
test (BIST) routines to simplify development, type approval
and production test. All hardware and device firmware is
fully compliant with the Bluetooth specification v1.1.
System Architecture
Contents
BC213143A-ds-001Pf
Production Information
© Copyright CSR 2003
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Page 2 of 50
_äìÉ`çêÉOÓolj=Product Data Sheet
Contents
1 Key Features .................................................................................................................................................. 5
2 6 x 6 VFBGA Package Information ............................................................................................................... 6
2.1 BC213143AXX-EK and BC213143AXX-RK Pinout Diagram ................................................................ 6
2.2 Device Terminal Functions ................................................................................................................... 7
3 4 x 4 CSP Package Information .................................................................................................................. 10
3.1 BC213143AXX-XB Pinout Diagram .................................................................................................... 10
3.2 Device Terminal Functions ................................................................................................................. 11
4 Electrical Characteristics ............................................................................................................................ 14
5 Radio Characteristics .................................................................................................................................. 19
5.1 Temperature +20°C ............................................................................................................................ 19
5.1.1 Transmitter ............................................................................................................................ 19
5.1.2 Receiver ................................................................................................................................ 20
5.1.3 Blocking................................................................................................................................. 21
5.2 Temperature -40°C ............................................................................................................................. 22
5.2.1 Transmitter ............................................................................................................................ 22
5.2.2 Receiver ................................................................................................................................ 22
5.3 Temperature -25°C ............................................................................................................................. 23
5.3.1 Transmitter ............................................................................................................................ 23
5.3.2 Receiver ................................................................................................................................ 23
5.4 Temperature +85°C ............................................................................................................................ 24
5.4.1 Transmitter ............................................................................................................................ 24
5.4.2 Receiver ................................................................................................................................ 24
5.5 Temperature +105°C .......................................................................................................................... 25
5.5.1 Transmitter ............................................................................................................................ 25
5.5.2 Receiver ................................................................................................................................ 25
5.6 Power Consumption ........................................................................................................................... 26
6 Device Diagrams .......................................................................................................................................... 27
7 Description of Functional Blocks ............................................................................................................... 28
7.1 RF Receiver........................................................................................................................................ 28
7.1.1 Low Noise Amplifier............................................................................................................... 28
7.1.2 Analogue to Digital Converter ............................................................................................... 28
7.2 RF Transmitter.................................................................................................................................... 28
7.2.1 IQ Modulator ......................................................................................................................... 28
7.2.2 Power Amplifier ..................................................................................................................... 28
7.2.3 Auxiliary DAC ........................................................................................................................ 28
7.3 RF Synthesiser ................................................................................................................................... 28
7.4 Clock Input and Generation ................................................................................................................ 28
7.5 Baseband and Logic ........................................................................................................................... 29
7.5.1 Memory Management Unit .................................................................................................... 29
7.5.2 Burst Mode Controller ...........................................................................................................29
7.5.3 Physical Layer Hardware Engine DSP .................................................................................. 29
7.5.4 RAM ...................................................................................................................................... 29
7.5.5 ROM...................................................................................................................................... 29
7.5.6 USB....................................................................................................................................... 29
7.5.7 Synchronous Serial Interface ................................................................................................ 29
7.5.8 UART .................................................................................................................................... 29
7.5.9 Audio PCM Interface .............................................................................................................29
7.6 Microcontroller .................................................................................................................................... 30
7.6.1 Programmable I/O................................................................................................................. 30
8 CSR Bluetooth Software Stacks ................................................................................................................. 31
8.1 Important Information.......................................................................................................................... 31
8.2 BlueCore HCI Stack............................................................................................................................ 31
8.2.1 Key Features of the HCI Stack.............................................................................................. 32
8.3 BlueCore RFCOMM Stack.................................................................................................................. 34
8.3.1 Key Features of the BlueCore2-ROM RFCOMM Stack......................................................... 34
Contents
BC213143A-ds-001Pf
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_äìÉ`çêÉOÓolj=Product Data Sheet
8.4 BlueCore Virtual Machine Stack ......................................................................................................... 35
8.5 BlueCore HID Stack............................................................................................................................ 36
8.6 Host Side Software ............................................................................................................................. 37
8.7 Additional Software for Other Embedded Applications ....................................................................... 37
8.8 CSR Development Systems ............................................................................................................... 37
9 Application Schematics............................................................................................................................... 38
9.1 6 x 6 VFBGA 84-Ball Package............................................................................................................ 38
9.1.1 Application Schematic using Separate Balun and Filter ........................................................ 38
9.1.2 Application Schematic using Epcos Combined Balun and Filter ........................................... 39
9.1.3 Application Schematic using Soshin Combined Balun and Filter .......................................... 40
9.2 4 x 4 CSP 49-Ball Package................................................................................................................. 41
10 Package Dimensions ................................................................................................................................... 42
10.1 6 x 6 VFBGA 84-Ball Package............................................................................................................ 42
10.2 4 x 4 CSP 47-Ball Package................................................................................................................. 43
11 Ordering Information ................................................................................................................................... 44
11.1 BlueCore2-ROM ................................................................................................................................. 44
12 Contact Information..................................................................................................................................... 45
13 Document References ................................................................................................................................. 46
Acronyms and Definitions.................................................................................................................................. 47
Status Information .............................................................................................................................................. 49
Record of Changes ............................................................................................................................................. 50
Contents
BC213143A-ds-001Pf
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_äìÉ`çêÉOÓolj=Product Data Sheet
List of Figures
Figure 6.1: BlueCore2-ROM Device Diagram for 6 x 6mm VFBGA and 4 x 4mm CSP Packages ....................... 27
Figure 8.1: BlueCore HCI Stack ............................................................................................................................ 31
Figure 8.2: BlueCore RFCOMM Stack .................................................................................................................. 34
Figure 8.3: Virtual Machine ................................................................................................................................... 35
Figure 8.4: HID Stack............................................................................................................................................ 36
Figure 9.1: Application Circuit using Separate Balun and Filter for 6 x 6 VFBGA Package .................................. 38
Figure 9.2: Application Circuit using Epcos Balun and Filter for 6 x 6 VFBGA Package ....................................... 39
Figure 9.3: Application Circuit using Soshin Balun and Filter for 6 x 6 VFBGA Package ...................................... 40
Figure 9.4: Application Circuit for 4 x 4 CSP Package .......................................................................................... 41
Figure 10.1: BlueCore2-ROM VFBGA Package Dimensions ................................................................................ 42
Figure 10.2: BlueCore2-ROM CSP Package Dimensions..................................................................................... 43
Key Features
BC213143A-ds-001Pf
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_äìÉ`çêÉOÓolj=Product Data Book
1 Key Features
Radio
Operation with common TX/RX terminals
simplifies external matching circuitry and
eliminates external antenna switch
Extensive built-in-self-test minimises
production test time
No external trimming is required in
production
Full RF reference designs are available
Transmitter
Up to +6dBm RF transmit power with level
control from the on-chip 6-bit DAC over a
dynamic range greater than 30dB
Supports Class 2 and Class 3 radios without
the need for an external power amplifier or
TX/RX switch
Supports Class 1 radios with an external
power amplifier, provided by a power control
terminal controlled by an internal 8-bit
voltage DAC and an external RF TX/RX
switch
Receiver
Integrated channel filters
Digital demodulator for improved sensitivity
and co-channel rejection
Digitised RSSI available in real time over the
HCI interface
Fast AGC for enhanced dynamic range
Synthesiser
Fully integrated synthesizer; no external
VCO varactor diode, resonator or loop filter
Compatible with crystals between 8 and
32MHz (in multiples of 250kHz) or an
external clock
Accepts 7.68, 14.4, 15.36, 16.2, 16.8, 19.2,
19.44, 19.68, 19.8 and 38.4MHz TCXO
frequencies for GSM and CDMA devices
with either sinusoidal or logic level signals
Auxiliary Features
Crystal oscillator with built-in digital trimming
Power management includes digital shut
down and wake up commands and an
integrated low power oscillator for ultra low
Park/Sniff/Hold mode power consumption
Device can be used with an external master
oscillator and provides a ‘clock request
signal’ to control external clock source
Auxiliary Features
On-chip linear regulator, producing 1.8V output
from 2.2 – 4.2V input
Power on reset cell detects low supply voltage
Arbitrary sequencing of power supplies is
permitted
Uncommitted 8-bit ADC and 8-bit DAC are
available to application programs
Baseband and Software
Internal programmed 4Mbit ROM for complete
system solution
32Kbyte on-chip RAM allows full speed
Bluetooth data transfer, mixed voice and data,
plus full seven Slave piconet operation
Dedicated logic for forward error correction,
header error control, access code correlation,
demodulation, cyclic redundancy check,
encryption bitstream generation, whitening and
transmit pulse shaping
Transcoders for A-law, µ-law and linear voice
from host and A-law, µ-law and CVSD voice
over air
Physical Interfaces
Synchronous serial interface up to 4M Baud for
system debugging
UART interface with programmable Baud rate
up to 1.5M Baud with an optional bypass mode
Full speed USB interface supports OHCI and
UHCI host interfaces. Compliant with USB v2.0
Synchronous bi-directional serial
programmable audio interface
Optional I2C™ compatible interface
Bluetooth Stack
CSR’s Bluetooth Protocol Stack runs on-chip in a
variety of configurations:
Standard HCI (UART or USB)
Fully embedded to RFCOMM
Customer specific builds with embedded
application code
Package Options
84-ball VFBGA 6 x 6 x 1.0mm 0.5mm pitch
49-ball CSP 4 x 4 x 0.7mm 0.5mm pitch
6 x 6 VFBGA Package Information
BC213143A-ds-001Pf
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_äìÉ`çêÉOJolj=mêçÇìÅí=a~í~=_ççâ
2 6 x 6 VFBGA Package Information
2.1 BC213143AXX-EK and BC213143AXX-RK Pinout Diagram
Orientation from top of device
A
B
C
D
E
F
G
H
J
K
123
4
5
6
7
8910
A1 A2 A3
A
4
A
5
A
6
A
7
A
8A9 A10
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10
D1 D2 D3 D8 D9 D10
E1 E2 E3 E8 E9 E10
F1 F2 F3 F8 F9 F10
G1 G2 G3 G8 G9 G10
H1 H2 H3 H4 H5 H6 H7 H8 H9 H10
J1 J2 J3 J4 J5 J6 J7 J8 J9 J10
K1 K2 K3 K4 K5 K6 K7 K8 K9 K10
Figure 2.1: BlueCore2-ROM 6 x 6mm Packages (BC213143AXX-EK and BC213143AXX-RK)
6 x 6 VFBGA Package Information
BC213143A-ds-001Pf
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_äìÉ`çêÉOJolj=mêçÇìÅí=a~í~=_ççâ
2.2 Device Terminal Functions
Radio Ball Pad Type Description
RF_IN D1 Analogue Single ended receiver input
PIO[0]/RXEN B1
Bi-directional with programmable
strength internal pull-up/down
Control output for external LNA
(if fitted)
PIO[1]/TXEN B2
Bi-directional with programmable
strength internal pull-up/down
Control output for external PA
(if fitted for Class 1)
TX_A F1 Analogue Transmitter output/switched receiver
input
TX_B E1 Analogue Complement of TX_A
AUX_DAC D3 Analogue Voltage DAC output
Synthesiser and
Oscillator Ball Pad Type Description
XTAL_IN K3 Analogue For crystal or external clock input
XTAL_OUT J3 Analogue Drive for crystal
LOOP_FILTER H2 Analogue Connection to external PLL loop filter
(Do not connect)
PCM Interface Ball Pad Type Description
PCM_OUT G8
CMOS output, tristatable with weak
internal pull-down Synchronous data output
PCM_IN G9
CMOS input, with weak internal
pull-down Synchronous data input
PCM_SYNC G10
Bi-directional with weak internal
pull-down Synchronous data sync
PCM_CLK H10
Bi-directional with weak internal
pull-down Synchronous data clock
USB and UART Ball Pad Type Description
UART_TX J10
CMOS output, tristatable with weak
internal pull-up UART data output active low
UART_RX H9
CMOS input with weak internal
pull-down
UART data input active low (idle
status high)
UART_RTS H7
CMOS output, tristatable with weak
internal pull-up UART request to send active low
UART_CTS H8
CMOS input with weak internal
pull-down UART clear to send active low
USB_DP J8 Bi-directional USB data plus with selectable internal
1.5kΩ pull-up resistor
USB_DN K8 Bi-directional USB data minus
6 x 6 VFBGA Package Information
BC213143A-ds-001Pf
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_äìÉ`çêÉOJolj=mêçÇìÅí=a~í~=_ççâ
Test and Debug Ball Pad Type Description
RESET C7
CMOS input with weak internal
pull-down
Reset if high. Input debounced so
must be high for >5ms to cause a
reset
RESET_B D8
CMOS input with weak internal
pull-up
Reset if low. Input debounced so
must be low for >5ms to cause a reset
SPI_CSB C9
CMOS input with weak internal
pull-up
Chip select for Serial Peripheral
Interface, active low
SPI_CLK C10
CMOS input with weak internal
pull-down Serial Peripheral Interface clock
SPI_MOSI C8
CMOS input with weak internal
pull-down Serial Peripheral Interface data input
SPI_MISO B9
CMOS output, tristatable with weak
internal pull-down Serial Peripheral Interface data output
TEST_EN C6
CMOS input with strong internal
pull-down
For test purposes only (leave
unconnected)
FLASH_EN B8 No pad Pull high to VDD_MEM
for compatibility with flash parts
PIO Port Ball Pad Type Description
PIO[2] B3
Bi-directional with programmable
strength internal pull-up/down Programmable input/output line
PIO[3] B4
Bi-directional with programmable
strength internal pull-up/down Programmable input/output line
PIO[4] E8
Bi-directional with programmable
strength internal pull-up/down Programmable input/output line
PIO[5] F8
Bi-directional with programmable
strength internal pull-up/down Programmable input/output line
PIO[6] F10
Bi-directional with programmable
strength internal pull-up/down Programmable input/output line
PIO[7] F9
Bi-directional with programmable
strength internal pull-up/down Programmable input/output line
PIO[8] C5
Bi-directional with programmable
strength internal pull-up/down Programmable input/output line
PIO[9] C3
Bi-directional with programmable
strength internal pull-up/down Programmable input/output line
PIO[10] C4
Bi-directional with programmable
strength internal pull-up/down Programmable input/output line
PIO[11] E3
Bi-directional with programmable
strength internal pull-up/down Programmable input/output line
AIO[0] H4 Bi-directional Programmable input/output line
AIO[1] H5 Bi-directional Programmable input/output line
AIO[2] J5 Bi-directional Programmable input/output line
6 x 6 VFBGA Package Information
BC213143A-ds-001Pf
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_äìÉ`çêÉOJolj=mêçÇìÅí=a~í~=_ççâ
Power Supplies and
Control Ball Pad Type Description
VREG_IN K6 Regulator input Linear regulator voltage input
VDD_USB K9 VDD Positive supply for UART/USB ports
VDD_PIO A3 VDD Positive supply for PIO and AUX
DAC(1)
VDD_PADS D10 VDD Positive supply for all other digital
input/output ports(2)
VDD_MEM
A6,A7,
A9, H6,
J6, K7
VDD Positive supply AIO ports (and flash
memory on flash parts)
VDD_CORE E10 VDD Positive supply for internal digital
circuitry and internal ROM
VDD_RADIO C1, C2 VDD Positive supply for RF circuitry
VDD_VCO H1 VDD Positive supply for VCO and
synthesiser circuitry
VDD_ANA K4 VDD/Regulator output Positive supply for analogue circuitry
and 1.8V regulated output
VSS_PADS
A1, A2,
D9, J9,
K10
VSS Ground connection for input/output
VSS_MEM
A10,
B5, B7,
B10, J7
VSS Ground connections AIO ports (and
flash memory on flash parts)
VSS_CORE E9 VSS Ground connection for internal digital
circuitry and internal ROM
VSS_RADIO D2, E2,
F2 VSS Ground connections for RF circuitry
VSS_VCO G1, G2 VSS Ground connections for VCO and
synthesiser
VSS_ANA J2, J4,
K2 VSS Ground connections for analogue
circuitry
VSS F3 VSS Ground connection for internal
package shield
Unconnected Terminals Ball Description
A4, A5, A8, B6, G3, H3, J1, K1, K5 Leave unconnected
Notes:
(1) Positive supply for PIO[3:0] and PIO[11:8]
(2) Positive supply for SPI/PCM ports and PIO[7:4]
See Section 4, Electrical Characteristics, for voltage specifications
4 x 4 CSP Package Information
BC213143A-ds-001Pf
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_äìÉ`çêÉOJolj=mêçÇìÅí=a~í~=pÜÉÉí
3 4 x 4 CSP Package Information
3.1 BC213143AXX-XB Pinout Diagram
Orientation from top of device
Figure 3.1: BlueCore2-ROM 4 x 4mm CSP Package (BC213143AXX-XB)
Note:
Performance and characterisation data reported is not guaranteed for the CSP package option. All data
should be regarded as Pre-Production Information with respect to the CSP package.
4 x 4 CSP Package Information
BC213143A-ds-001Pf
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_äìÉ`çêÉOJolj=mêçÇìÅí=a~í~=pÜÉÉí
3.2 Device Terminal Functions
Radio Ball Pad Type Description
PIO[0]/RXEN G3
Bi-directional with
programmable strength
internal pull-up/down
Control output for external LNA (if fitted)
(=PIO[0])
PIO[1]/TXEN E3
Bi-directional with
programmable strength
internal pull-up/down
Control output for external PA Class 1 only
(=PIO[1])
TX_A G2 Analogue Transmitter output/Switched Receiver input
TX_B G1 Analogue Complement of TX_A
AUX_DAC F2 Analogue Voltage DAC output
Synthesiser and
Oscillator Ball Pad Type Description
XTAL_IN A1 Analogue For crystal or external clock input
XTAL_OUT A2 Analogue Drive for crystal
PCM Interface Ball Pad Type Description
PCM_OUT C7
CMOS output, tristatable
with weak internal pull-down Synchronous data output
PCM_IN C5
CMOS input, with weak
internal pull-down Synchronous data input
PCM_SYNC C6
Bi-directional with weak
internal pull-down Synchronous data sync
PCM_CLK D5
Bi-directional with weak
internal pull-down Synchronous data clock
USB and UART Ball Pad Type Description
UART_TX B7
CMOS output, tristatable
with weak internal pull-up UART data output active low
UART_RX B6
CMOS input with weak
internal pull-down UART data input active low (idle status high)
UART_RTS B5
CMOS output, tristatable
with weak internal pull-up UART request to send active low
UART_CTS C4
CMOS input with weak
internal pull-down UART clear to send active low
USB_DP A5 Bi-directional USB data plus with selectable internal
1.5kΩ pull-up resistor
USB_DN A6 Bi-directional USB data minus
4 x 4 CSP Package Information
BC213143A-ds-001Pf
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_äìÉ`çêÉOJolj=mêçÇìÅí=a~í~=pÜÉÉí
Test and Debug Ball Pad Type Description
RESETB E4
CMOS input with weak
internal pull-up
Reset if low. Input debounced so must be
low for >5ms to cause a reset
SPI_CSB G6
CMOS input with weak
internal pull-up
Chip select for Synchronous Serial Interface
active low
SPI_CLK F5
CMOS input with weak
internal pull-down Serial Peripheral Interface clock
SPI_MOSI F7
CMOS input with weak
internal pull-down Serial Peripheral Interface data input
SPI_MISO G7
CMOS output, tristatable
with weak internal pull-
down
Serial Peripheral Interface data output
TEST_EN D2
CMOS input with strong
internal pull-down For test purposes only (leave unconnected)
PIO Port Ball Pad Type Description
PIO[2] D3
Bi-directional with
programmable strength
internal pull-up/down
Programmable input/output line
PIO[3] F4
Bi-directional with
programmable strength
internal pull-up/down
Programmable input/output line
PIO[4] E5
Bi-directional with
programmable strength
internal pull-up/down
Programmable input/output line
PIO[5] D7
Bi-directional with
programmable strength
internal pull-up/down
Programmable input/output line
PIO[6] D6
Bi-directional with
programmable strength
internal pull-up/down
Programmable input/output line
PIO[7] D4
Bi-directional with
programmable strength
internal pull-up/down
Programmable input/output line
PIO[8] F3
Bi-directional with
programmable strength
internal pull-up/down
Programmable input/output line
AIO[0] B3 Bi-directional Programmable input/output line
AIO[1] C2 Bi-directional Programmable input/output line
AIO[2] C3 Bi-directional Programmable input/output line
4 x 4 CSP Package Information
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_äìÉ`çêÉOJolj=mêçÇìÅí=a~í~=pÜÉÉí
Power Supplies
and Control Ball Pad Type Description
VREG_IN A4 Regulator input Linear regulator voltage input
VDD_USB B4 VDD Positive supply for UART/USB and AIO ports
VDD_PIO G5 VDD Positive supply for PIO and AUX DAC(1)
VDD_PADS F6 VDD Positive supply for all other digital
input/output ports (2)
VDD_CORE E6 VDD Positive supply for internal digital circuitry
VDD_RADIO D1 VDD Positive supply for RF circuitry
VDD_VCO B1 VDD/ Regulator input Positive supply for VCO and synthesiser
circuitry
VDD_ANA A3 VDD Positive supply for analogue circuitry and
1.8V regulated output
VSS_PADS A7, E7,
G4 VSS Ground connection for internal digital
circuitry and input/output
VSS_RADIO E1 VSS Ground connections for RF circuitry
VSS_VCO C1 VSS Ground connections for VCO and
synthesiser
VSS_ANA B2 VSS Ground connections for analogue circuitry
Notes:
(1) Positive supply for PIO[3:0] and PIO[8].
(2) Positive supply for SPI/PCM ports and PIO[7:4].
Electrical Characteristics
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_äìÉ`çêÉOJolj=mêçÇìÅí=a~í~=pÜÉÉí
4 Electrical Characteristics
Absolute Maximum Ratings
Rating Min Max
Storage Temperature -40°C 150°C
Supply Voltage: VDD_RADIO, VDD_VCO, VDD_ANA,
VDD_CORE and VDD_MEM -0.4V 2.2V
Supply Voltage: VDD_PADS, VDD_PIO, VDD_USB -0.4V 3.7V
Supply Voltage: VREG_IN -0.4V 4.2V
Other Terminal Voltages VSS-0.4V VDD+0.4V
Recommended Operating Conditions
Operating Condition Min Max
Guaranteed RF performance range -40°C 105°C
Supply Voltage: VDD_RADIO, VDD_VCO, VDD_ANA,
VDD_CORE and VDD_MEM 1.7V 1.9V
Supply Voltage: VDD_PADS, VDD_PIO, VDD_USB 1.7V 3.6V
Supply Voltage: VREG_IN(1) 2.2V 3.6V(2)
Note:
(1) If the internal linear regulator is not required VREG_IN should be connected to 1.8V.
(2) The device will operate with VREG_IN as high as 4.2V, however performance is not guaranteed above
3.6V.
Electrical Characteristics
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_äìÉ`çêÉOJolj=mêçÇìÅí=a~í~=pÜÉÉí
Input/Output Terminal Characteristics(1)
Linear Regulator Min Typ Max Unit
Normal Operation
Output Voltage (Iload = 70mA / VREG_IN = 3.0V) 1.70 1.78 1.85 V
Temperature Coefficient -250 - 250 ppm/C
Output Noise(2)(3) - - 1 mV rms
Load Regulation (Iload < 100mA)(8) - - 50 mV/A
Settling Time(2)(4) - - 50
µs
Line Regulation(2)(5) -20 - - dB
Maximum Output Current 100 - - mA
Minimum Load Current 5 - - µA
Dropout Voltage (Iload = 70mA) - - 350 mV
Quiescent Current (excluding Ioad, Iload <1mA) 25 35 50 µA
Low Power Mode(6)
Quiescent Current (excluding Ioad, Iload <100µA) 4 7 10
µA
Disabled Mode(7)
Quiescent Current 1.5 2.5 3.5
µA
Notes:
(1) These parameters are guaranteed for 2.2 to 3.6V. Between 3.6V and 4.2V the output voltage is not
guaranteed to remain below 1.85V, but full functionality of the chip will be preserved and no damage will
ensue.
(2) Regulator output connected to 47nF pure and 4.7µF 2.2Ω ESR capacitors
(3) Frequency range 100Hz to 100kHz
(4) 1mA to 70mA pulsed load
(5) Frequency range 100Hz to 10MHz
(6) Low power mode is entered and exited automatically when the chip enters/leaves Deep Sleep mode
(7) Regulator is disabled when VREG_IN is either open circuit or driven to the same voltage as VDD_ANA
(8) On-chip voltage: This figure does not include bondwire or ball-to-PCB resistance effects.
Electrical Characteristics
BC213143A-ds-001Pf
Production Information
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Input/Output Terminal Characteristics (Continued)
Digital Terminals Min Typ Max Unit
Input Voltage Levels
VIL input logic level low 2.7 ≤VDD ≤3.6 -0.4 - 0.8 V
1.7 ≤VDD ≤1.9 -0.4 - 0.4 V
VIH input logic level high 0.7VDD - VDD+0.4 V
Output Voltage Levels
VOL output logic level low,
(lO = 4.0mA) 2.7 ≤VDD ≤3.6 - - 0.2 V
VOL output logic level low,
(lO = 4.0mA) 1.7 ≤VDD ≤1.9 - - 0.4 V
VOH output logic level high,
(lO = -4.0mA) 2.7 ≤VDD ≤3.6 VDD-0.2 - - V
VOH output logic level high,
(lO = -4.0mA) 1.7 ≤VDD ≤1.9 VDD-0.4 - - V
Input and Tristate Current with:
Strong pull-up -100 -40 -10 µA
Strong pull-down 10 40 100 µA
Weak pull-up -5 -1 0 µA
Weak pull-down 0 1 5 µA
I/O pad leakage current -1 0 1 µA
CI Input Capacitance 1.0 - 5.0 pF
USB Terminals(1) Min Typ Max Unit
Input Threshold
VIL input logic level low - - 0.3
VDD_USB V
VIH input logic level high 0.57
VDD_USB - - V
Input Leakage Current
VSS_USB <VIN< VDD_USB(2) -1 1 5
µA
CI Input capacitance 2.5 - 10.0 pF
Output Voltage Levels To Correctly Terminated USB Cable
VOL output logic level low 0.0 - 0.2 V
VOH output logic level high 2.8 - VDD_USB V
Electrical Characteristics
BC213143A-ds-001Pf
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Input/Output Terminal Characteristics (Continued)
Auxiliary DAC, 8-Bit Resolution Min Typ Max Unit
Resolution - - 8 Bits
Average output step size(3) 12.5 14.5 17.0 mV
Output Voltage Monotonic(3)
Voltage range (IO=0mA) VSS_PIO - VDD_PIO V
Current range -10.0 - +0.1 mA
Minimum output voltage (IO=100µA) 0.0 - 0.2 V
Maximum output voltage (IO=10mA) VDD_PIO-0.3 - VDD_PIO V
High Impedance leakage current -1 - 1 µA
Offset -220 - 120 mV
Integral non linearity(3) -2 - 2 LSB
Starting time (50pF load) - - 10 µs
Settling time (50pF load) - - 5 µs
Crystal Oscillator Min Typ Max Unit
Crystal frequency(4) (7) 8.0 - 32.0 MHz
Digital trim range(5) 5.0 6.2 8.0 pF
Trim step size - 0.1 - pF
Transconductance 2.0 - - mS
Negative resistance(6) 870 1500 2400
Ω
External Clock
Input frequency(7) 7.5 - 40.0 MHz
Clock input level(8) 0.4 - VDD_ANA V pk-pk
Phase noise (at zero crossing) - - 15 ps rms
XTAL_IN input impedance 10 - - kΩ
XTAL_IN input capacitance - 7 10 pF
Power-on Reset
VDD_CORE falling threshold 1.40 1.50 1.60 V
VDD_CORE rising threshold 1.50 1.60 1.70 V
Hysteresis 0.05 0.10 0.15 V
Electrical Characteristics
BC213143A-ds-001Pf
Production Information
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Notes:
VDD_CORE, VDD_RADIO, VDD_VCO, VDD_ANA and VDD_MEM are at 1.8V unless shown otherwise.
VDD_PADS, VDD_PIO and VDD_USB are at 3.0V unless shown otherwise
The same setting of the digital trim is applied to both XTAL_IN and XTAL_OUT.
Current drawn into a pin is defined as positive, current supplied out of a pin is defined as negative.
(1) 3.1V ≤VDD_USB ≤3.6V
(2) Internal USB pull-up disabled
(3) Specified for an output voltage between 0.2V and VDD_PIO -0.3V
(4) Integer multiple of 250kHz
(5) The difference between the internal capacitance at minimum and maximum settings of the internal
digital trim
(6) XTAL frequency = 16MHz (Please refer to your software build release note for frequencies supported);
XTAL C0 = 0.75pF; XTAL load capacitance = 8.5pF
(7) Clock input can be any frequency between 8 and 40MHz in steps of 250kHz + CDMA/3G TCXO
frequencies of 7.68, 14.4, 15.36, 16.2, 16.8, 19.2, 19.44, 19.68, 19.8 and 38.4MHz
(8) Clock input can either be sinusoidal or square wave. If the peaks of the signal are below VSS_ANA or
above VDD_ANA a DC blocking capacitor is required between the signal and XTAL_IN
Radio Characteristics
BC213143A-ds-001Pf
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5 Radio Characteristics
BlueCore2-ROM meets the Bluetooth specification v1.1 when used in a suitable application circuit between -40°C
and +105°C.
5.1 Temperature +20°C
5.1.1 Transmitter
Radio Characteristics VDD = 1.8V Temperature = +20°C
Min Typ Max
Bluetooth
Specification Unit
Maximum RF transmit power(1) 3 6.5 - -6 to +4(2) dBm
RF power control range 25 35 - ≥16 dB
RF power range control resolution - 0.5 - - dB
20dB bandwidth for modulated carrier - 820 1000 ≤1000 kHz
Adjacent channel transmit power F=F0 ±2MHz(3) (4) - -35 -20 ≤-20 dBm
Adjacent channel transmit power F=F0 ±3MHz(3) (4) - -45 -40 ≤-40 dBm
∆f1avg “Maximum Modulation” 140 165 175
140<∆f1avg<175 kHz
∆f2max “Minimum Modulation” 115 140 - 115 kHz
∆f2avg / ∆f2avg 0.8 0.9 - ≥0.80 -
Initial carrier frequency tolerance - 10 35 ±75 kHz
Drift Rate - 8 20 ≤25 kHz/50µs
Drift (single slot packet) - 9 20 ≤25 kHz
Drift (five slot packet) - 10 25 ≤40 kHz
Notes:
(1) BlueCore2-ROM firmware maintains the transmit power to be within the Bluetooth specification v1.1
limits
(2) Class 2 RF transmit power range, Bluetooth specification v1.1
(3) Measured at F0 = 2441MHz
(4) Up to three exceptions are allowed in v1.1 of the Bluetooth specification
(5) Performance and characterisation data reported is not guaranteed for the CSP package option. All data
should be regarded as Pre-Production Information with respect to the CSP package.
(5)
Radio Characteristics
BC213143A-ds-001Pf
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5.1.2 Receiver
Radio Characteristics VDD = 1.8V Temperature = +20°C
Frequency
(GHz) Min Typ Max Bluetooth
Specification Unit
2.402 - -84 -80
2.441 - -85 -81
Sensitivity at 0.1% BER
2.480 - -85 -81
≤-70 dBm
Maximum received signal at 0.1% BER 0 3 - ≥-20
C/I co-channel - 9 11 ≤11 dB
Adjacent channel selectivity C/I F=F0 +1MHz(1) (2) - -4 0 ≤0 dB
Adjacent channel selectivity C/I F=F0 −1MHz(1) (2) - -4 0 ≤0 dB
Adjacent channel selectivity C/I F=F0 +2MHz(1) (2) - -35 -30 ≤-30 dB
Adjacent channel selectivity C/I F=F0 −2MHz(1) (2) - -21 -20 ≤-20 dB
Adjacent channel selectivity C/I F≥F0 +3MHz(1) (2) - -45 - ≤-40 dB
Adjacent channel selectivity C/I F≤F0 −5MHz(1) (2) - -45 - ≤-40 dB
Adjacent channel selectivity C/I F=FImage(1) (2) - -18 -9
≤-9 dB
Notes:
(1) Up to five exceptions are allowed in v1.1 of the Bluetooth specification
(2) Measured at F0 = 2441MHz