BC213159A-ds-001Pc Advance Information Page 1 of 53
BlueCore
2-Audio
Product Data Sheet
General Description Applications
BlueCore2-Audio is a single chip radio and
baseband IC for Bluetooth™ 2.4GHz systems.
It is implemented in 0.18µm CMOS technology.
BlueCore2-Audio has the same pinout and
electrical characteristics as available in
BlueCore2-Flash to enable development of
custom code before committing to ROM.
The 4Mbit ROM is metal programmable, which
enables a six week turn-around from approval of
firmware to production samples.
The integrated mono audio CODEC allows for
more compact designs and low power
consumption for battery powered applications.
n Headsets
n Cellular Handsets
n Personal Digital Assistants
n High volume, cost sensitive production
BlueCore2-Audio has been designed to reduce the
number of external components required which
ensures production costs are minimised.
The device incorporates auto-calibration and
built-in self-test (BIST) routines to simplify
development, type approval and production test. All
hardware and device firmware is fully compliant
with the Bluetooth specification v1.1.
BlueCore2-Audio System Architecture
Device Features
n Fully qualified Bluetooth system
n Low power 1.8V operation
n Minimum external components
n Integrated 1.8V regulator
n 15-bit linear audio CODEC
n Dual UART ports
n Available in VFBGA and LFBGA
packages
n Also available in ‘RF Plug and Go’
package for low cost manufacture
BlueCore
TM
2
-
Audio
Single Chip BluetoothTM System
Advance Information Data Sheet for
BC213159A
January 2003
Contents
BC213159A-ds-001Pc Advance Information Page 2 of 53
BlueCore
2-Audio
Product Data Sheet
Contents
1Key Features.....................................................................................................................................................................4
26 x 6 Package Information............................................................................................................................................5
2.1 BC213159AXX-EK and BC213159AXX-RK Pinout Diagram........................................................................5
2.2 Device Terminal Functions .................................................................................................................................6
310 x 10 Package Information........................................................................................................................................9
3.1 BC213159AXX-BN Pinout Diagram ..................................................................................................................9
3.2 Device Terminal Functions ..............................................................................................................................10
4Electrical Characteristics...........................................................................................................................................14
5Radio Characteristics .................................................................................................................................................19
6Device Diagrams..........................................................................................................................................................22
7Description of Functional Blocks............................................................................................................................24
7.1 RF Receiver........................................................................................................................................................24
7.1.1 Low Noise Amplifier..........................................................................................................................24
7.1.2 Analogue to Digital Converter.........................................................................................................24
7.2 RF Transmitter...................................................................................................................................................24
7.2.1 IQ Modulator......................................................................................................................................24
7.2.2 Power Amplifier.................................................................................................................................24
7.2.3 Auxiliary DAC.....................................................................................................................................24
7.3 RF Synthesiser..................................................................................................................................................24
7.4 Clock Input and Generation.............................................................................................................................24
7.5 Baseband and Logic.........................................................................................................................................25
7.5.1 Memory Management Unit..............................................................................................................25
7.5.2 Burst Mode Controller......................................................................................................................25
7.5.3 Physical Layer Hardware Engine DSP..........................................................................................25
7.5.4 RAM.....................................................................................................................................................25
7.5.5 ROM....................................................................................................................................................25
7.5.6 USB.....................................................................................................................................................25
7.5.7 Synchronous Serial Interface..........................................................................................................25
7.5.8 UART...................................................................................................................................................26
7.5.9 Audio PCM Interface.........................................................................................................................26
7.6 Microcontroller...................................................................................................................................................26
7.6.1 Programmable I/O.............................................................................................................................26
7.6.2 Extended Programmable I/O Port..................................................................................................26
7.6.3 Audio CODEC...................................................................................................................................26
8CSR Bluetooth Software Stacks..............................................................................................................................27
8.1 BlueCore HCI Stack..........................................................................................................................................27
8.1.1 Key Features of the HCI Stack.......................................................................................................28
8.2 BlueCore RFCOMM Stack...............................................................................................................................30
8.2.1 Key Features of the BlueCore2-Audio RFCOMM Stack.............................................................30
8.3 BlueCore Virtual Machine Stack.....................................................................................................................31
8.4 Host-Side Software ...........................................................................................................................................32
8.5 Additional Software for Other Embedded Applications ...............................................................................32
8.6 CSR Development Systems............................................................................................................................32
9External Interfaces.......................................................................................................................................................33
9.1 Transmitter/Receiver Inputs and Outputs......................................................................................................33
9.2 RF Plug and Go.................................................................................................................................................34
9.3 Asynchronous Serial Data Port (UART) and USB Port...............................................................................34
9.4 UART Bypass.....................................................................................................................................................35
9.4.1 UART Configuration while RESET is Active.................................................................................35
9.4.2 UART Bypass Mode.........................................................................................................................35
9.5 PCM CODEC Interface.....................................................................................................................................36
9.6 Serial Peripheral Interface...............................................................................................................................36
9.7 I/O Parallel Ports ...............................................................................................................................................36
Contents
BC213159A-ds-001Pc Advance Information Page 3 of 53
BlueCore
2-Audio
Product Data Sheet
9.7.1 PIO Defaults for BTv1.1 HCI level Bluetooth Stack.....................................................................37
9.8 I2C Interface.......................................................................................................................................................37
9.9 TCXO Enable OR Function.............................................................................................................................38
9.10 Reset...................................................................................................................................................................38
9.11 Power Supply.....................................................................................................................................................39
9.11.1 Voltage Regulator.............................................................................................................................39
9.11.2 Sequencing........................................................................................................................................39
9.11.3 Sensitivity to Disturbances ..............................................................................................................39
9.12 Audio CODEC....................................................................................................................................................40
9.12.1 Input Stage.........................................................................................................................................40
9.12.2 Microphone Input..............................................................................................................................41
9.12.3 Line Input............................................................................................................................................41
9.12.4 Output stage......................................................................................................................................42
10 Application Schematic................................................................................................................................................43
10.1 6 x 6 VFBGA 84-Ball Package........................................................................................................................43
10.2 10 x 10 LFBGA 96-Ball Package....................................................................................................................44
11 Package Dimensions...................................................................................................................................................45
11.1 6 x 6 VFBGA 84-Ball Package........................................................................................................................45
11.2 10 x 10 LFBGA 96-Ball Package....................................................................................................................46
12 Ordering Information...................................................................................................................................................47
13 BlueCore2-Audio..........................................................................................................................................................47
14 Contact Information.....................................................................................................................................................48
15 Document References................................................................................................................................................49
16 Acronyms and Definitions .........................................................................................................................................50
17 Record of Changes......................................................................................................................................................53
List of Figures
Figure 2.1: BlueCore2-Audio 6 x 6mm Packages (BC213159AXX-EK and BC213159AXX-RK)..........5
Figure 3.1: BlueCore2-Audio 10 x 10mm LFBGA Package (BC213159AXX-BN)...............................9
Figure 6.1: BlueCore2-Audio Device Diagram for 6 x 6mm VFBGA Packages................................. 22
Figure 6.2: BlueCore2-Audio Device Diagram for 10 x 10mm LFBGA Package............................... 23
Figure 8.1: BlueCore HCI Stack................................................................................................... 27
Figure 8.2: BlueCore RFCOMM Stack.......................................................................................... 30
Figure 8.3: Virtual Machine.......................................................................................................... 31
Figure 9.1: Circuit TX/RX_A and TX/RX_B ................................................................................... 33
Figure 9.2: Circuit RF_IN............................................................................................................. 33
Figure 9.3: Circuit for RF_CONNECT........................................................................................... 34
Figure 9.4: UART Bypass Architecture ......................................................................................... 35
Figure 9.5: Example EEPROM Connection................................................................................... 37
Figure 9.6: Example TXCO Enable OR Function........................................................................... 38
Figure 9.7: VDD_DIG Output Circuit............................................................................................. 39
Figure 10.1: Example of a Headset Design for 6 x 6 VFBGA Package............................................ 43
Figure 10.2: Application Circuit for Radio Characteristics Specification........................................... 44
Figure 11.1: BlueCore2-Audio VFBGA Package Dimensions ......................................................... 45
Figure 11.2: BlueCore2-Audio LFBGA Package Dimensions.......................................................... 46
Key Features
BC213159A-ds-001Pc Advance Information Page 4 of 53
Product Data Sheet
1 Key Features
Radio
n Operation with common TX/RX terminals
simplifies external matching circuitry and
eliminates external antenna switch
n Extensive built-in self-test minimises production
test time
n No external trimming is required in production
n Full RF reference designs are available
Transmitter
n Up to +6dBm RF transmit power with level
control from the on-chip 6-bit DAC over a
dynamic range greater than 30dB
n Supports Class 2 and Class 3 radios without the
need for an external power amplifier or TX/RX
switch
n Supports Class 1 radios with an external power
amplifier, provided by a power control terminal
controlled by an internal 8-bit voltage DAC and
an external RF TX/RX switch
Receiver
n Integrated channel filters
n Digital demodulator for improved sensitivity and
co-channel rejection
n Digitised RSSI available in real time over the
HCI interface
n Fast AGC for enhanced dynamic range
Synthesiser
n Fully integrated synthesizer; no external VCO
varactor diode, resonator or loop filter
n Compatible with crystals between 8 and 32MHz
(in multiples of 250kHz) or an external clock
n Accepts 15.36, 16.2, 16.8, 19.2, 19.44, 19.68,
19.8 and 38.4MHz TCXO frequencies for GSM
and CDMA devices with either sinusoidal or
logic level signals
Auxiliary Features
n Crystal oscillator with built-in digital trimming
n Power management includes digital shut down
and wake up commands and an integrated low
power oscillator for ultra-low power consumption
during Park/Sniff/Hold modes
n Device can be used with an external Master
oscillator and provides a ‘clock request signal’ to
control external clock source
n On-chip linear regulator, producing 1.8V output
from 2.2-4.2V input
n Power-on-reset cell detects low supply voltage
n Arbitrary sequencing of power supplies is
permitted
Auxiliary Features (continued)
n Uncommitted 8-bit ADC and 8-bit DAC are
available to application programs
Baseband and Software
n Internal programmed 4Mbit ROM for complete
system solution
n 32Kbyte on-chip RAM allows full speed
Bluetooth data transfer, mixed voice and data,
plus full 7 Slave piconet operation
n Dedicated logic for forward error correction,
header error control, access code correlation,
demodulation, cyclic redundancy check,
encryption bitstream generation, whitening and
transmit pulse shaping
n Transcoders for A-law, µ-law and linear voice
from host and A-law, µ-law and CVSD voice over
air
Physical Interfaces
n Synchronous serial interface up to 4Mbaud for
system debugging
n UART interface with programmable Baud rate up
to 1.5Mbaud with an optional bypass mode
n Full speed USB interface supports OHCI and
UHCI host interfaces. Compliant with USB v2.0
n Synchronous bi-directional serial programmable
audio interface
n Optional I2CTM
compatible interface
Bluetooth Stack Running on an
Internal Microcontroller
CSR’s Bluetooth Protocol Stack runs on-chip in a
variety of configurations:
n Standard HCI (UART or USB)
n Fully embedded to RFCOMM
n Customer specific builds with embedded
application code
Audio CODEC
n 15-bit resolution with 8kHz sampling frequency
n Designed for use in voice applications such as
headsets and hands-free kits
n Integrated input/output amplifiers capable of
driving a microphone and speaker with minimum
external components
Package Options
n 84-ball VFBGA 6 x 6 x 1.0mm 0.5mm pitch
n 96-ball LFBGA 10 x 10 x 1.4mm 0.8mm pitch
(RF Plug and GO package)
6 x 6 Package Information
BC213159A-ds-001Pc Advance Information Page 5 of 53
Product Data Sheet
2 6 x 6 Package Information
2.1 BC213159AXX-EK and BC213159AXX-RK Pinout Diagram
Orientation from top of device
A
B
C
D
E
F
G
H
J
K
1
2
3
4
5
6
7
8
9
10
A1 A2
A3
A4
A5
A6
A7
A8
A9
A10
B1 B2 B3 B4 B5 B6 B7 B8 B9
B10
C1 C2 C3 C4 C5 C6 C7 C8 C9
C10
D1 D2 D3 D8 D9
D10
E1 E2 E3 E8 E9
E10
F1 F2 F3 F8 F9
F10
G1 G2 G3 G8 G9
G10
H1 H2 H3 H4 H5 H6 H7 H8 H9
H10
J1 J2 J3 J4 J5 J6 J7 J8 J9
J10
K1 K2 K3 K4 K5 K6 K7 K8 K9
K10
Figure 2.1: BlueCore2-Audio 6 x 6mm Packages (BC213159AXX-EK and BC213159AXX-RK)
6 x 6 Package Information
BC213159A-ds-001Pc Advance Information Page 6 of 53
Product Data Sheet
2.2 Device Terminal Functions
Radio Ball Pad Type Description
RF_IN D1 Analogue Single ended receiver input
PIO[0]/RXEN B1 Bi-directional with
programmable strength
internal pull-up/down Control output for external LNA (if fitted)
PIO[1]/TXEN B2 Bi-directional with
programmable strength
internal pull-up/down Control output for external PA, Class 1 only
TX_A F1 Analogue Transmitter output/switched receiver input
TX_B E1 Analogue Complement of TX_A
AUX_DAC D3 Analogue Voltage DAC output
Synthesiser and
Oscillator Ball Pad Type Description
XTAL_IN K3 Analogue For crystal or external clock input
XTAL_OUT J3 Analogue Drive for crystal
LOOP_FILTER H2 Analogue Connection to external PLL loop filter
(Do not connect)
PCM Interface Ball Pad Type Description
PCM_OUT G8 CMOS output, tristatable
with weak internal pull-down Synchronous data output
PCM_IN G9 CMOS input, with weak
internal pull-down Synchronous data input
PCM_SYNC G10 Bi-directional with weak
internal pull-down Synchronous data sync
PCM_CLK H10 Bi-directional with weak
internal pull-down Synchronous data clock
USB and UART Ball Pad Type Description
UART_TX J10 CMOS output, tristatable
with weak internal pull-up UART data output active high
UART_RX H9 CMOS input with weak
internal pull-down UART data input active high
UART_RTS H7 CMOS output, tristatable
with weak internal pull-up UART request to send active low
UART_CTS H8 CMOS input with weak
internal pull-down UART clear to send active low
USB_DP J8 Bi-directional USB data plus with selectable internal
1.5kΩ pull-up resistor
USB_DN K8 Bi-directional USB data minus
CODEC Ball Pad Type Description
MIC_P H3 Analogue Microphone input positive
MIC_N G3 Analogue Microphone input negative
SPKR_P J1 Analogue Speaker output positive
SPKR_N K1 Analogue Speaker output negative
6 x 6 Package Information
BC213159A-ds-001Pc Advance Information Page 7 of 53
Product Data Sheet
Test and Debug Ball Pad Type Description
RESET C7 CMOS input with weak
internal pull-down Reset if high. Input debounced so must be
high for >5ms to cause a reset
RESET_B D8 CMOS input with weak
internal pull-up Reset if low. Input debounced so must be
low for >5ms to cause a reset
SPI_CSB C9 CMOS input with weak
internal pull-up Chip select for Serial Peripheral Interface,
active low
SPI_CLK C10 CMOS input with weak
internal pull-down Serial Peripheral Interface clock
SPI_MOSI C8 CMOS input with weak
internal pull-down Serial Peripheral Interface data input
SPI_MISO B9 CMOS output, tristatable
with weak internal
pull-down Serial Peripheral Interface data output
TEST_EN C6 CMOS input with strong
internal pull-down For test purposes only (leave unconnected)
FLASH_EN B8 CMOS input with weak
internal pull-down Pull high to VDD_MEM
PIO Port Ball Pad Type Description
PIO[2] B3 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[3] B4 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[4] E8 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[5] F8 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[6] F10 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[7] F9 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[8] C5 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[9] C3 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[10] C4 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[11] E3 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
AIO[0] H4 Bi-directional Programmable input/output line
AIO[1] H5 Bi-directional Programmable input/output line
AIO[2] J5 Bi-directional Programmable input/output line
6 x 6 Package Information
BC213159A-ds-001Pc Advance Information Page 8 of 53
Product Data Sheet
Power Supplies
and Control Ball Pad Type Description
VREG_IN K6 VDD 2.2-3.6V Voltage input
VDD_USB K9 VDD Positive supply for UART/USB ports
VDD_PIO A3 VDD Positive supply for PIO and AUX DAC(1)
VDD_PADS D10 VDD Positive supply for all other digital
input/output ports (2)
VDD_MEM A6,A7,
A9, H6,
J6, K7 VDD Positive supply for ROM memory and AIO
ports
VDD_CORE E10 VDD Positive supply for internal digital circuitry
VDD_RADIO C1, C2 VDD Positive supply for RF circuitry
VDD_VCO H1 VDD Positive supply for VCO and synthesiser
circuitry
VDD_ANA K4 VDD Positive supply for analogue circuitry and
1.8V regulated output
VSS_USB J9, K10 VSS Ground connections for UART/USB ports
VSS_PIO A1, A2 VSS Ground connections for PIO and AUX DAC
VSS_PADS D9 VSS Ground connection for input/output
VSS_MEM A10, B5,
B7, B10,
J7 VSS Ground connections for ROM memory and
AIO ports
VSS_CORE E9 VSS Ground connection for internal digital
circuitry
VSS_RADIO D2, E2,
F2 VSS Ground connections for RF circuitry
VSS_VCO G1, G2 VSS Ground connections for VCO and
synthesiser
VSS_ANA J2, J4,
K2 VSS Ground connections for analogue circuitry
VSS F3 VSS Ground connection for internal package
shield
Ball Description
Unconnected
Terminals A4, A5, A8, B6 and K5 Leave unconnected
Notes:
(1) Positive supply for PIO[3:0] and PIO[11:8].
(2) Positive supply for SPI/PCM ports and PIO[7:4].
10 x 10 Package Information
BC213159A-ds-001Pc Advance Information Page 9 of 53
Product Data Sheet
3 10 x 10 Package Information
3.1 BC213159AXX-BN Pinout Diagram
Orientation from top of device
A
B
C
D
E
F
G
H
J
K
L
12345678910 11
A1 A2 A3 A4 A5 A6 A7 A8 A9
A10
A11
A1 A2 A3 A4 A5 A6 A7 A8 A9
A10
A11
B1 B2 B3 B4 B5 B6 B7 B8 B9
B10
B11
C1 C2 C3 C4 C5 C6 C7 C8 C9
C10
C11
D1 D2 D3 D9
D10
D11
E1 E2 E3 E9
E10
E11
F1 F2 F3 F9
F10
F11
G1 G2 G3 G9
G10
G11
H1 H2 H3 H9
H10
H11
J1 J2 J3 J4 J5 J6 J7 J8 J9
J10
J11
K1 K2 K3 K4 K5 K6 K7 K8 K9
K10
K11
L1 L2 L3 L4 L5 L6 L7 L8 L9
L10
L11
Figure 3.1: BlueCore2-Audio 10 x 10mm LFBGA Package (BC213159AXX-BN)
10 x 10 Package Information
BC213159A-ds-001Pc Advance Information Page 10 of 53
Product Data Sheet
3.2 Device Terminal Functions
Radio Ball Pad Type Description
RF_IN D2 Analogue Single ended receiver input
PIO[0]/RXEN D3 Bi-directional with
programmable strength
internal pull-up/down Control output for external LNA (if fitted)
PIO[1]/TXEN C4 Bi-directional with
programmable strength
internal pull-up/down Control output for external PA Class 1 only
BAL_MATCH A1 Analogue Tie to VSS_RADIO
RF_CONNECT B1 Analogue 50O RF matched I/O
AUX_DAC C2 Analogue Voltage DAC output
Synthesiser and
Oscillator Ball Pad Type Description
XTAL_IN L3 Analogue For crystal or external clock input
XTAL_OUT L4 Analogue Drive for crystal
LOOP_FILTER J2 Analogue Connection to external PLL loop filter
(Do not connect)
PCM Interface Ball Pad Type Description
PCM_OUT G10 CMOS output, tristatable
with weak internal pull-down Synchronous data output
PCM_IN H11 CMOS input, with weak
internal pull-down Synchronous data input
PCM_SYNC G11 Bi-directional with weak
internal pull-down Synchronous data sync
PCM_CLK H10 Bi-directional with weak
internal pull-down Synchronous data clock
USB and UART Ball Pad Type Description
UART_TX J10 CMOS output, tristatable
with weak internal pull-up UART data output active high
UART_RX J11 CMOS input with weak
internal pull-down UART data input active high
UART_RTS L11 CMOS output, tristatable
with weak internal pull-up UART request to send active low
UART_CTS K11 CMOS input with weak
internal pull-down UART clear to send active low
USB_DP L9 Bi-directional USB data plus with selectable internal
1.5kΩ pull-up resistor
USB_DN L8 Bi-directional USB data minus
CODEC Ball Pad Type Description
MIC_P K2 Analogue Microphone input positive
MIC_N L2 Analogue Microphone input negative
SPKR_P J5 Analogue Speaker output positive
SPKR_N J4 Analogue Speaker output negative
10 x 10 Package Information
BC213159A-ds-001Pc Advance Information Page 11 of 53
Product Data Sheet
Test and Debug Ball Pad Type Description
RESET F9 CMOS input with weak
internal pull-down Reset if high. Input debounced so must be
high for >5ms to cause a reset
RESETB G9 CMOS input with weak
internal pull-up Reset if low. Input debounced so must be
low for >5ms to cause a reset
SPI_CSB C10 CMOS input with weak
internal pull-up Chip select for Synchronous Peripheral
Interface, active low
SPI_CLK D10 CMOS input with weak
internal pull-down Serial Peripheral Interface clock
SPI_MOSI D11 CMOS input with weak
internal pull-down Serial Peripheral Interface data input
SPI_MISO C11 CMOS output, tristatable
with weak internal
pull-down Serial Peripheral Interface data output
TEST_EN E9 CMOS input with strong
internal pull-down For test purposes only (leave unconnected)
FLASH_EN B10 CMOS input with weak
internal pull-down Pull high to VDD_MEM
PIO Port Ball Pad Type Description
PIO[2] C3 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[3] B2 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[4] H9 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[5] J8 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[6] K8 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[7] K9 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[8] B3 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[9] B4 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[10] A4 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
PIO[11] A5 Bi-directional with
programmable strength
internal pull-up/down Programmable input/output line
AIO[0] K5 Bi-directional Programmable input/output line
AIO[1] J6 Bi-directional Programmable input/output line
AIO[2] K7 Bi-directional Programmable input/output line
10 x 10 Package Information
BC213159A-ds-001Pc Advance Information Page 12 of 53
Product Data Sheet
PIO Port Ball Pad Type Description
D[0] B5 Bi-directional with weak
internal pull-down Programmable input/output line
D[1] C6 Bi-directional with weak
internal pull-down Programmable input/output line
D[2] B6 Bi-directional with weak
internal pull-down Programmable input/output line
D[3] A7 Bi-directional with weak
internal pull-down Programmable input/output line
D[4] A8 Bi-directional with weak
internal pull-down Programmable input/output line
D[5] B8 Bi-directional with weak
internal pull-down Programmable input/output line
D[6] A9 Bi-directional with weak
internal pull-down Programmable input/output line
D[7] A10 Bi-directional with weak
internal pull-down Programmable input/output line
D[8] C5 Bi-directional with weak
internal pull-down Programmable input/output line
D[9] A6 Bi-directional with weak
internal pull-down Programmable input/output line
D[10] C7 Bi-directional with weak
internal pull-down Programmable input/output line
D[11] B7 Bi-directional with weak
internal pull-down Programmable input/output line
D[12] C8 Bi-directional with weak
internal pull-down Programmable input/output line
D[13] C9 Bi-directional with weak
internal pull-down Programmable input/output line
D[14] B9 Bi-directional with weak
internal pull-down Programmable input/output line
D[15] A11 Bi-directional with weak
internal pull-down Programmable input/output line
10 x 10 Package Information
BC213159A-ds-001Pc Advance Information Page 13 of 53
Product Data Sheet
Power Supplies
and Control Ball Pad Type Description
VREG_IN L7 VDD 2.2-3.6V Voltage input
VDD_USB L10 VDD Positive supply for UART/USB ports
VDD_PIO A3 VDD Positive supply for PIO and AUX DAC(1)
VDD_PADS E11 VDD Positive supply for all other digital
input/output ports (2)
VDD_DIG L6 VDD Positive 1.8V supply for VDD_MEM and
VDD_CORE
VDD_MEM B11, K6 VDD Positive supply for ROM memory and AIO
and Extended PIO ports
VDD_CORE F11 VDD Positive supply for internal digital circuitry
VDD_RADIO E3 VDD Positive supply for RF circuitry
VDD_ANA L5 VDD Positive supply for analogue circuitry and
1.8V regulated output
VDD_BALUN F1 VDD Positive supply for Balun
VSS_USB K10 VSS Ground connection for UART/USB ports
VSS_PIO A2 VSS Ground connection for PIO and AUX DAC
VSS_PADS E10 VSS Ground connection for input/output
VSS_MEM D9, J9 VSS Ground connections for ROM memory and
AIO ports
VSS_CORE F10 VSS Ground connection for internal digital
circuitry
VSS_RADIO E2, F3,
G2 VSS Ground connections for RF circuitry
VSS_VCO G3, H2,
H3 VSS Ground connections for VCO and
synthesiser
VSS_ANA K4 VSS Ground connection for analogue circuitry
VSS_BAL G1,J1,
K1 VSS Ground connections for Balun
Ball Description
Unconnected
Terminals C1, D1, E1, F2, H1, J3, J7, K3 and L1 Leave unconnected
Notes:
(1) Positive supply for PIO[3:0] and PIO[11:8].
(2) Positive supply for SPI/PCM ports and PIO[7:4].
Electrical Characteristics
BC213159A-ds-001Pc Advance Information Page 14 of 53
Product Data Sheet
4 Electrical Characteristics
Absolute Maximum Ratings
Rating Min Max
Storage Temperature -40°C150°C
Supply Voltage: VDD_RADIO, VDD_VCO, VDD_ANA,
VDD_CORE, VDD_MEM, VDD_BAL -0.40V 1.90V
Supply Voltage: VDD_PADS, VDD_PIO, VDD_USB -0.40V 3.70V
Supply Voltage: VREG_IN -0.40V 4.20V
Other Terminal Voltages VSS-0.4V VDD+0.4V
Recommended Operating Conditions
Operating Condition Min Max
Operating Temperature Range -40°C105°C
Guaranteed RF performance range (1) -25°C85°C
Supply Voltage: VDD_RADIO, VDD_VCO, VDD_ANA,
VDD_CORE, VDD_MEM, VDD_BAL 1.70V 1.90V
Supply Voltage: VDD_PADS, VDD_PIO, VDD_USB 1.70V 3.60V
Supply Voltage: VREG_IN 2.20V 4.20V
Note:
(1) Typical figures are given for RF performance between -40°C and +105°C.
Electrical Characteristics
BC213159A-ds-001Pc Advance Information Page 15 of 53
Product Data Sheet
Input/Output Terminal Characteristics
Linear Regulator Min Typ Max Unit
Normal Operation
Output Voltage (Iload = 70 mA / Vreg_IN = 3.0V) 1.70 1.78 1.85 V
Temperature Coefficient -250 -250 ppm/C
Output Noise(1)(2) - - 1mV rms
Load Regulation (Iload < 100 mA) --50 mV/A
Settling Time(1)(3) --50 µs
Line Regulation(1)(4) -20 - - dB
Maximum Output Current 100 - - mA
Minimum Load Current 5- - µA
Input Voltage - - 3.6 V
Dropout Voltage (Iload = 70 mA) - - 350 mV
Quiescent Current (excluding Ioad, Iload < 1mA) 25 35 50 µA
Low Power Mode(5)
Quiescent Current (excluding Ioad, Iload < 100µA) 4 7 10 µA
Disabled Mode(6)
Quiescent Current 1.5 2.5 3.5 µA
Notes:
(1) Regulator output connected to 47nF pure and 4.7µF 2.2Ω ESR capacitors.
(2) Frequency range 100Hz to 100kHz.
(3) 1mA to 70mA pulsed load.
(4) Frequency range 100Hz to 10MHz.
(5) Low power mode is entered and exited automatically when the chip enters/leaves Deep Sleep mode.
(6) Regulator is disabled when VREG_IN is either open circuit or driven to the same voltage as VDD_ANA.
Electrical Characteristics
BC213159A-ds-001Pc Advance Information Page 16 of 53
Product Data Sheet
Input/Output Terminal Characteristics (Continued)
Digital Terminals Min Typ Max Unit
Input Voltage Levels
-0.4 -0.8 VVIL input logic level low (VDD=3.0V)
(VDD=1.8V) -0.4 -0.4 V
VIH input logic level high 0.7VDD -VDD+0.4 V
Output Voltage Levels
VOL output logic level low, (lO = 4.0mA), VDD=3.0V - - 0.2 V
VOL output logic level low, (lO = 4.0mA), VDD=1.8V - - 0.4 V
VOH output logic level high, (l O = -4.0mA), VDD=3.0V VDD-0.2 - - V
VOH output logic level high, (l O = -4.0mA), VDD=1.8V VDD-0.4 - - V
Input and Tristate Current with:
Strong pull-up -100 -20 -10 µA
Strong pull-down 10 20 100 µA
Weak pull-up -5 -1 0µA
Weak pull-down 0 1 5 µA
I/O pad leakage current -1 0 1 µA
CI Input Capacitance 1.0 -5.0 pF
Input/Output Terminal Characteristics (Continued)
USB Terminals Min Typ Max Unit
Input threshold
VIL input logic level low - - 0.3VDD_USB V
VIH input logic level high 0.57VDD_USB - - V
Input leakage current
VSS_USB< VIN< VDD_USB (1) -1 -1µA
CI Input capacitance 2.5 -10.0 pF
Output Voltage levels
To correctly terminated USB Cable
VOL output logic level low 0.0 -0.2 V
VOH output logic level high 2.8 -VDD_USB V
Input/Output Terminal Characteristics (Continued)
Auxiliary DAC, 8-Bit Resolution Min Typ Max Unit
Resolution - - 8Bits
Average output step size(2) 12.5 14.2 16.5 mV
Output Voltage monotonic(2)
Voltage range (IO=0mA) VSS_PIO -VDD_PIO V
Current range -10.0 -+0.1 mA
Minimum output voltage (IO=100µA) 0.0 -0.2 V
Maximum output voltage (IO=10mA) VDD_PIO-0.3 -VDD_PIO V
High Impedance leakage current -1 -1µA
Offset -120 -120 mV
Integral non-linearity (2) -1.5 -1.5 LSB
Starting time (50pF load) - - 10 µs
Settling time (50pF load) - - 5µs
Electrical Characteristics
BC213159A-ds-001Pc Advance Information Page 17 of 53
Product Data Sheet
Input/Output Terminal Characteristics (Continued)
Crystal Oscillator Min Typ Max Unit
Crystal frequency (3) 8.0 -32.0 MHz
Digital trim range (4) 5.0 6.2 8.0 pF
Trim step size (4) -0.1 -pF
Transconductance 2.0 - - mS
Negative resistance (5) 870 1500 2400 Ω
External Clock
Input frequency (6) 8.0 -40.0 MHz
Clock input level (7) 0.4 -VDD_ANA V pk-pk
Phase noise (at zero crossing) - - 15 ps rms
XTAL_IN input impedance -≥10 -kΩ
XTAL_IN input capacitance -≤4-pF
Input/Output Terminal Characteristics (Continued)
Power-on reset Min Typ Max Unit
VDD_CORE falling threshold 1.40 1.50 1.60 V
VDD_CORE rising threshold 1.50 1.60 1.70 V
Hysteresis 0.05 0.10 0.15 V
Notes:
VDD_CORE, VDD_RADIO, VDD_VCO, VDD_ANA, VDD_BAL and VDD_MEM are at 1.8V unless shown
otherwise.
VDD_PADS, VDD_PIO and VDD_USB are at 3.0V unless shown otherwise.
The same setting of the digital trim is applied to both XTAL_IN and XTAL_OUT.
Current drawn into a pin is defined as positive, current supplied out of a pin is defined as negative.
(1) Internal USB pull-up disabled.
(2) Specified for an output voltage between 0.2V and VDD_PIO -0.2V.
(3) Integer multiple of 250kHz.
(4) The difference between the internal capacitance at minimum and maximum settings of the internal digital
trim.
(5) XTAL frequency = 16MHz; XTAL C0 = 0.75pF; XTAL load capacitance = 8.5pF.
(6) Clock input can be any frequency between 8 and 40MHz in steps of 250kHz + CDMA/3G TCXO frequencies
of 15.36, 16.2, 16.8, 19.2, 19.44, 19.68, 19.8 and 38.4MHz.
(7) Clock input can either be sinusoidal or square wave. If the peaks of the signal are below VSS_ANA or above
VDD_ANA a DC blocking capacitor is required between the signal and XTAL_IN.
Electrical Characteristics
BC213159A-ds-001Pc Advance Information Page 18 of 53
Product Data Sheet
Input/Output Terminal Characteristics (Continued)
Audio CODEC, 15-bit Resolution Min Typ Max Unit
Microphone Amplifier
Input full scale at maximum gain -3-mV rms
Input full scale at minimum gain -350 -mV rms
Gain resolution (1) -3-dB
Distortion at 1kHz - - -78 dB
Input referenced rms noise (2) -5-µV rms
Bandwidth -20 -kHz
Input impedance -20 -kΩ
Analog to Digital Converter
Input sample rate (3) -1-MSamples/s
Output sample rate (4) -8-KSamples/s
Distortion and noise at 1kHz (relative to full
scale) --78 -75 dB
Digital to Analog Converter
Gain Resolution -3-dB
Min Gain (5) --14 -dB
Max Gain (5) -+6 -dB
Loudspeaker Driver
Output voltage full scale swing -2.0 -V Pk-Pk
Output current drive (at full scale swing) (6) 10 20 40 mA
Output full scale current (at reduced swing) (7) -75 -mA
Output –3dB bandwidth -18.5 -kHz
Distortion and noise (relative to full scale) --75 -dB
Allowed Load: resistive 8-OC Ω
Allowed Load: capacitive - - 500 pF
Notes:
(1) 42dB range of gain control (under software control)
(2) Noise in bandwidth from 100Hz to 4kHz gain setting >17dB
(3) Single bit, 2nd order Σ−∆ ADC clocked at 1MHz
(4) This is the decimated and filtered output at 15-bit resolution
(5) 21dB gain range (under software control)
(6) Output for 0.1% THD, signal level of 2V Pk-Pk
(7) Output for 1%THD, Signal level of 1V Pk-Pk