© 2005 Fairchild Semiconductor Corporation DS012168 www.fairchildsemi.com
October 1996
Revised June 2005
74VCX16244 Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs
74VCX16244
Low Voltage 16-Bit Buffer/Line Driver with
3.6V Tolerant Inputs and Outputs
General Descript ion
The VCX 16244 contains sixt een non-i nverting b uffers with
3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble (4-bit) controlled. Each nibble
has separate 3- S TATE control inpu ts which can be sh ort ed
together for full 16-bit operation.
The 74VCX16244 is designed for low voltage (1.2V to
3.6V) VCC applications with I/O capability up to 3.6V.
The 74VCX16244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
■1.2V to 3.6V VCC supply oper atio n
■3.6V tol erant inpu ts and outputs
■tPD
2.5 ns max for 3.0V to 3.6V VCC
■Power-off high impedance inputs and outputs
■Supports live insertion and withdrawal (Note 1)
■Static Drive (IOH/IOL)
r
24 mA @ 3.0V VCC
■Latch-up per for man c e exce eds 300 mA
■ESD performa nce :
Human body model
!
2000V
Machine model
!
200V
■Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of th e resistor is determin ed by the curr ent-so urcing capab ility of the
driver.
Ordering Code:
Note 2: Ordering Code “G” indicates Tray .
Note 3: Devices also available in Tape and Reel. Specify by ap pending the suffix lette r “X” to the or dering co de.
Order Number Package Number Package Description
74VCX16244G
(Note 2)( Note 3) BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74VCX16244MTD
(Note 3) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
■Uses proprietary noise /E MI reduct ion c ircui tr y