SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DFeaturing Unitrode L293 and L293D
Products Now From Texas Instruments
DWide Supply-Voltage Range: 4.5 V to 36 V
DSeparate Input-Logic Supply
DInternal ESD Protection
DThermal Shutdown
DHigh-Noise-Immunity Inputs
DFunctionally Similar to SGS L293 and
SGS L293D
DOutput Current 1 A Per Channel
(600 mA for L293D)
DPeak Output Current 2 A Per Channel
(1.2 A for L293D)
DOutput Clamp Diodes for Inductive
Transient Suppression (L293D)
description/ordering information
The L293 and L293D are quadruple high-current
half-H drivers. The L293 is designed to provide
bidirectional drive currents of up to 1 A at voltages
from 4.5 V to 36 V. The L293D is designed to
provide bidirectional drive currents of up to
600-mA at voltages from 4.5 V to 36 V. Both
devices are designed to drive inductive loads such
as relays, solenoids, dc and bipolar stepping
motors, as well as other high-current/high-voltage
loads in positive-supply applications.
All inputs are TTL compatible. Each output is a
complete totem-pole drive circuit, with a
Darlington transistor sink and a pseudo-
Darlington source. Drivers are enabled in pairs, with drivers 1 and 2 enabled by 1,2EN and drivers 3 and 4
enabled by 3,4EN. When an enable input is high, the associated drivers are enabled, and their outputs are active
and in phase with their inputs. When the enable input is low, those drivers are disabled, and their outputs are
off and in the high-impedance state. With the proper data inputs, each pair of drivers forms a full-H (or bridge)
reversible drive suitable for solenoid or motor applications.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
HSOP (DWP) Tube of 20 L293DWP L293DWP
0°C to 70°C
PDIP (N) Tube of 25 L293N L293N
0
°
C to 70
°
C
PDIP (NE)
Tube of 25 L293NE L293NE
PDIP (NE)
Tube of 25 L293DNE L293DNE
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Copyright 2004, Texas Instruments Incorporated
!"# $"%&! '#(
'"! ! $#!! $# )# # #* "#
'' +,( '"! $!#- '# #!#&, !&"'#
#- && $##(
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
HEAT SINK AND
GROUND
HEAT SINK AND
GROUND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1,2EN
1A
1Y
2Y
2A
VCC2
VCC1
4A
4Y
3Y
3A
3,4EN
L293 ...N OR NE PACKAGE
L293D . . . NE PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1,2EN
1A
1Y
NC
NC
NC
NC
NC
2Y
2A
VCC2
VCC1
4A
4Y
NC
NC
NC
NC
NC
3Y
3A
3,4EN
L293 . . . DWP PACKAGE
(TOP VIEW)
HEAT SINK AND
GROUND
HEAT SINK AND
GROUND
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued)
On the L293, external high-speed output clamp diodes should be used for inductive transient suppression.
A VCC1 terminal, separate from VCC2, is provided for the logic inputs to minimize device power dissipation.
The L293and L293D are characterized for operation from 0°C to 70°C.
block diagram
1
0
3
4
5
6
7
89
10
11
12
13
14
15
16
1
2
1
01
1
0
2
4
3
M
M
M
1
0
1
0
1
0
VCC2
VCC1
NOTE: Output diodes are internal in L293D.
FUNCTION TABLE
(each driver)
INPUTS†
OUTPUT
A EN
OUTPUT
Y
H H H
LHL
X L Z
H = high level, L = low level, X = irrelevant,
Z = high impedance (off)
†In the thermal shutdown mode, the output is
in the high-impedance state, regardless of
the input levels.
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram
ÁÁ
ÁÁ
ÁÁ
ÁÁ
ÁÁ
ÁÁ
ÁÁ
ÁÁ
ÁÁ
ÁÁ
2
1
7
10
9
15
3
6
11
14
1A
1,2EN
2A
3A
3,4EN
4A
1Y
2Y
3Y
4Y
schematics of inputs and outputs (L293)
Input
VCC2
Output
GND
TYPICAL OF ALL OUTPUTS
EQUIVALENT OF EACH INPUT
VCC1
Current
Source
GND
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematics of inputs and outputs (L293D)
Input
VCC2
Output
GND
TYPICAL OF ALL OUTPUTS
EQUIVALENT OF EACH INPUT
VCC1
Current
Source
GND
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC1 (see Note 1) 36 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output supply voltage, VCC2 36 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO −3 V to VCC2 + 3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak output current, IO (nonrepetitive, t ≤ 5 ms): L293 ±2 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak output current, IO (nonrepetitive, t ≤ 100 µs): L293D ±1.2 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO: L293 ±1 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO: L293D ±600 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Notes 2 and 3): DWP package TBD°C/W. . . . . . . . . . . . . . . . . . . . . . .
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
NE package TBD°C/W. . . . . . . . . . . . . . . . . . . . . . . . .
Maximum junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/qJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
MIN MAX UNIT
Supply voltage
VCC1 4.5 7
V
Supply voltage VCC2 VCC1 36 V
VIH
High-level input voltage
VCC1 ≤ 7 V 2.3 VCC1 V
VIH High-level input voltage VCC1 ≥ 7 V 2.3 7 V
VIL Low-level output voltage −0.3†1.5 V
TAOperating free-air temperature 0 70 °C
†The algebraic convention, in which the least positive (most negative) designated minimum, is used in this data sheet for logic voltage levels.
electrical characteristics, VCC1 = 5 V, VCC2 = 24 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage L293: IOH = −1 A
L293D: IOH = −0.6 A VCC2 − 1.8 VCC2 − 1.4 V
VOL Low-level output voltage L293: IOL = 1 A
L293D: IOL = 0.6 A 1.2 1.8 V
VOKH High-level output clamp voltage L293D: IOK = −0.6 A VCC2 + 1.3 V
VOKL Low-level output clamp voltage L293D: IOK = 0.6 A 1.3 V
IIH
High-level input current
A
VI = 7 V
0.2 100
A
IIH High-level input current EN VI = 7 V 0.2 10 µA
IIL
Low-level input current
A
VI = 0
−3 −10
A
IIL Low-level input current EN VI = 0 −2 −100 µA
All outputs at high level 13 22
I
CC1
Logic supply current I
O
= 0 All outputs at low level 35 60 mA
ICC1
Logic supply current
IO = 0
All outputs at high impedance 8 24
mA
All outputs at high level 14 24
I
CC2
Output supply current I
O
= 0 All outputs at low level 2 6 mA
ICC2
Output supply current
IO = 0
All outputs at high impedance 2 4
mA
switching characteristics, VCC1 = 5 V, VCC2 = 24 V, TA = 25°C
PARAMETER
TEST CONDITIONS
L293NE, L293DNE
UNIT
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
tPLH Propagation delay time, low-to-high-level output from A input 800 ns
tPHL Propagation delay time, high-to-low-level output from A input
CL = 30 pF, See Figure 1
400 ns
tTLH Transition time, low-to-high-level output
C
L
= 30 pF, See Figure 1
300 ns
tTHL Transition time, high-to-low-level output 300 ns
switching characteristics, VCC1 = 5 V, VCC2 = 24 V, TA = 25°C
PARAMETER
TEST CONDITIONS
L293DWP, L293N
L293DN
UNIT
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
tPLH Propagation delay time, low-to-high-level output from A input 750 ns
tPHL Propagation delay time, high-to-low-level output from A input
CL = 30 pF, See Figure 1
200 ns
tTLH Transition time, low-to-high-level output
C
L
= 30 pF, See Figure 1
100 ns
tTHL Transition time, high-to-low-level output 350 ns
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Output
CL = 30 pF
(see Note A)
VCC1
Input
3 V
TEST CIRCUIT
tftr3 V
0
tPHL
VOH
tTHL tTLH
VOLTAGE WAVEFORMS
tPLH
Output
Input
VOL
tw
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: t
r
≤ 10 ns, t
f
≤ 10 ns, t
w
= 10 µs, PRR = 5 kHz, Z
O
= 50 Ω.
Pulse
Generator
(see Note B)
5 V 24 V
VCC2
A
EN
Y90% 90%
50%
10%
50%
10%
90% 90%
50%
10%
50%
10%
Figure 1. Test Circuit and Voltage Waveforms
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
24 V5 V
10 kΩ
VCC1 VCC2
Control A
Control B
4, 5, 12, 13
GND
Thermal
Shutdown
Motor
16 8
3
6
11
14
4Y
3Y
2Y
1Y
1,2EN
1A
2A
3,4EN
3A
4A
15
10
9
7
2
1
Figure 2. Two-Phase Motor Driver (L293)
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
24 V5 V
10 kΩ
VCC1 VCC2
16 8
1,2EN
1
1A
2
2A
7
3,4EN
9
3A
10
4A
15
Control A
Control B
4, 5, 12, 13
GND
Thermal
Shutdown
Motor
1Y
3
2Y
6
3Y
11
4Y
14
Figure 3. Two-Phase Motor Driver (L293D)
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
EN 3A M1 4A M2
H H Fast motor stop H Run
H L Run L Fast motor stop
L X Free-running motor
stop XFree-running motor
stop
L = low, H = high, X = don’t care
EN 1A 2A FUNCTION
H L H Turn right
H H L Turn left
H L L Fast motor stop
H H H Fast motor stop
L X X Fast motor stop
L = low, H = high, X = don’t care
VCC2 SES5001
1/2 L293
4, 5, 12, 13
10
SES5001
VCC1
EN
1511 14
16
9
M2
M1
3A 4A
8
Figure 4. DC Motor Controls
(connections to ground and to
supply voltage)
GND
2 × SES5001
1/2 L293
4, 5, 12, 13
367
8
1
216
VCC2
2 × SES5001
2A 1A
VCC1
EN
M
Figure 5. Bidirectional DC Motor Control
GND
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
3
4
5
6
7
8
1
2
9
10
11
12
13
14
15
16
+
+
+
+
D7
D8 D4
D3
L2 IL2
C1
D5 D1
D6 D2
VCC1
L293
IL1/IL2 = 300 mA
0.22 µF
VCC2 L1 IL1
D1−D8 = SES5001
Figure 6. Bipolar Stepping-Motor Control
mounting instructions
The Rthj-amp of the L293 can be reduced by soldering the GND pins to a suitable copper area of the printed
circuit board or to an external heat sink.
Figure 9 shows the maximum package power PTOT and the θJA as a function of the side of two equal square
copper areas having a thickness of 35 µm (see Figure 7). In addition, an external heat sink can be used (see
Figure 8).
During soldering, the pin temperature must not exceed 260°C, and the soldering time must not exceed 12
seconds.
The external heatsink or printed circuit copper area must be connected to electrical ground.
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
Copper Area 35-µm Thickness
Printed Circuit Board
Figure 7. Example of Printed Circuit Board Copper Area
(used as heat sink)
11.9 mm
17.0 mm
38.0 mm
Figure 8. External Heat Sink Mounting Example
(θJA = 25°C/W)
SLRS008C − SEPTEMBER 1986 − REVISED NOVEMBER 2004
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
3
1
0
2
01020
P
4
MAXIMUM POWER AND JUNCTION
vs
THERMAL RESISTANCE
30
TOT − Power Dissipation − W
60
20
0
40
80
θJA − Thermal Resistance − °C/W
40
Side − mm
Figure 9
θJA
PTOT (TA = 70°C)
50
5
3
1
0
2
−50 0 50
4
MAXIMUM POWER DISSIPATION
vs
AMBIENT TEMPERATURE
100
TA − Ambient Temperature − °C
With Infinite Heat Sink
Free Air
Heat Sink With θJA = 25°C/W
Figure 10
150
PTOT − Power Dissipation − W
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
L293DDWP OBSOLETE SOIC DW 28 TBD Call TI Call TI
L293DDWPTR OBSOLETE SOIC DW 28 TBD Call TI Call TI
L293DN OBSOLETE PDIP N 16 TBD Call TI Call TI
L293DNE ACTIVE PDIP NE 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
L293DNEE4 ACTIVE PDIP NE 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
L293DSP OBSOLETE 16 TBD Call TI Call TI
L293DSP883B OBSOLETE 16 TBD Call TI Call TI
L293DSP883C OBSOLETE UTR TBD Call TI Call TI
L293DWP NRND SOIC DW 28 20 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
L293DWPG4 NRND SOIC DW 28 20 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
L293DWPTR OBSOLETE SO
Power
PAD
DWP 28 TBD Call TI Call TI
L293N NRND PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
L293NE ACTIVE PDIP NE 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
L293NEE4 ACTIVE PDIP NE 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
L293NG4 NRND PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
PACKAGE OPTION ADDENDUM
www.ti.com 23-Sep-2009
Addendum-Page 1
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 23-Sep-2009
Addendum-Page 2
MECHANICAL DATA
MPDI003 – OCTOBER 1994
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
NE (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE
20 PIN SHOWN
20
16
PINS **
0.780 (19,80)
0.240 (6,10)
0.260 (6,60)
Seating Plane
DIM
0.975 (24,77)
0.914 (23,22)
0.930 (23,62)
1.000 (25,40)
0.260 (6,61)
0.280 (7,11)
Seating Plane
0.010 (0,25) NOM
4040054/B 04/95
0.310 (7,87)
0.290 (7,37)
0.070 (1,78) MAX
C
10
0.021 (0,533)
0.015 (0,381)
A
11
1
20
0.015 (0,381)
0.021 (0,533)
B
0.200 (5,08) MAX
0.020 (0,51) MIN
0.125 (3,17)
0.155 (3,94)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.155 (3,94)
0.125 (3,17)
M
0.010 (0,25)
M
0.010 (0,25)
0.100 (2,54) 0°–15°
0.100 (2,54)
C
B
A
MIN
MAX
MIN
MAX
MIN
MAX
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (16 pin only)
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