General Description
The MAX17504/MAX17504S high-efficiency, high-
voltage, synchronously rectified step-down converter with
dual integrated MOSFETs operates over a 4.5V to 60V
input. It delivers up to 3.5A and 0.9V to 90% VIN output
voltage. Built-in compensation across the output voltage
range eliminates the need for external components. The
feedback (FB) regulation accuracy over -40°C to +125°C
is ±1.1%. The device is available in a compact (5mm x
5mm) TQFN lead (Pb)-free package with an exposed pad.
Simulation models are available.
The device features a peak-current-mode control
architecture with a MODE feature that can be used to
operate the device in pulse-width modulation (PWM),
pulse-frequency modulation (PFM), or discontinuous
mode (DCM) control schemes. PWM operation provides
constant frequency operation at all loads, and is useful
in applications sensitive to switching frequency. PFM
operation disables negative inductor current and
additionally skips pulses at light loads for high efficiency.
DCM features constant frequency operation down to
lighter loads than PFM mode, by not skipping pulses,
but only disabling negative inductor current at light loads.
DCM operation offers efficiency performance that lies
between PWM and PFM modes. The MAX17504S offers
a lower minimum on-time that allows for higher switching
frequencies and a smaller solution size.
A programmable soft-start feature allows users to reduce
input inrush current. The device also incorporates an
output enable/undervoltage lockout pin (EN/UVLO) that
allows the user to turn on the part at the desired input-
voltage level. An open-drain RESET pin provides a
delayed power-good signal to the sys tem upon achieving
successful regulation of the output voltage.
Applications
● IndustrialPowerSupplies
● DistributedSupplyRegulation
● BaseStationPowerSupplies
● WallTransformerRegulation
● High-VoltageSingle-BoardSystems
● General-PurposePoint-of-Load
Benets and Features
EliminatesExternalComponentsandReducesTotalCost
NoSchottky-SynchronousOperationforHigh
EfciencyandReducedCost
Internal compensation for Stable Operation at Any
Output Voltage
All Ceramic Capacitor Solution: Ultra-Compact
Layout with as Few as Eight External Components
ReduceNumberofDC-DCRegulatorstoStock
Wide4.5Vto60VInputVoltageRange
0.9V to 90% VIN Output Voltage
Delivers Up to 3.5A Over Temperature
100kHzto2.2MHzAdjustableFrequencywith
External Synchronization
MAX17504SAllowsHigherFrequencyOfOperation
Available in a 20-Pin, 5mm x 5mm TQFN Package
ReducePowerDissipation
PeakEfciency>90%
PFMandDCMModesforHighLight-LoadEfciency
Shutdown Current = 2.8FA (typ)
OperateReliably
Hiccup-ModeCurrentLimitandAutoretryStartup
Built-In Output Voltage Monitoring—(Open-Drain
RESET Pin)
ResistorProgrammableEN/UVLOThreshold
AdjustableSoft-StartandPre-BiasedPower-Up
HighIndustrial-40°Cto+125°CAmbientOperating
TemperatureRange/-40°Cto+150°CJunction
TemperatureRange
Ordering Information appears at end of data sheet.
19-6844; Rev 3; 5/17
MAX17504 4.5V–60V, 3.5A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
EVALUATION KIT AVAILABLE
VINtoPGND .........................................................-0.3V to +65V
EN/UVLOtoSGND ...............................................-0.3V to +65V
LXtoPGND................................................-0.3V to (VIN + 0.3V)
BSTtoPGND ........................................................-0.3V to +70V
BST to LX .............................................................-0.3V to +6.5V
BST to VCC ...........................................................-0.3V to +65V
FB, CF, RESET, SS, MODE, SYNC,
RTtoSGND .....................................................-0.3V to +6.5V
VCCtoSGND .......................................................-0.3V to +6.5V
SGNDtoPGND ....................................................-0.3V to +0.3V
LXTotalRMSCurrent ........................................................±5.6A
Output Short-Circuit Duration .................................... Continuous
Continuous Power Dissipation (TA = +70°C) (multilayer board)
TQFN (derate 33.3mW/°C above TA = +70°C) ......2666.7mW
JunctionTemperature ...................................................... +150°C
StorageTemperatureRange ............................ -65NC to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) ....................................... +260°C
(VIN = VEN/UVLO=24V,RRT = 40.2kI(500kHz),CVCC = 2.2µF, VPGND = VSGND = VMODE = VSYNC = 0V, LX = SS = RESET =
open, VBST to VLX = 5V, VFB = 1V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are
referencedtoSGND,unlessotherwisenoted.)(Note2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
INPUT SUPPLY (VIN)
InputVoltageRange VIN 4.5 60 V
Input Shutdown Current IIN-SH VEN/UVLO = 0V (shutdown mode) 2.8 4.5
µA
Input Quiescent Current
IQ_PFM
VFB = 1V, MODE = RT=open 118
VFB = 1V, MODE = open 162
IQ_DCM DCM mode, VLX = 0.1V 1.16 1.8
mA
IQ_PWM
Normal switching mode, fSW =500kHz,
VFB = 0.8V 9.5
Absolute Maximum Ratings (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Note 1: Junctiontemperaturegreaterthan+125°Cdegradesoperatinglifetimes.
PackagethermalresistanceswereobtainedusingthemethoddescribedinJEDECspecificationJESD51-7,usingafour-layerboard.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
PACKAGE TYPE: 20 TQFN
Package Code T2055+4
Outline Number 21-0140
Land Pattern Number 90-0009
THERMAL RESISTANCE, FOUR-LAYER BOARD
JunctiontoAmbient(θJA) 30°C/W
JunctiontoCase(θJC) 2°C/W
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”,or“-”inthepackagecodeindicatesRoHSstatusonly.Packagedrawingsmayshowadifferentsuffixcharacter,butthedrawing
pertainstothepackageregardlessofRoHSstatus.
Package Information
Maxim Integrated
2
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
www.maximintegrated.com
(VIN = VEN/UVLO=24V,RRT = 40.2kI(500kHz),CVCC = 2.2µF, VPGND = VSGND = VMODE = VSYNC = 0V, LX = SS = RESET =
open, VBST to VLX = 5V, VFB = 1V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are
referencedtoSGND,unlessotherwisenoted.)(Note2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
ENABLE/UVLO (EN/UVLO)
EN/UVLO Threshold VENR VEN/UVLO rising 1.19 1.215 1.24 V
VENF VEN/UVLO falling 1.068 1.09 1.111
EN/UVLO Input Leakage Current IEN VEN/UVLO = 0V, TA = +25ºC -50 0 +50 nA
LDO
VCCOutputVoltageRange VCC
6V < VIN < 60V, IVCC = 1mA 4.75 5 5.25 V
1mA≤IVCC≤25mA
VCC Current Limit IVCC-MAX VCC = 4.3V, VIN = 6V 26.5 54 100 mA
VCC Dropout VCC-DO VIN = 4.5V, IVCC = 20mA 4.2 V
VCC UVLO VCC_UVR VCC rising 4.05 4.2 4.3 V
VCC_UVF VCC falling 3.65 3.8 3.9
POWER MOSFET AND BST DRIVER
High-SidenMOSOn-Resistance RDS-ONH ILX = 0.3A 165 325 mΩ
Low-SidenMOSOn-Resistance RDS-ONL ILX = 0.3A 80 150 mΩ
LX Leakage Current ILX_LKG VLX = VIN - 1V, VLX = VPGND + 1V,
TA = +25ºC -2 +2 µA
SOFT-START (SS)
Charging Current ISS VSS = 0.5V 4.7 5 5.3 µA
FEEDBACK (FB)
FBRegulationVoltage VFB_REG MODE=SGNDorMODE=VCC 0.89 0.9 0.91 V
MODE = open 0.89 0.915 0.936
FB Input Bias Current IFB 0 < VFB < 1V, TA = +25ºC -50 +50 nA
MODE
MODE Threshold
VM-DCM MODE = VCC (DCM mode) VCC -
1.6
V
VM-PFM MODE = open (PFM mode) VCC/2
VM-PWM MODE=GND(PWMmode) 1.4
CURRENT LIMIT
Peak Current-Limit Threshold IPEAK-LIMIT 4.4 5.1 5.85 A
RunawayCurrent-LimitThreshold IRUNAWAY-LIMIT 4.9 5.7 6.7 A
Valley Current-Limit Threshold ISINK-LIMIT
MODE = open or MODE = VCC -0.16 0 +0.16 A
MODE=GND -1.8
PFM Current-Limit Threshold IPFM MODE = open 0.6 0.75 0.9 A
Electrical Characteristics (continued)
Maxim Integrated
3
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
www.maximintegrated.com
(VIN = VEN/UVLO=24V,RRT = 40.2kI(500kHz),CVCC = 2.2µF, VPGND = VSGND = VMODE = VSYNC = 0V, LX = SS = RESET =
open, VBST to VLX = 5V, VFB = 1V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C. All voltages are
referencedtoSGND,unlessotherwisenoted.)(Note2)
Note 2: All limits are 100% tested at +25°C. Limits over temperature are guaranteed by design.
Note 3: See the Overcurrent Protection/HICCUP Mode section for more details.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
RT AND SYNC
Switching Frequency fSW
RRT=210kΩ 90 100 110
kHz
RRT=102kΩ 180 200 220
RRT=40.2kΩ 475 500 525
RRT=8.06kΩ 1950 2200 2450
RRT = OPEN 460 500 540
SYNCFrequencyCaptureRange fSWsetbtRRT 1.1 x
fSW
1.4 x
fSW kHz
SYNC Pulse Width 50 ns
SYNC Threshold VIH 2.1 V
VIL 0.8
VFB Undervoltage Trip Level to
CauseHiccup VFB-HICF 0.56 0.58 0.6 V
HICCUPTimeout (Note 3) 32768 Cycles
Minimum On-Time tON-MIN
MAX17504 135 ns
MAX17504S 55 80 ns
Minimum Off-Time tOFF-MIN 140 160 ns
LX Dead Time 5 ns
RESET
RESET Output Level Low IRESET = 1mA 0.4 V
RESET Output Leakage Current TA = TJ = +25ºC, VRESET = 5.5V -0.1 +0.1 µA
VOUT Threshold for RESET
Assertion VFB-OKF VFB falling 90.5 92 94 %
VOUT Threshold for RESET
Deassertion VFB-OKR VFB rising 93.8 95 97.2 %
RESET Deassertion Delay After FB
Reaches95%Regulation 1024 Cycles
THERMAL SHUTDOWN
Thermal Shutdown Threshold Temperature rising 165 ºC
ThermalShutdownHysteresis 10 ºC
Electrical Characteristics (continued)
Maxim Integrated
4
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
www.maximintegrated.com
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS=12,000pF,RT=MODE=open,TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.AllvoltagesarereferencedtoSGND,unlessotherwisenoted.)
30
40
50
60
70
80
90
100
0.0 0.1 1.0
EFFICIENCY (%)
LOAD CURRENT (A)
MAX17504S 5V OUTPUT
EFFICIENCY vs. LOAD CURRENT
(PFM MODE, FIGURE 5 CIRCUIT)
V
IN
= 36V
V
IN
= 24V
V
IN
= 12V
MODE = OPEN
3.5
toc03a
V
IN
= 48V
20
30
40
50
60
70
80
90
100
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
EFFICIENCY (%)
LOAD CURRENT (A)
MAX17504S 3.3V OUTPUT
EFFICIENCY vs. LOAD CURRENT
(PWM MODE, FIGURE 6 CIRCUIT)
V
IN
= 48V
V
IN
= 36V
V
IN
= 24V
V
IN
= 12V
MODE = SGND
toc02a
30
40
50
60
70
80
90
100
110 100 1000
EFFICIENCY (%)
LOAD CURRENT (mA)
MAX17504 3.3V OUTPUT
EFFICIENCY vs. LOAD CURRENT
(PFM MODE, FIGURE 4 CIRCUIT)
V
IN
=48V
V
IN
=36V
V
IN
=24V
V
IN
=12V
MODE = OPEN
3500
toc04
30
40
50
60
70
80
90
100
110 100 1000
EFFICIENCY (%)
LOAD CURRENT (mA)
MAX17504 5V OUTPUT
EFFICIENCY vs. LOAD CURRENT
(PFM MODE, FIGURE 3 CIRCUIT)
V
IN
=48V
V
IN
=36V
V
IN
=24V
V
IN
=12V
MODE = OPEN
3500
toc03
30
40
50
60
70
80
90
100
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
EFFICIENCY (%)
LOAD CURRENT (A)
MAX17504S 5V OUTPUT
EFFICIENCY vs. LOAD CURRENT
(PWM MODE, FIGURE 5 CIRCUIT)
V
IN
= 48V
V
IN
= 36V
V
IN
= 24V
V
IN
= 12V
MODE = SGND
toc01a
40
50
60
70
80
90
100
0500 1000 1500 2000 2500 3000 3500
EFFICIENCY (%)
LOAD CURRENT (mA)
Typical Operating Characteristics
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Maxim Integrated
5
www.maximintegrated.com
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS=12,000pF,RT=MODE=open,TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.AllvoltagesarereferencedtoSGND,unlessotherwisenoted.)
Typical Operating Characteristics (continued)
4.98
4.99
5.00
5.01
5.02
5.03
5.04
5.05
5.06
5.07
5.08
0500 1000 1500 2000 2500 3000 3500
OUTPUT VOLTAGE (V)
LOAD CURRENT (mA)
MAX17504 5V OUTPUT
LOAD AND LINE REGULATION
(PWM MODE, FIGURE 3 CIRCUIT)
V
IN
=48V
V
IN
= 36V
V
IN
=24V
V
IN
=12V
toc07
MODE = SGND
30
40
50
60
70
80
90
100
110 100 1000
EFFICIENCY (%)
LOAD CURRENT (mA)
MAX17504 3.3V OUTPUT
EFFICIENCY vs. LOAD CURRENT
(DCM MODE, FIGURE 4 CIRCUIT)
V
IN
=48V
V
IN
=36V
V
IN
=24V
V
IN
=12V
MODE = V
CC
3500
toc06
4.91
4.92
4.93
4.94
4.95
4.96
4.97
4.98
4.99
5.00
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
OUTPUT VOLTAGE (V)
LOAD CURRENT (A)
MAX17504S 5V OUTPUT
LOAD AND LINE REGULATION
(PWM MODE, FIGURE 5 CIRCUIT)
V
IN
= 36V V
IN
= 48V
V
IN
= 24V
V
IN
= 12V
toc07a
MODE = SGND
10
20
30
40
50
60
70
80
90
100
0.0 0.1 1.0
EFFICIENCY (%)
LOAD CURRENT (A)
MAX17504S 3.3V OUTPUT
EFFICIENCY vs. LOAD CURRENT
(DCM MODE, FIGURE 6 CIRCUIT)
V
IN
= 48V
V
IN
= 36V
V
IN
= 24V
V
IN
= 12V
MODE = V
CC
toc06a
30
40
50
60
70
80
90
100
110 100 1000
EFFICIENCY (%)
LOAD CURRENT (mA)
MAX17504 5V OUTPUT
EFFICIENCY vs. LOAD CURRENT
(DCM MODE, FIGURE 3 CIRCUIT)
V
IN
=48V
V
IN
=36V
V
IN
=24V
V
IN
=12V
MODE = V
CC
3500
toc05
0
10
20
30
40
50
60
70
80
90
100
0.0 0.1 1.0
EFFICIENCY (%)
LOAD CURRENT (A)
MAX17504S 5V OUTPUT
EFFICIENCY vs. LOAD CURRENT
(DCM MODE, FIGURE 5 CIRCUIT)
V
IN
= 48V
V
IN
= 36V
V
IN
= 24V
V
IN
= 12V
MODE = V
CC
3.5
toc05a
30
40
50
60
70
80
90
100
0.0 0.1 1.0
EFFICIENCY (%)
LOAD CURRENT (A)
MAX17504S 3.3V OUTPUT
EFFICIENCY vs. LOAD CURRENT
(PFM MODE, FIGURE 6 CIRCUIT)
V
IN
= 48V
V
IN
= 36V
V
IN
= 24V
V
IN
= 12V
MODE = OPEN
3.5
toc04a
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Maxim Integrated
6
www.maximintegrated.com
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS=12,000pF,RT=MODE=open,TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.AllvoltagesarereferencedtoSGND,unlessotherwisenoted.)
Typical Operating Characteristics (continued)
3.20
3.25
3.30
3.35
3.40
3.45
3.50
3.55
3.60
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
OUTPUT VOLTAGE (V)
LOAD CURRENT (A)
MAX17504S 3.3V OUTPUT
LOAD AND LINE REGULATION
(PFM MODE, FIGURE 6 CIRCUIT)
V
IN
= 12V
V
IN
= 48V
V
IN
= 36V
V
IN
= 24V
MODE = OPEN
toc10a
4.75
4.80
4.85
4.90
4.95
5.00
5.05
5.10
5.15
5.20
5.25
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
OUTPUT VOLTAGE (V)
LOAD CURRENT (A)
MAX17504S 5V OUTPUT
LOAD AND LINE REGULATION
(PFM MODE, FIGURE 5 CIRCUIT)
V
IN
=36V
V
IN
= 48V
V
IN
= 12V
V
IN
= 24V
MODE = OPEN
toc09a
0
200
400
600
800
1000
1200
1400
1600
1800
2000
2200
2400
020 40 60 80 100
SWITCHING FREQUENCY (kHz)
R
RT
(k)
SWITCHING FREQUENCY
vs. RT RESISTANCE
toc11
3.0
3.1
3.2
3.3
3.4
3.5
3.6
0500 1000 1500 2000 2500 3000 3500
OUTPUT VOLTAGE (V)
LOAD CURRENT (mA)
MAX17504 3.3V OUTPUT
LOAD AND LINE REGULATION
(PFM MODE, FIGURE 4 CIRCUIT)
V
IN
=36V
V
IN
=48V
V
IN
=12V
V
IN
=24V
toc10
MODE = OPEN
3.32
3.33
3.34
3.35
3.36
3.37
3.38
3.39
3.40
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
OUTPUT VOLTAGE (V)
LOAD CURRENT (A)
MAX17504S 3.3V OUTPUT
LOAD AND LINE REGULATION
(PWM MODE, FIGURE 6 CIRCUIT)
V
IN
= 36V
V
IN
= 48V
V
IN
= 24V
V
IN
= 12V
MODE = SGND
toc08a
4.5
4.6
4.7
4.8
4.9
5.0
5.1
5.2
5.3
5.4
5.5
0500 1000 1500 2000 2500 3000 3500
OUTPUT VOLTAGE (V)
LOAD CURRENT (mA)
MAX17504 5V OUTPUT
LOAD AND LINE REGULATION
(PFM MODE, FIGURE 3 CIRCUIT)
V
IN
=36V
V
IN
=48V
V
IN
=24V
V
IN
=12V
toc09
MODE = OPEN
3.26
3.27
3.28
3.29
3.30
3.31
3.32
3.33
3.34
3.35
3.36
0500 1000 1500 2000 2500 3000 3500
OUTPUT VOLTAGE (V)
LOAD CURRENT (mA)
MAX17504 3.3V OUTPUT
LOAD AND LINE REGULATION
(PWM MODE, FIGURE 4 CIRCUIT)
V
IN
=36V
V
IN
=48V
V
IN
=24V
V
IN
=12V
toc08
MODE = SGND
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Maxim Integrated
7
www.maximintegrated.com
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS=12,000pF,RT=MODE=open,TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.AllvoltagesarereferencedtoSGND,unlessotherwisenoted.)
Typical Operating Characteristics (continued)
2ms/div
V
EN/UVLO
2V/div
MAX17504 5V OUTPUT
SOFT-START/SHUTDOWN FROM EN/UVLO
(PFM MODE, 5mA LOAD CURRENT, FIGURE 3 CIRCUIT)
toc14
V
OUT
1V/div
V
RESET
5V/div
MODE = OPEN
2A/div
1ms/div
V
EN/UVLO
2V/div
MAX17504 3.3V OUTPUT
SOFT-START/SHUTDOWN FROM EN/UVLO,
(3.5A LOAD CURRENT, FIGURE 4 CIRCUIT)
toc13
V
OUT
2V/div
V
RESET
5V/div
I
OUT
MODE = SGND
2mS/div
V
EN/UVLO
5V/div
MAX17504S 5V OUTPUT
SOFT-START/SHUTDOWN FROM EN/UVLO
(PFM MODE, 5mA LOAD CURRENT, FIGURE 5 CIRCUIT)
V
OUT
1V/div
5V/div
toc14a
MODE = OPEN
1A/div
2mS/div
V
EN/UVLO
5V/div
MAX17504S 3.3V OUTPUT
SOFT-START/SHUTDOWN FROM EN/UVLO
(3.5A LOAD CURRENT, FIGURE 6 CIRCUIT)
V
OUT
I
OUT
2V/div
5V/div
toc13a
V
RESET
MODE = SGND
2A/div
1ms/div
V
EN/UVLO
2V/div
MAX17504 5V OUTPUT
SOFT-START/SHUTDOWN FROM EN/UVLO
(3.5A LOAD CURRENT, FIGURE 3 CIRCUIT)
toc12
V
OUT
2V/div
V
RESET
5V/div
I
OUT
MODE = SGND
2A/div
2ms/div
V
EN/UVLO
5V/div
MAX17504S 5V OUTPUT
SOFT-START/SHUTDOWN FROM EN/UVLO
(3.5A LOAD CURRENT, FIGURE 5 CIRCUIT)
V
OUT
I
OUT
2V/div
5V/div
toc12a
V
RESET
MODE = SGND
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Maxim Integrated
8
www.maximintegrated.com
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS=12,000pF,RT=MODE=open,TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.AllvoltagesarereferencedtoSGND,unlessotherwisenoted.)
Typical Operating Characteristics (continued)
1mS/div
V
EN/UVLO
5V/div
MAX17504S 3.3V OUTPUT
SOFT-START WITH 2.5V PREBIAS
(PWM MODE, FIGURE 6 CIRCUIT)
V
OUT
1V/div
5V/div
V
RESET
toc17a
MODE = SGND
1mS/div
V
EN/UVLO
5V/div
MAX17504S 5V OUTPUT
SOFT-START WITH 2.5V PREBIAS
(PWM MODE, FIGURE 5 CIRCUIT)
V
OUT
1V/div
5V/div
V
RESET
MODE = SGND
toc16a
1μs/div
V
OUT
(AC) 20mV/div
MAX17504 5V OUTPUT
STEADY-STATE SWITCHING WAVEFORMS
(3.5A LOAD CURRENT, FIGURE 3 CIRCUIT)
toc18
V
LX
10V/div
I
LX
2A/div
1ms/div
V
EN/UVLO
2V/div
MAX17504 3.3V OUTPUT
SOFT-START WITH 2.5V PREBIAS
(PFM MODE, FIGURE 4 CIRCUIT)
toc17
V
OUT
1V/div
V
RESET
5V/div
MODE = OPEN
2ms/div
V
EN/UVLO
5V/div
MAX17504S 3.3V OUTPUT
SOFT-START/SHUTDOWN FROM EN/UVLO
(PFM MODE, 5mA LOAD CURRENT, FIGURE 6 CIRCUIT)
V
OUT
1V/div
5V/div
toc15a
MODE = OPEN
1ms/div
V
EN/UVLO
2V/div
MAX17504 5V OUTPUT
SOFT-START WITH 2.5V PREBIAS
(PWM MODE, FIGURE 3 CIRCUIT)
toc16
V
OUT
2V/div
V
RESET
5V/div
MODE = SGND
2ms/div
V
EN/UVLO
2V/div
MAX17504 3.3V OUTPUT
SOFT-START/SHUTDOWN FROM EN/UVLO
(PFM MODE, 5mA LOAD CURRENT, FIGURE 4 CIRCUIT)
toc15
V
OUT
1V/div
V
RESET
5V/div
MODE = OPEN
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Maxim Integrated
9
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(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS=12,000pF,RT=MODE=open,TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.AllvoltagesarereferencedtoSGND,unlessotherwisenoted.)
Typical Operating Characteristics (continued)
1μs/div
V
OUT
(AC) 20mV/div
MAX17504 5V OUTPUT
STEADY-STATE SWITCHING WAVEFORMS
(DCM MODE, 25mA LOAD, FIGURE 3 CIRCUIT)
toc21
V
LX
10V/div
I
LX
200mA/div
MODE = V
CC
10μs/div
V
OUT
(AC) 100mV/div
MAX17504 5V OUTPUT
STEADY-STATE SWITCHING WAVEFORMS
(PFM MODE, 25mA LOAD, FIGURE 3 CIRCUIT)
toc20
V
LX
10V/div
I
LX
500mA/div
MODE = OPEN
1μs/div
20mV/div
MAX17504S 5V OUTPUT
STEADY-STATE SWITCHING WAVEFORMS
(DCM MODE, 150mA LOAD CURRENT, FIGURE 5CIRCUIT)
V
OUT
(AC)
10V/div
500mA/div
V
LX
I
LX
toc21a
MODE = V
CC
4μs/div
100mV/div
MAX17504S 5V OUTPUT
STEADY-STATE SWITCHING WAVEFORMS
(PFM MODE, 25mA LOAD CURRENT, FIGURE 5CIRCUIT)
V
OUT
(AC)
10V/div
500mA/div
V
LX
I
LX
toc20a
MODE = OPEN
1μs/div
V
OUT
(AC) 20mV/div
MAX17504 5V OUTPUT
STEADY-STATE SWITCHING WAVEFORMS
(PWM MODE, NO LOAD, FIGURE 3 CIRCUIT)
toc19
V
LX
10V/div
I
LX
500mA/div
MODE = SGND
1µs/div
V
LX
20mV/div
MAX17504S 5V OUTPUT
STEADY-STATE SWITCHING WAVEFORMS
(NO LOAD CURRENT, FIGURE 5CIRCUIT)
V
OUT
(AC)
10V/div
1A/div
I
LX
toc19a
MODE = SGND
1µS/div
V
LX
50mV/div
MAX17504S 5V OUTPUT
STEADY-STATE SWITCHING WAVEFORMS
(3.5A LOAD CURRENT, FIGURE 5 CIRCUIT)
V
OUT
(AC)
10V/div
2A/div
toc18a
MODE = SGND
I
LX
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Maxim Integrated
10
www.maximintegrated.com
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS=12,000pF,RT=MODE=open,TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.AllvoltagesarereferencedtoSGND,unlessotherwisenoted.)
Typical Operating Characteristics (continued)
1A/div
40μs/div
V
OUT
(AC) 100mV/div
MAX17504 5V OUTPUT
LOAD CURRENT STEPPED FROM NO LOAD TO 1.75A
(PWM MODE, FIGURE 3 CIRCUIT)
toc24
I
OUT
MODE = SGND
2A/div
40μs/div
V
OUT
(AC) 100mV/div
MAX17504 5V OUTPUT
LOAD CURRENT STEPPED FROM 1.7`5ATO 3.5A
(PWM MODE, FIGURE 3 CIRCUIT)
toc22
MODE = SGND
I
OUT
2A/div
100μs/div
V
OUT
(AC) 100mV/div
MAX17504 3.3V OUTPUT
LOAD CURRENT STEPPED FROM 1.75ATO 3.5A
(PWM MODE, FIGURE 4 CIRCUIT)
toc23
I
OUT
MODE = SGND
100μS/div
100mV/div
MAX17504S 5V OUTPUT
LOAD CURRENT STEPPED FROM NO LOAD TO 1.75A
(PWM MODE, FIGURE 5CIRCUIT)
V
OUT
AC
1A/div
I
LX
toc24a
MODE = SGND
100μS/div
100mV/div
MAX17504S 5V OUTPUT
LOAD CURRENT STEPPED FROM 1.75A TO 3.5A
(PWM MODE, FIGURE 5CIRCUIT)
V
OUT
AC
2A/div
I
LX
toc22a
MODE = SGND
100μS/div
100mV/div
MAX17504S 3.3V OUTPUT
LOAD CURRENT STEPPED FROM 1.75A TO 3.5A
(PWM MODE, FIGURE 6CIRCUIT)
V
OUT
AC
2A/div
I
LX
toc23a
MODE = SGND
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Maxim Integrated
11
www.maximintegrated.com
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS=12,000pF,RT=MODE=open,TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.AllvoltagesarereferencedtoSGND,unlessotherwisenoted.)
1A/div
2ms/div
V
OUT
(AC) 100mV/div
MAX17504 3.3V OUTPUT
LOAD CURRENT STEPPED FROM 5mA TO 1.75A
(PFM MODE, FIGURE 4 CIRCUIT)
toc27
I
OUT
MODE = OPEN
1A/div
100μs/div
V
OUT
(AC) 100mV/div
MAX17504 3.3V OUTPUT
LOAD CURRENT STEPPED FROM NO LOAD TO 1.75A
(PWM MODE, FIGURE 4 CIRCUIT)
toc25
I
OUT
MODE = SGND
1A/div
2ms/div
V
OUT
(AC) 100mV/div
MAX17504 5V OUTPUT
LOAD CURRENT STEPPED FROM 5mA TO 1.75A
(PFM MODE, FIGURE 3 CIRCUIT)
toc26
I
OUT
MODE = OPEN
2mS/div
100mV/div
MAX17504S 3.3V OUTPUT
LOAD CURRENT STEPPED FROM 5MA TO 1.75A
(PFM MODE, FIGURE 6CIRCUIT)
V
OUT
AC
1A/div
toc27a
I
LX
MODE = OPEN
100μS/div
100mV/div
MAX17504S 3.3V OUTPUT
LOAD CURRENT STEPPED FROM NO LOAD TO 1.75A
(PWM MODE, FIGURE 6CIRCUIT)
V
OUT
AC
1A/div
toc25a
I
LX
MODE = SGND
1mS/div
100mV/div
MAX17504S 5V OUTPUT
LOAD CURRENT STEPPED FROM 5MA TO 1.75A
(PFM MODE, FIGURE 5CIRCUIT)
V
OUT
AC
1A/div
I
LX
toc26a
MODE = OPEN
Typical Operating Characteristics (continued)
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Maxim Integrated
12
www.maximintegrated.com
(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS=12,000pF,RT=MODE=open,TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.AllvoltagesarereferencedtoSGND,unlessotherwisenoted.)
1A/div
20ms/div
V
OUT
2V/div
MAX17504 5V OUTPUT
OVERLOAD PROTECTION
(FIGURE 3 CIRCUIT)
toc30
I
OUT
1A/div
200μs/div
V
OUT
(AC) 100mV/div
MAX17504 5V OUTPUT
LOAD CURRENT STEPPED FROM 50mA TO 1.75A
(DCM MODE, FIGURE 3 CIRCUIT)
toc28
I
OUT
MODE = V
CC
1A/div
200μs/div
V
OUT
(AC) 100mV/div
MAX17504 3.3V OUTPUT
LOAD CURRENT STEPPED FROM 50mA TO 1.75A
(DCM MODE, FIGURE 4 CIRCUIT)
toc29
I
OUT
MODE = V
CC
1A/div
10ms/div
MAX17504S 5V OUTPUT
OVERLOAD PROTECTION
(FIGURE 5CIRCUIT)
50mV/div
I
OUT
toc30a
V
OUT
1A/div
200μs/div
V
OUT
(AC) 100mV/div
MAX17504S 5V OUTPUT
LOAD CURRENT STEPPED FROM 50mA TO 1.75A
(DCM MODE, FIGURE 5 CIRCUIT)
I
OUT
toc28a
MODE = V
CC
1A/div
200μs/div
V
OUT
(AC) 100mV/div
MAX17504S 3.3V OUTPUT
LOAD CURRENT STEPPED FROM 50mA TO 1.75A
(DCM MODE, FIGURE 6CIRCUIT)
toc29a
MODE = V
CC
I
OUT
Typical Operating Characteristics (continued)
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Maxim Integrated
13
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(VIN = VEN/UVLO = 24V, VPGND = VSGND = 0V, CVIN = 2 x 2.2µF, CVCC = 2.2µF, CBST = 0.1µF, CSS=12,000pF,RT=MODE=open,TA = TJ
= -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.AllvoltagesarereferencedtoSGND,unlessotherwisenoted.)
GAIN (dB)
FREQUENCY (Hz)
toc33
MAX17504 3.3V OUTPUT
BODE PLOT
(3.5A LOAD CURRENT, FIGURE 4 CIRCUIT)
140
-60
0
80
0
20
40
60
-20
100K
10K
1K
50
30
10
-10
-30
-40
120
100
60
40
20
-20
-40
CROSSOVER FREQUENCY = 52.7KHz
PHASE MARGIN = 62.4°
GAIN
PHASE
2V/div
2μs/div
V
LX
10V/div
MAX17504 5V OUTPUT
APPLICATION OF EXTERNAL CLOCK AT 700kHz
(FIGURE 3 CIRCUIT)
toc31
V
SYNC
MODE = SGND
GAIN (dB)
FREQUENCY (Hz)
MAX17504 5V OUTPUT
BODE PLOT
(3.5A LOAD CURRENT, FIGURE 3 CIRCUIT)
toc32
GAIN
CROSSOVER FREQUENCY = 48.4kHz
PHASE MARGIN = 62.3°
PHASE
140
-60
0
80
0
20
40
60
-20
100K
10K
1K
50
30
10
-10
-30
-40
120
100
60
40
20
-20
-40
GAIN (dB)
FREQUENCY (Hz)
MAX17504S 3.3V OUTPUT
BODE PLOT
(3.5A LOAD CURRENT, FIGURE 6CIRCUIT)
PHASE
GAIN
CROSSOVER FREQUENCY = 82.3kHz
PHASE MARGIN = 59.4°
toc33a
PHASE (°)
100
-50
0
50
-20
0
20
40
-40
10
5
10
4
10
3
2V/div
2μs/div
V
LX
10V/div
MAX17504S 5V OUTPUT
APPLICATION OF EXTERNAL CLOCK AT 1.2MHz,
(FIGURE 5CIRCUIT)
toc31a
MODE = SGND
GAIN (dB)
FREQUENCY (Hz)
MAX17504S 5V OUTPUT
4 BODE PLOT
(3.5A LOAD CURRENT, FIGURE 5 CIRCUIT)
toc32a
PHASE
GAIN
CROSSOVER FREQUENCY = 86kHz
PHASE MARGIN = 58.9°
100
10
5
10
4
10
3
-30
-20
-10
0
10
20
30
40
-50
0
50
Typical Operating Characteristics (continued)
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
Maxim Integrated
14
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PIN NAME FUNCTION
1, 2, 3 VIN
Power-Supply Input. 4.5V to 60V input supply range. Connect the VINpinstogether.DecoupletoPGND
with two 2.2µF capacitors; place the capacitors close to the VINandPGNDpins.RefertotheMAX17504/
MAX17504S EV kit data sheet for a layout example.
4 EN/UVLO
Enable/Undervoltage Lockout. Drive EN/UVLO high to enable the output voltage. Connect to the
center of the resistor-divider between VINandSGNDtosettheinputvoltageatwhichtheMAX17504/
MAX17504S turns on. Pull up to VIN for always on operation.
5RESET Open-Drain RESET Output. The RESET output is driven low if FB drops below 92% of its set value.
RESET goes high 1024 clock cycles after FB rises above 95% of its set value.
6 SYNC The device can be synchronized to an external clock using this pin. See the External Frequency
Synchronization section for more details.
7 SS Soft-StartInput.ConnectacapacitorfromSStoSGNDtosetthesoft-starttime.
8 CF
Atswitchingfrequencieslowerthan500kHz,connectacapacitorfromCFtoFB.LeaveCFopenifthe
switchingfrequencyisequaltoormorethan500kHz.SeetheLoop Compensation section for more
details.
9 FB FeedbackInput.ConnectFBtothecentertapofanexternalresistor-dividerfromtheoutputtoSGNDto
set the output voltage. See the Adjusting Output Voltage section for more details.
10 RT ConnectaresistorfromRTtoSGNDtosettheregulator’sswitchingfrequency.LeaveRTopenforthe
default500kHzfrequency.SeetheSetting the Switching Frequency (RT) section for more details.
11 MODE
MODEcongurestheMAX17504/MAX17504StooperateinPWM,PFMorDCMmodesofoperation.
LeaveMODEunconnectedforPFMoperation(pulseskippingatlightloads).ConnectMODEtoSGND
for constant-frequency PWM operation at all loads. Connect MODE to VCC for DCM operation. See the
MODE Setting section for more details.
Pin Description
Pin Conguration
19
20
* EXPOSED PAD (CONNECT TO SIGNAL GROUND).
18
17
7
6
8
VIN
RESET
9
VIN
PGND
VCC
MODE
PGND
1 2
LX
4 5
15 14 12 11
LX
BST
FB
CF
SS
SYNC
+
VIN SGND
3
13
LX
16 10 RT
PGND
TQFN
5mm × 5mm
MAX17504/
MAX17504S
TOP VIEW
EN/UVLO
Maxim Integrated
15
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
www.maximintegrated.com
PIN NAME FUNCTION
12 VCC 5V LDO Output. Bypass VCCwitha2.2µFceramiccapacitancetoSGND.
13 SGND AnalogGround
14, 15, 16 PGND
PowerGround.ConnectthePGNDpinsexternallytothepowergroundplane.ConnecttheSGNDand
PGNDpinstogetheratthegroundreturnpathoftheVCCbypasscapacitor.RefertotheMAX17504/
MAX17504S EV kit data sheet for a layout example.
17, 18, 19 LX Switching Node. Connect LX pins to the switching side of the inductor.
20 BST Boost Flying Capacitor. Connect a 0.1µF ceramic capacitor between BST and LX.
EP
Exposedpad.ConnecttotheSGNDpin.ConnecttoalargecopperplanebelowtheICtoimproveheat
dissipationcapability.Addthermalviasbelowtheexposedpad.RefertotheMAX17504/MAX17504SEV
kit data sheet for a layout example.
Pin Description (continued)
Block Diagram
VCC
SGND
1.215V
5V
LX
PGND
MODE
VIN
BST
LDO
EN/UVLO
RT
MAX17504/MAX17504S
SYNC
CF
FB
SS
FB
OSCILLATOR
SWITCHOVER
LOGIC
ERROR AMPLIFIER/
LOOP COMPENSATION
MODE
SELECTION
LOGIC
SLOPE
COMPENSATION
RESET
LOGIC
CURRENT-SENSE
LOGIC
HICCUP
HICCUP
5µA
VCC
PWM/
PFM/
HICCUP
LOGIC
VBG = 0.9V
RESET
EN/UVLO
Maxim Integrated
16
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
www.maximintegrated.com
Detailed Description
The MAX17504/MAX17504S high-efficiency, high-voltage,
synchronously rectified step-down converter with dual
integrated MOSFETs operates over a 4.5V to 60V input.
It delivers up to 3.5A and 0.9V to 90% VIN output voltage.
Built-in compensation across the output voltage range
eliminates the need for external components. The feedback
(FB) regulation accuracy over -40°C to +125°C is ±1.1%.
The device features a peak-current-mode control
architecture. An internal transconductance error
amplifier produces an integrated error voltage at an
internal node that sets the duty cycle using a PWM
comparator, a high-side current-sense amplifier, and a
slope-compensation generator. At each rising edge of
the clock, the high-side MOSFET turns on and remains
on until either the appropriate or maximum duty cycle
is reached, or the peak current limit is detected. During
thehigh-sideMOSFET’son-time,theinductorcurrent
ramps up. During the second half of the switching
cycle, the high-side MOSFET turns off and the low-side
MOSFET turns on. The inductor releases the stored
energy as its current ramps down and provides current
to the output.
The device features a MODE pin that can be used to operate
the device in PWM, PFM, or DCM control schemes. The
device integrates adjustable-input undervoltage lockout,
adjustablesoft-start,openRESET, and external frequency
synchronization features. The MAX17504S offers a
lower minimum on-time that allows for higher switching
frequencies and a smaller solution size.
Mode Selection (MODE)
The logic state of the MODE pin is latched when VCC
and EN/UVLO voltages exceed the respective UVLO
rising thresholds and all internal voltages are ready to
allow LX switching. If the MODE pin is open at power-up,
the device operates in PFM mode at light loads. If the
MODE pin is grounded at power-up, the device operates
in constant-frequency PWM mode at all loads. Finally,
if the MODE pin is connected to VCC at power-up, the
device operates in constant-frequency DCM mode at light
loads. State changes on the MODE pin are ignored during
normal operation.
PWM Mode Operation
In PWM mode, the inductor current is allowed to go negative.
PWM operation provides constant frequency operation at
all loads, and is useful in applications sensitive to switching
frequency.However,thePWMmodeofoperationgiveslower
efficiency at light loads compared to PFM and DCM modes
of operation.
PFM Mode Operation
PFM mode of operation disables negative inductor current
and additionally skips pulses at light loads for high
efficiency. In PFM mode, the inductor current is forced to
a fixed peak of 750mA every clock cycle until the output
rises to 102.3% of the nominal voltage. Once the output
reaches 102.3% of the nominal voltage, both the high-side
and low-side FETs are turned off and the device enters
hibernate operation until the load discharges the output to
101.1% of the nominal voltage. Most of the internal blocks
are turned off in hibernate operation to save quiescent
current. After the output falls below 101.1% of the nominal
voltage, the device comes out of hibernate operation,
turns on all internal blocks, and again commences the
process of delivering pulses of energy to the output until it
reaches 102.3% of the nominal output voltage.
The advantage of the PFM mode is higher efficiency at
light loads because of lower quiescent current drawn from
supply. The disadvantage is that the output-voltage ripple
is higher compared to PWM or DCM modes of operation
and switching frequency is not constant at light loads.
DCM Mode Operation
DCM mode of operation features constant frequency
operation down to lighter loads than PFM mode, by not
skipping pulses but only disabling negative inductor
current at light loads. DCM operation offers efficiency
performance that lies between PWM and PFM modes.
Linear Regulator (VCC)
An internal linear regulator (VCC) provides a 5V nominal
supply to power the internal blocks and the low-side
MOSFET driver. The output of the linear regulator (VCC)
should be bypassed with a 2.2µF ceramic capacitor
to SGND. The MAX17504/MAX17504S employs an
undervoltage lockout circuit that disables the internal
linear regulator when VCC falls below 3.8V (typ).
Setting the Switching Frequency (RT)
The switching frequency of the MAX17504/MAX17504S
can be programmed from 100kHz to 2.2MHz by using
a resistor connected from RT to SGND. The switching
frequency (fSW) is related to the resistor connected at the
RTpin(RRT) by the following equation:
3
RT
SW
21 10
R 1.7
f
×
whereRRTisinkΩandfSWisinkHz.LeavingtheRTpin
open causes the device to operate at the default switching
frequencyof500kHz.SeeTable 1forRTresistorvalues
for a few common switching frequencies.
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MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
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Operating Input Voltage Range
The minimum and maximum operating input voltages for
a given output voltage should be calculated as follows:
OUT OUT(MAX) DCR
IN(MIN) SW(MAX) OFF(MAX)
OUT(MAX)
V (I (R 0.15))
V1- (f t )
(I 0.175)
+ ×+
=×
OUT
IN(MAX) SW(MAX) ON(MIN)
V
V
ft
=×
where VOUT is the steady-state output voltage, IOUT(MAX)
isthemaximumloadcurrent,RDCR is the DC resistance
of the inductor, fSW(MAX) is the maximum switching
frequency, tOFF(MAX) is the worst-case minimum switch
off-time (160ns), and tON(MIN) is the worst-case minimum
switch on-time (135ns for the MAX17504, 80ns for the
MAX17504S).
External Frequency Synchronization (SYNC)
The internal oscillator of the MAX17504/MAX17504S can
be synchronized to an external clock signal on the SYNC
pin. The external synchronization clock frequency must
be between 1.1 x fSW and 1.4 x fSW, where fSW is the
frequencyprogrammedbytheRTresistor.Theminimum
external clock pulse-width high should be greater than
50ns. See the RT and SYNC section in the Electrical
Characteristics table for details.
Overcurrent Protection/HICCUP Mode
The MAX17504/MAX17504S is provided with a robust
overcurrent protection scheme that protects the device
under overload and output short-circuit conditions. A
cycle-by-cycle peak current limit turns off the high-side
MOSFET whenever the high-side switch current exceeds
an internal limit of 5.1A (typ). A runaway current limit on
the high-side switch current at 5.7A (typ) protects the
device under high input voltage, short-circuit conditions
when there is insufficient output voltage available to
restore the inductor current that was built up during the
ON period of the step-down converter. One occurrence
of the runaway current limit triggers a hiccup mode. In
addition, if due to a fault condition, feedback voltage
drops to 0.58V (typ) anytime after soft-start is complete,
hiccup mode is triggered. In hiccup mode, the converter
is protected by suspending switching for a hiccup timeout
period of 32,768 clock cycles. Once the hiccup timeout
period expires, soft-start is attempted again. Note that
when soft-start is attempted under an overload condition,
if feedback voltage does not exceed 0.58V, the device
switches at half the programmed switching frequency.
Hiccupmodeofoperationensureslowpowerdissipation
under output short-circuit conditions.
RESET Output
The MAX17504/MAX17504S includes a RESET
comparator to monitor the output voltage. The open-
drain RESET output requires an external pullup resistor.
RESET goes high (high-impedance) 1024 switching
cycles after the regulator output increases above 95%
of the designed nominal regulated voltage. RESET goes
low when the regulator output voltage drops to below 92%
of the nominal regulated voltage. RESET also goes low
during thermal shutdown.
Prebiased Output
When the MAX17504/MAX17504S starts into a prebiased
output, both the high-side and the low-side switches are
turned off so that the converter does not sink current from
theoutput.High-sideandlow-sideswitchesdonotstart
switching until the PWM comparator commands the first
PWM pulse, at which point switching commences. The
output voltage is then smoothly ramped up to the target
value in alignment with the internal reference.
Thermal-Shutdown Protection
Thermal-shutdown protection limits total power dissipation
in the MAX17504/MAX17504S. When the junction
temperature of the device exceeds +165°C, an on-chip
thermal sensor shuts down the device, allowing the device
to cool. The thermal sensor turns the device on again
after the junction temperature cools by 10°C. Soft-start
resets during thermal shutdown. Carefully evaluate the
total power dissipation (see the Power Dissipation section)
to avoid unwanted triggering of the thermal shutdown in
normal operation.
Table 1. Switching Frequency vs. RT Resistor
SWITCHING FREQUENCY (kHz) RT RESISTOR (kΩ)
500 OPEN
100 210
200 102
400 49.9
1000 19.1
2200 8.06
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MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
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Applications Information
Input Capacitor Selection
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor RMS current requirement (IRMS) is
defined by the following equation:
×
= × OUT IN OUT
RMS OUT(MAX)
IN
V (V - V )
II V
where, IOUT(MAX) is the maximum load current. IRMS has
a maximum value when the input voltage equals twice
the output voltage (VIN = 2 x VOUT), so IRMS(MAX) =
IOUT(MAX)/2.
Choose an input capacitor that exhibits less than +10°C
temperature rise at the RMS input current for optimal
long-termreliability.Uselow-ESRceramiccapacitorswith
highripplecurrentcapabilityattheinput.X7Rcapacitors
are recommended in industrial applications for their
temperature stability. Calculate the input capacitance
using the following equation:
××
=η× ×
OUT(MAX)
IN SW IN
I D (1- D)
CfV
where D = VOUT/VIN is the duty ratio of the controller,
fSWistheswitchingfrequency,ΔVIN is the allowable input
voltage ripple, and E is the efficiency.
In applications where the source is located distant
from the MAX17504/MAX17504S input, an electrolytic
capacitor should be added in parallel to the ceramic
capacitor to provide necessary damping for potential
oscillations caused by the inductance of the longer input
power path and input ceramic capacitor.
Inductor Selection
Three key inductor parameters must be specified for
operation with the MAX17504/MAX17504S: inductance
value (L), inductor saturation current (ISAT), and DC
resistance(RDCR). The switching frequency and output
voltage determine the inductor value as follows:
OUT
SW
V
Lf
=
where VOUT and fSW are nominal values.
Select a low-loss inductor closest to the calculated
value with acceptable dimensions and having the lowest
possible DC resistance. The saturation current rating
(ISAT) of the inductor must be high enough to ensure that
saturation can occur only above the peak current-limit
value of 5.1A.
Output Capacitor Selection
X7Rceramicoutputcapacitorsarepreferredduetotheir
stability over temperature in industrial applications. The
output capacitors are usually sized to support a step load
of 50% of the maximum output current in the application,
so the output voltage deviation is contained to 3% of the
output voltage change. The minimum required output
capacitance can be calculated as follows:
×
= ×
STEP RESPONSE
OUT OUT
It
1
C2V
≅+
RESPONSE C sw
0.33 1
t ()
ff
where ISTEP is the load current step, tRESPONSE is the
response time of the controller, DVOUT is the allowable
output voltage deviation, fC is the target closed-loop
crossover frequency, and fSW is the switching frequency.
For the MAX17504, select fC to be 1/9th of fSW if the
switchingfrequencyislessthanorequalto500kHz.Ifthe
switchingfrequencyismorethan500kHz,selectfC to be
55kHz.FortheMAX17504S,selectfC to be 1/10th of fSW
iftheswitchingfrequencyislessthanorequalto1MHz.
Iftheswitchingfrequencyismorethan1MHz,selectfC
tobe100kHz.
Derating of ceramic capacitors with DC-voltage must be
considered while selecting the output capacitor. Derating
curves are available from all major ceramic capacitor
vendors.
Figure 1. Setting the Input Undervoltage Lockout
R1
R2
SGND
EN/UVLO
VIN
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MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
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Soft-Start Capacitor Selection
TheMAX17504/MAX17504Simplementsadjustablesoft-
start operation to reduce inrush current. A capacitor
connected from the SS pin to SGND programs the
soft-start time. The selected output capacitance (CSEL)
and the output voltage (VOUT) determine the minimum
required soft-start capacitor as follows:
CSS≥28x10-6 x CSEL x VOUT
The soft-start time (tSS) is related to the capacitor
connected at SS (CSS) by the following equation:
tSS = CSS/(5.55 x 10-6)
For example, to program a 2ms soft-start time, a 12nF
capacitorshouldbeconnectedfromtheSSpintoSGND.
Setting the Input Undervoltage Lockout Level
The MAX17504/MAX17504S offers an adjustable input
undervoltage lockout level. Set the voltage at which
MAX17504/MAX17504S turns ON, with a resistive voltage-
divider connected from VINtoSGND.Connectthecenter
node of the divider to EN/UVLO.
ChooseR1tobe3.3MIandthencalculateR2asfollows:
×
=
INU
R1 1.215
R2 (V - 1.215)
where VINU is the voltage at which the MAX17504/
MAX17504S is required to turn ON. Ensure that VINU is
higher than 0.8 x VOUT. If the EN/UVLO pin is driven from
an external signal source, a series resistance of minimum
1kΩ is recommended to be placed between the signal
source output and the EN/UVLO pin, to reduce voltage
ringing on the line.
Loop Compensation
The MAX17504/MAX17504S is internally loop
compensated.However,iftheswitchingfrequencyisless
than500kHz,connecta0402capacitor,C6,betweenthe
CF pin and the FB pin. Use Table 2 to select the value
of C6.
Adjusting Output Voltage
Set the output voltage with a resistive voltage-divider
connected from the positive terminal of the output
capacitor (VOUT)to SGND(seeFigure 2). Connect the
center node of the divider to the FB pin. Use the following
procedure to choose the resistive voltage-divider values:
CalculateresistorR3fromtheoutputtoFBasfollows:
3
C OUT
216 10
R3 fC
×
=×
where R3 is in kI, crossover frequency fC is in kHz,
and output capacitor COUT is in µF. For the MAX17504,
choose fC to be 1/9th of the switching frequency, fSW, if
theswitchingfrequencyislessthanorequalto500kHz.
Iftheswitchingfrequencyismorethan500kHz,selectfC
tobe55kHz.FortheMAX17504S,selectfC to be 1/10th
of fSW if the switching frequency is less than or equal
to1MHz.Iftheswitchingfrequencyismorethan1MHz,
select fCtobe100kHz.
CalculateresistorR4fromFBtoSGNDasfollows:
×
=
OUT
R3 0.9
R4 (V - 0.9)
Figure 2. Setting the Output Voltage
Table 2. C6 Capacitor Value at Various
Switching Frequencies
SWITCHING FREQUENCY RANGE (kHz) C6 (pF)
200 to 300 2.2
300 to 400 1.2
400 to 500 0.75
R3
R4
SGND
FB
VOUT
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MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
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Power Dissipation
At a particular operating condition, the power losses that
lead to temperature rise of the part are estimated as
follows:
()
=××
η
2
LOSS OUT DCR
OUT
1
P (P ( - 1)) - I R
= ×
OUT OUT OUT
P VI
where POUT is the total output power, η is the efficiency
of the converter, and RDCR is the DC resistance of the
inductor. (See the Typical Operating Characteristics for more
information on efficiency at typical operating conditions).
For a multilayer board, the thermal performance metrics
for the package are given below:
JA 30 C Wθ=°
JC 2CWθ=°
ThejunctiontemperatureoftheMAX17504/MAX17504S
can be estimated at any given maximum ambient
temperature (TA_MAX) from the equation below:
( )
= ×
J_MAX A_MAX JA LOSS
TT P
If the application has a thermal management system
that ensures that the exposed pad of the MAX17504/
MAX17504S is maintained at a given temperature (TEP_
MAX) by using proper heat sinks, then the junction
temperature of the MAX17504/MAX17504S can be
estimated at any given maximum ambient temperature
from the equation below:
( )
= ×
J_MAX EP_MAX JC LOSS
TT P
Junction temperature greater than +125°C degrades
operating lifetimes.
PCB Layout Guidelines
All connections carrying pulsed currents must be very
short and as wide as possible. The inductance of these
connections must be kept to an absolute minimum due to
the high di/dt of the currents. Since inductance of a current
carrying loop is proportional to the area enclosed by the
loop, if the loop area is made very small, inductance is
reduced. Additionally, small current loop areas reduce
radiated EMI.
A ceramic input filter capacitor should be placed close to the
VIN pins of the IC. This eliminates as much trace inductance
effects as possible and give the IC a cleaner voltage supply.
A bypass capacitor for the VCC pin also should be placed
close to the pin to reduce effects of trace impedance.
When routing the circuitry around the IC, the analog
small-signal ground and the power ground for switching
currents must be kept separate. They should be connected
together at a point where switching activity is at a
minimum, typically the return terminal of the VCC bypass
capacitor. This helps keep the analog ground quiet.
The ground plane should be kept continuous/unbroken
as far as possible. No trace carrying high switching
current should be placed directly over any ground plane
discontinuity.
PCB layout also affects the thermal performance of the
design. A number of thermal vias that connect to a large
ground plane should be provided under the exposed pad
of the part, for efficient heat dissipation.
For a sample layout that ensures first pass success,
refer to the MAX17504 evaluation kit layout available at
www.maximintegrated.com.
Maxim Integrated
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MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
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Recommended Component Placement for MAX17504/MAX17504S
R1
R2
C5
R6
C3 C6
R4
R5
R3
C2
VOUT
PLANE
VIN PLANE
C4
PGND PLANE
SYNC
SGND PLANE
MODE
SGND
PGND PLANE
MAX17504/
MAX17504S
LX PLANE
LX PLANE
L1
C1
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MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
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with Internal Compensation
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Figure 3. MAX17504 Typical Application Circuit for 5V Output, 500kHz Switching Frequency
Figure 4. MAX17504 Typical Application Circuit for 3.3V Output, 500kHz Switching Frequency
VCC
SGND
C3
12000pF
C2
2.2µF
C1
2.2µF
C8
2.2µF
C4
22µF
C9
22µF R3
82.5k
R4
30.9k
C5
0.1µF
L1
6.8µH
MODE
SYNC
LX
FB
RESET
LX
LX
CF SS PGND PGND
EN/UVLO VIN VIN
VIN
(5.5V TO 60V)
VOUT
3.3V, 3.5A
fSW = 500kHz
PGND
VIN
RT
BST
MAX17504
L1 = MSS1048-682NL
C4, C9 = 22µF (MURATA GRM32ER71A226K)
VCC
SGND
C3
12000pF
C2
2.2µF
C1
2.2µF
C8
2.2µF
C4
22µF
C9
22µF R3
100k
R4
22.1k
C5
0.1µF
L1
10µH
MODE
SYNC
LX
FB
RESET
LX
LX
CF SS PGND PGND
EN/UVLO VIN VIN
VIN
(7.5V TO 60V)
VOUT
5V, 3.5A
fSW = 500kHz
PGND
VIN
RT
BST
MAX17504
L1 = SLF12575T-100M5R4-H
C4, C9 = 22µF (MURATA GRM32ER71A226K)
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MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
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Figure 5. MAX17504S Typical Operating Circuit for 5V Output, 1MHz Switching Frequency
Figure 6. MAX17504S Typical Operating Circuit for 3.3V Output, 1MHz Switching Frequency
RT
SYNC
MODE
V
CC
SGND
BST
LX
FB
RESET
LX
LX
CF SS PGND PGND PGND
V
IN
V
IN
V
IN
EN/UVLO
C4
C2
2.2µF
C3
12nF
R3
76.8KΩ
R4
28.7KΩ
47µF
3.3µH
L1
C5
0.1µF
C1
2.2µF
MAX17504S
V
OUT
3.3V,3.5A
V
IN
L1 = 3.3µH (XAL6060, 6mm x 6mm)
C4 = 47µF (MURATA GRM32ER71A476KE15)
R5
19.1KΩ
f
SW
=
1MHz
RT
SYNC
MODE
V
CC
SGND
BST
LX
FB
RESET
LX
LX
CF SS PGND PGND PGND
V
IN
V
IN
V
IN
EN/UVLO
C4
C2
2.2µF
C3
12nF
R3
115KΩ
R4
24.9KΩ
22µF
4.7µH
L1
C5
0.1µF
C1
2.2µF
MAX17504S
V
OUT
5V,3.5A
V
IN
L1 = 4.7µH (XAL6060, 6mm x 6mm)
C4 = 22µF (MURATA GRM32ER71A226K)
R5
19.1KΩ
f
SW
= 1MHz
Maxim Integrated
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MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation
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Note: All devices operate over the temperature range of -40ºC
to +125ºC, unless otherwise noted.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
PART PIN-PACKAGE
MAX17504ATP+ 20 TQFN-EP* 5mm x 5mm
MAX17504SATP+ 20 TQFN-EP* 5mm x 5mm
Chip Information
PROCESS:BiCMOS
Ordering Information
Maxim Integrated
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MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
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REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 11/13 Initial release
1 2/14 UpdatedTOC32,TOC33,andTypicalApplicationCircuitgures 9, 16, 17
2 10/16 AddedMAX17504Stodatasheet,updatedjunctiontemperature,andaddedTOCs 1-17
3 5/17
Removed17504Sfromdatasheet,correctedpartnumbersinGeneral Description,
Benets and Features, Detailed Description, Operating Input Voltage Range sections,
updated TOCs 1a, 5, 5a, 6, 7a, 12, 12a, 13, 13a, 14a, 15a, 16a, 17a, 18a, 19a, 20a,
21a, 22, 22a, 23, 23a, 24a, 25a, 26a, 27a, 30a, 32a, Figures 3, 4, 5, and 6, removed
Recommended Component Placement for MAX17504/MAX17504S
1–26
Revision History
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim
reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits) shown in the Electrical Character-
istics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
© 2017 Maxim Integrated Products, Inc.
26
MAX17504 4.5V–60V, 3.5A, High-Efciency, Synchronous
Step-Down DC-DC Converter
with Internal Compensation