11/02/10
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AUTOMOTIVE MOSFET PD - 96336
HEXFET® Power MOSFET
S
D
G
TO-220AB
AUIRF3305
Specifically designed for Automotive applications, this cellular
design of HEXFET® Power MOSFETs utilizes the latest
processing techniques to achieve low on-resistance per
silicon area. This benefit combined with the fast switching
speed and ruggedized device design that HEXFET power
MOSFETs are well known for, provides the designer with an
extremely efficient and reliable device for use in Automotive
and a wide variety of other applications.
Description
Features
lAdvanced Planar Technology
lLow On-Resistance
lDynamic dV/dT Rating
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
lRepetitive Avalanche Allowed up to Tjmax
lLead-Free, RoHS Compliant
lAutomotive Qualified *
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the
specifications is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Ambient temperature (TA) is 25°C, unless otherwise specified.
GDS
Gate Drain Source
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
Parameter Units
I
D
@ T
C
= 25°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
C
= 100°C Continuous Drain Current, V
GS
@ 10V
I
DM
Pulsed Drain Current
c
P
D
@T
C
= 25°C Power Dissipation W
Linear Derating Factor W/°C
V
GS
Gate-to-Source Voltage V
E
AS
Single Pulse Avalanche Energy(Thermally limited)
d
E
AS
(Tested ) Single Pulse Avalanche Energy Tested Value
dh
I
AR
Avalanche Current
c
A
E
AR
Repetitive Avalanche Energy
g
mJ
T
J
Operating Junction and
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds(1.6mm from case )
Mounting Torque, 6-32 or M3 screw
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
Junction-to-Case
i
––– 0.45
R
θCS
Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
R
θJA
Junction-to-Ambient ––– 62
mJ
°C
A
860
470
See Fig.12a, 12b, 15, 16
330
2.2
± 20
Max.
140
99
560
-55 to + 175
300
10 lbf
y
in (1.1N
y
m)
V
(BR)DSS
55V
R
DS(on)
max. 8mΩ
I
D
140A
AUIRF3305
2www.irf.com
Repetitive rating; pulse width limited by max. junction temperature.
(See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.17mH RG = 25Ω, IAS = 75A,
VGS =10V. Part not recommended for use above this value.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time as
Coss while VDS is rising from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
Notes:
This value determined from sample failure population. 100% tested to this
value in production.
Rθ is measured at TJ of approximately 90°C.
All AC and DC test conditions based on former package limited
current of 75A.
Static Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter Min. T
y
p. Max. Units
V
(BR)DSS
Drain-to-Source Breakdown Volta
g
e 55 ––– ––– V
∆V
(BR)DSS
/
∆T
J
Breakdown Volta
g
e Temp. Coefficient ––– 0.055 ––– V/°C
R
DS(on)
Static Drain-to-Source On-Resistance ––– ––– 8.0 m
Ω
V
GS(th)
Gate Threshold Volta
g
e2.0–––4.0V
g
fs Forward Transconductance 41 ––– ––– S
I
DSS
Drain-to-Source Leaka
g
e Current ––– ––– 25
A
––– ––– 250
I
GSS
Gate-to-Source Forward Leaka
g
e ––– ––– 200 nA
Gate-to-Source Reverse Leaka
g
e––––––-200
Dynamic Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Q
g
Total Gate Char
g
e–––100150
Q
gs
Gate-to-Source Char
g
e ––– 21 ––– nC
Q
gd
Gate-to-Drain ("Miller") Char
g
e ––– 45 –––
t
d(on)
Turn-On Dela
y
Time ––– 16 –––
t
r
Rise Time ––– 88 –––
t
d(off)
Turn-Off Dela
y
Time ––– 43 ––– ns
t
f
Fall Time ––– 34 –––
L
D
Internal Drain Inductance ––– 4.5 ––– Between lead,
nH 6mm (0.25in.)
L
S
Internal Source Inductance ––– 7.5 ––– from packa
g
e
and center of die contact
C
iss
Input Capacitance ––– 3650 –––
C
oss
Output Capacitance ––– 1230 –––
C
rss
Reverse Transfer Capacitance ––– 450 ––– pF
C
oss
Output Capacitance ––– 4720 –––
C
oss
Output Capacitance ––– 930 –––
C
oss
eff. Effective Output Capacitance ––– 1490 –––
Diode Characteristics
Parameter Min. T
y
p. Max. Units
I
S
Continuous Source Current ––– ––– 75
(Body Diode) A
I
SM
Pulsed Source Current ––– ––– 560
(Body Diode)
c
V
SD
Diode Forward Volta
g
e––––––1.3V
t
rr
Reverse Recover
y
Time ––– 57 86 ns
Q
rr
Reverse Recover
y
Char
g
e ––– 130 190 nC
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 44V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 44V
f
V
GS
= 10V
e
V
DD
= 28V
I
D
= 75A
j
R
G
= 2.6 Ω
T
J
= 25°C, I
S
= 75A
j
, V
GS
= 0V
e
T
J
= 25°C, I
F
= 75A
j
, V
DD
= 28V
di/dt = 100A/
µ
s
e
Conditions
V
GS
= 0V, I
D
= 250µA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 75A
ej
V
DS
= V
GS
, I
D
= 250µA
V
DS
= 55V, V
GS
= 0V
V
DS
= 55V, V
GS
= 0V, T
J
= 125°C
MOSFET symbol
showing the
integral reverse
p-n junction diode.
V
DS
= 25V, I
D
= 75A
j
I
D
= 75A
j
V
DS
= 44V
Conditions
V
GS
= 10V
e
V
GS
= 0V
V
DS
= 25V
ƒ = 1.0MHz
V
GS
= 20V
V
GS
= -20V
AUIRF3305
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Qualification standards can be found at International Rectifiers web site: http//www.irf.com/
 Exceptions to AEC-Q101 requirements are noted in the qualification report.
Qualification Information
†
Moisture Sensitivity Level 3L-TO-220 N/A
RoHS Compliant Yes
ESD
Machine Model
Class M4(425V)
(per AEC-Q101-002)
Human Body Model
Class H2 (4000V)
(per AEC-Q101-001)
Charged Device Model
Class C5 (1125V)
(per AEC-Q101-005)
Qualification Level
Automotive
(per AEC-Q101)
††
Comments: This part number(s) passed Automotive qualification. IR’s
Industrial and Consumer qualification level is granted by extension of
the higher Automotive level.
AUIRF3305
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Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance
Vs. Drain Current
0 20 40 60 80 100 120 140
ID, Drain-to-Source Current (A)
0
20
40
60
80
Gfs, Forward Transconductance (S)
TJ = 25°C
TJ = 175°C
VDS = 10V
380µs PULSE WIDTH
0.1 110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
ID, Drain-to-Source Current (A)
≤ 60µs PULSE WIDTH
Tj = 25°C
4.5V
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
ID, Drain-to-Source Current (A)
≤ 60µs PULSE WIDTH
Tj = 175°C
4.5V
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
2.0 3.0 4.0 5.0 6.0 7.0 8.0
VGS, Gate-to-Source Voltage (V)
0.1
1.0
10.0
100.0
1000.0
ID, Drain-to-Source Current
(Α)
VDS = 25V
≤ 60µs PULSE WIDTH
TJ = 25°C
TJ = 175°C
AUIRF3305
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
VDS, Drain-to-Source Voltage (V)
0
1000
2000
3000
4000
5000
6000
7000
C, Capacitance (pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
0 40 80 120 160
QG Total Gate Charge (nC)
0
4
8
12
16
20
VGS, Gate-to-Source Voltage (V)
VDS= 44V
VDS= 28V
ID= 75A
0.0 0.4 0.8 1.2 1.6 2.0 2.4
VSD, Source-to-Drain Voltage (V)
0.1
1.0
10.0
100.0
1000.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
1 10 100 1000
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
DC
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10. Normalized On-Resistance
Vs. Temperature
-60 -40 -20 020 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 75A
VGS = 10V
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
Thermal Response ( Z
thJC )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Ri (°C/W) τi (sec)
0.1758 0.00045
0.228 0.004565
0.0457 0.01858
τJ
τJ
τ1
τ1
τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
τ
τC
Ci i/Ri
Ci= τi/Ri
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
20
40
60
80
100
120
140
160
ID , Drain Current (A)
AUIRF3305
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Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 14. Threshold Voltage Vs. Temperature
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
25 50 75 100 125 150 175
Starting TJ, Junction Temperature (°C)
0
400
800
1200
1600
2000
EAS, Single Pulse Avalanche Energy (mJ)
I D
TOP 18A
26A
BOTTOM 75A
-75 -50 -25 025 50 75 100 125 150 175
TJ , Temperature ( °C )
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VGS(th) Gate threshold Voltage (V)
ID = 5.0A
ID = 1.0A
ID = 250µA
1K
VCC
DUT
0
L
QG
QGS QGD
VG
Charge
10 V
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Fig 15. Typical Avalanche Current Vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
1
10
100
1000
10000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
100
200
300
400
500
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1% Duty Cycle
ID = 75A
AUIRF3305
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Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V
DS
90%
10%
V
GS
td(on) trtd(off) tf
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
AUIRF3305
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TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
YWWA
XX or XX
Part Number
IR Logo
Lot Code
AUF3305
Date Code
Y= Year
WW= Work Week
A= Automotive, Lead Free
AUIRF3305
www.irf.com 11
Ordering Information
Base part Package Type Standard Pack Complete Part Number
Form Quantity
AUIRF3305 TO-220 Tube 50 AUIRF3305
AUIRF3305
12 www.irf.com
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